P14d_b-g-l-z-tm-en-1 3e6j6y
This document was ed by and they confirmed that they have the permission to share it. If you are author or own the copyright of this book, please report to us by using this report form. Report 3l3c15
Overview 3z723u
More details 2i4a6q
- Words: 205,137
- Pages: 718
Technical Manual Feeder Management IED Platform Hardware Version: A Platform Software Version: 50 Publication Reference: P14D-B/G/L/Z-TM-EN-1
© ALSTOM 2012. All rights reserved. Information contained in this document is indicative only. No representation or warranty is given or should be relied on that it is complete or correct or will apply to any particular project. This will depend on the technical and commercial circumstances. It is provided without liability and is subject to change without notice. Reproduction, use or disclosure to third parties, without express written authority, is strictly prohibited.
Contents Chapter 1 1 2 2.1 2.2 2.3 2.4 2.5 3 3.1 3.2 3.3 3.4 4 5 6
Chapter Overview Foreword Target Audience Typographical Conventions Nomenclature Manual Structure Product Scope Features and Functions Protection Functions Control Functions Measurement Functions Communication Functions Compliance Functional Overview Ordering Options
Chapter 2 1 2 3 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 5
Safety Information
Chapter Overview Health and Safety Symbols Installation, Commissioning and Servicing Lifting Hazards Electrical Hazards UL/CSA/CUL Requirements Equipment Connections Protection Class 1 Equipment Requirements Pre-energization Checklist Peripheral Circuitry Upgrading/Servicing Decommissioning and Disposal
Chapter 3 1 2 2.1 3 3.1 3.2 4 4.1 4.2 4.3 4.4 4.5 4.6 5 5.1 5.2 5.3 5.4
Introduction
Hardware Design
Chapter Overview Hardware Architecture Memory and Real Time Clock Mechanical Implementation Housing Variants 30TE Rear Terminal Connections I/O Options P14D Hardware Configuration 1 P14D Hardware Configuration 2 P14D Hardware Configuration 3 P14D Hardware Configuration 4 P14D Hardware Configuration 5 Front 30TE Front Keypad Liquid Crystal Display USB Port
1 3 4 4 4 4 5 5 7 7 8 8 8 10 11 12
13 15 16 17 18 18 18 19 20 20 21 21 22 23
25 27 28 28 30 30 31 33 33 33 35 36 38 40 42 42 42 43 43
Contents
5.5 5.6 5.7
P14D
Fixed Function LEDs Function Keys Programable LEDs
Chapter 4
Configuration
44 44 44
45
1 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9
Chapter Overview Using the HMI Navigating the HMI Getting Started Default Display Default Display Navigation Entry Processing Alarms and Fault Records Menu Structure Changing the Settings Direct Access (The Hotkey menu)
47 48 49 49 50 51 52 52 53 54 55
2.9.1 2.9.2 2.9.3
Setting Group Selection Control Inputs CB Control
55 55 56
2.10 3 3.1 3.2
Function Keys Configuring the Data Protocols Courier Configuration DNP3 Configuration
56 58 58 59
3.2.1
DNP3 Configurator
60
3.3 3.4 3.5
IEC 60870-5-103 Configuration MODBUS Configuration IEC 61850 Configuration
61 62 63
3.5.1 3.5.2
IEC 61850 Configuration Banks IEC 61850 Network Connectivity
64 64
4 4.1 4.2 5 5.1 5.2 5.3 5.4 5.5 5.6
Date and Time Configuration Time Zone Compensation Daylight Saving Time Compensation Configuration Settings System Data Date and Time General Configuration Transformer Ratios System Configuration Security Configuration
65 65 65 67 67 71 72 75 76 77
Chapter 5
Current Protection Functions
79
1 2 2.1
Chapter Overview Overcurrent Protection Principles IDMT Characteristics
81 82 82
2.1.1 2.1.2 2.1.3 2.1.4 2.1.5
IEC60255 IDMTCurves European Standards North American Standards Differences Between the North american and European Standards Programmable Curves
83 84 85 86 86
2.2
Principles of Implementation
86
2.2.1
Timer Hold Facility
88
3 3.1 3.2 3.3
Phase Overcurrent Protection Phase Overcurrent Protection Implementation Non-Directional Overcurrent Logic Current Setting Threshold Selection
89 89 90 92
ii
P14D-B/G/L/Z-TM-EN-1
P14D
Contents
3.4 3.5
Timer Setting Selection Directional Element
92 93
3.5.1 3.5.2
Synchronous Polarisation Directional Overcurrent Logic
93 94
3.6 3.7 3.8
Overcurrent DDB signals Overcurrent Settings Application Notes
95 98 104
3.8.1 3.8.2 3.8.3 3.8.4
Parallel Feeders Ring Main Arrangements Setting Guidelines Setting Guidelines (Directional Element)
104 105 105 106
4 4.1
Voltage Dependent Overcurrent Element Voltage Dependent Overcurrent Protection Implementation
108 108
4.1.1 4.1.2
Voltage Controlled Overcurrent Protection Voltage Restrained Overcurrent Protection
109 109
4.2 4.3 4.4 4.5
Voltage Dependent Overcurrent Logic Voltage Dependent Overcurrent DDB signals Voltage Dependent Overcurrent Settings Application Notes
111 112 112 113
4.5.1
Setting Guidelines
113
5 5.1 5.2 5.3 5.4 5.5
Cold Load Pickup Cold Load Pickup CLP Logic CLP DDB signals CLP Settings Application Notes
114 114 115 115 116 118
5.5.1 5.5.2 5.5.3
CLP for Resistive Loads CLP for Motor Feeders CLP for Switch Onto Fault Conditions
118 118 119
6 6.1 6.2 6.3 7 7.1 7.2 7.3
Selective Overcurrent Logic Selective Logic Implementation Selective Overcurrent Logic Diagram Selective Overcurrent Logic Settings Negative Sequence Overcurrent Protection Negative Sequence Overcurrent Protection Implementation Non-Directional Negative Sequence Overcurrent Logic Directional Element
120 120 120 121 122 122 123 123
7.3.1
Directional Negative Sequence Overcurrent Logic
124
7.4 7.5 7.6
NPS Overcurrent DDB signals Negative Sequence Overcurrent Settings Application Notes
124 125 128
7.6.1 7.6.2 7.6.3
Setting Guidelines (Current Threshold) Setting Guidelines (Time Delay) Setting Guidelines (Directional element)
128 128 129
8 8.1 8.2 8.3 8.4
Earth Fault Protection Earth Fault Protection Elements Non-directional Earth Fault Logic IDG Curve Directional Element
130 130 131 131 132
8.4.1 8.4.2
Residual Voltage Polarisation Negative Sequence Polarisation
132 134
8.5 8.6 8.7 8.8
Measured and Derived Earth Fault DDB signals Earth Fault Protection 1 Settings Earth Fault Protection 2 Settings Application Notes
135 136 140 143
8.8.1 8.8.2
Setting Guidelines (Directional Element) Peterson Coil Earthed Systems
143 143
P14D-B/G/L/Z-TM-EN-1
iii
Contents
P14D
8.8.3
Setting Guidelines (Compensated networks)
147
9 9.1 9.2 9.3 9.4
Sensitive Earth Fault Protection SEF Protection Implementation Non-directional SEF Logic EPATR B Curve Directional Element
149 149 150 150 151
9.4.1 9.4.2 9.4.3
Wattmetric Characteristic Icos phi / Isin phi characteristic Directional SEF Logic
152 153 155
9.5 9.6 9.7
SEF DDB signals SEF Settings Application Notes
156 157 160
9.7.1 9.7.2
Insulated Systems Setting Guidelines (Insulated Systems)
160 162
10 10.1 10.2 10.3
Restricted Earth Fault Protection Restricted Earth Fault Protection Implementation REF Settings Application Notes
164 165 165 165
10.3.1 10.3.2 10.3.3 10.3.4
Biased Differential Protection Setting Guidelines for Biased Differential Operation High Impedance REF Setting Guidelines for High Impedance Operation
165 167 167 169
11 11.1 11.2 11.3 11.4 11.5 11.6 11.7
Thermal Overload Protection Single Time Constant Characteristic Dual Time Constant Characteristic Thermal Overload Protection Implementation Thermal Overload Protection Logic Thermal Overload DDB signals Thermal Overload Settings Application Notes
171 171 171 172 172 173 173 173
11.7.1 11.7.2
Setting Guidelines for Dual Time Constant Characteristic Setting Guidelines for Single Time Constant Characteristic
173 174
12 12.1 12.2 12.3 12.4 12.5
Broken Conductor Protection Broken Conductor Protection Implementation Broken Conductor Protection Logic Broken Conductor DDB Signals Broken Conductor Settings Application Notes
176 176 176 176 177 177
12.5.1
Setting Guidelines
177
13 13.1 13.2 13.3 13.4 13.5
Circuit Breaker Fail Protection Circiuit Breaker Fail Implementation Circiuit Breaker Fail Logic CB Fail DDB signals CB Fail Settings Application Notes
179 179 180 182 183 184
13.5.1 13.5.2 13.5.3
Reset Mechanisms for CB Fail Timers Setting Guidelines (CB fail Timer) Setting Guidelines (Undercurrent)
184 184 185
14 14.1 14.2 14.3 14.4 14.5 14.6
Blocked Overcurrent Protection Blocked Overcurrent Implementation Blocked Overcurrent Logic Blocked Earth Fault Logic Blocked Overcurrent DDB signals Blocked Overcurrent Settings Application Notes
186 186 186 186 187 188 189
14.6.1
Busbar Blocking Scheme
189
15
Second Harmonic Blocking
190
iv
P14D-B/G/L/Z-TM-EN-1
P14D
15.1 15.2 15.3 15.4 15.5
Contents
Second Harmonic Blocking Implementation Second Harmonic Blocking Logic Second Harmonic DDB signals Second Harmonic Settings Application Notes
190 192 192 193 193
15.5.1
Setting Guidelines
193
16 16.1 16.2 16.3 16.4 17 17.1
Load Blinders Load Blinder Implementation Load Blinder Logic Load Blinder DDB signals Load Blinder Settings High Impedance Fault Detection High Impedance Fault Protection Implementation
194 194 195 197 197 199 199
17.1.1 17.1.2 17.1.3 17.1.4
Fundamental Analysis Component Harmonic Analysis Directional Analysis Summary
199 200 200 201
17.2 17.3 17.4 18 18.1
High Impedance Fault Protection Logic High Impedance Protection DDB signals High Impedance Protection Settings Current Transformer Requirements Overcurrent and Earth Fault Protection
202 202 203 205 205
18.1.1 18.1.2
Directional Elements Non-directional Elements
205 206
18.2
SEF Protection (Residually Connected)
206
18.2.1 18.2.2
Directional Elements Non-directional Elements
206 206
18.3
SEF Protection (Core-Balanced CT)
207
18.3.1 18.3.2
Directional Elements Non-directional Elements
207 207
18.4 18.5 18.6
Low Impedance REF Protection High Impedance REF Protection Use of ANSI C-class CTs
207 208 208
Chapter 6
Voltage & Frequency Protection Functions
209
1 2 2.1 2.2 2.3 2.4 2.5
Chapter Overview Undervoltage Protection Undervoltage Protection Implementation Undervoltage Protection Logic Undervoltage DDB Signals Undervoltage Settings Application Notes
211 212 212 213 214 215 217
2.5.1
Undervoltage Seting Guidelines
217
3 3.1 3.2 3.3 3.4 3.5
Overvoltage Protection Overvoltage Protection Implementation Overvoltage Protection Logic Overvoltage DDB signals Overvoltage Settings Application Notes
218 218 219 220 221 222
3.5.1
Overvoltage Setting guidelines
222
4 4.1 4.2 4.3 4.4 5
Rate of Change of Voltage Protection Rate of Change of Voltage Protection Implementation Rate of Change of Voltage Logic dv/dt DDB signals dv/dt Settings Residual Overvoltage Protection
223 223 224 225 226 229
P14D-B/G/L/Z-TM-EN-1
v
Contents
P14D
5.1 5.2 5.3 5.4 5.5
Residual Overvoltage Protection Implementation Residual Overvoltage Logic Residual Overvoltage DDB signals Residual Overvoltage Settings Application Notes
229 230 230 231 232
5.5.1 5.5.2 5.5.3
Calculation for Solidly Earthed Systems Calculation for Impedance Earthed Systems Calculation for Impedance Earthed Systems
232 232 233
6 6.1 6.2 6.3 6.4 6.5
Negative Sequence Overvoltage Protection Negative Sequence Overvoltage Implementation Negative Sequence Overvoltage Logic Negative Sequence Overvoltage DDB signals Negative Sequence Overvoltage Settings Application Notes
234 234 234 235 235 235
6.5.1
Setting Guidelines
235
7 7.1 8 8.1 8.2 8.3
Frequency Protection Overview Frequency Protection Implementation Underfrequency Protection Underfrequency Protection Implementation Underfrequency Protection logic Application Notes
236 236 237 237 237 237
8.3.1
Setting Guidelines
237
9 9.1 9.2 9.3
Overfrequency Protection Overfrequency Protection Implementation Overfrequency Protection logic Application Notes
239 239 239 239
9.3.1
Setting Guidelines
239
10 10.1 10.2 10.3
Independent R.O.C.O.F Protection Indepenent R.O.C.O.F Protection Implementation Independent R.O.C.O.F Protection Logic Application Notes
241 241 242 242
10.3.1
Setting Guidelines
242
11 11.1 11.2 11.3
Frequency-supervised R.O.C.O.F Protection Frequency-supervised R.O.C.O.F Implementation Frequency-supervised R.O.C.O.F Logic Application Notes
244 244 245 245
11.3.1 11.3.2
Application Example Setting Guidelines
245 246
12 12.1 12.2 12.3
Average Rate of Change of Frequency Protection Average R.O.C.O.F Protection Implementation Average R.O.C.O.F Logic Application Notes
247 247 248 248
12.3.1
Setting Guidelines
248
13 13.1 13.2 13.3 13.4
Load Shedding and Restoration Load Restoration Implementation Holding Band Load Restoration Logic Application Notes
250 250 250 253 253
13.4.1
Setting Guidelines
253
14 15 16
Frequency Protection DDB signals Frequency Protection Settings Frequency Statistics
255 260 273
Chapter 7 1 2
vi
Power Protection Functions
Chapter Overview Overpower Protection
277 279 280
P14D-B/G/L/Z-TM-EN-1
P14D
Contents
2.1 2.2 2.3 2.4 2.5
Overpower Protection Implementation Overpower Logic Overpower DDB signals Overpower Settings Application Notes
280 281 281 282 283
2.5.1 2.5.2 2.5.3
Forward Overpower Setting Guidelines Reverse Power Considerations Reverse Overpower Setting Guidelines
283 283 284
3 3.1 3.2 3.3 3.4 3.5
Underpower Protection Underpower Protection Implementation Underpower Logic Underpower DDB signals Underpower Settings Application Notes
286 286 287 287 288 289
3.5.1 3.5.2
Low Forward Power Considerations Low Forward Power Setting Guidelines
289 290
4 4.1 4.2 4.3 4.4 4.5 4.6
Sensitive Power Protection Sensitive Power Protection Implementation Sensitive Power Measurements Sensitive Power Logic Sensitive Power DDB signals Sensitive Power Settings Application Notes
291 291 291 292 292 293 294
4.6.1 4.6.2
Sensitive Power Calculation Sensitive Power Setting Guidelines
294 295
Chapter 8 1 2 3 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 4.12 4.13 4.14 4.15 4.16 4.17 4.18 5 5.1 5.2 5.3 5.4 5.5 5.6
Autoreclose
Chapter Overview Introduction to 3-phase Autoreclose Implementation Autoreclose Function Inputs CB Healthy Block AR Reset Lockout AR Auto Mode AR Live Line Mode Telecontrol Mode Live/Dead Ccts OK (Live/Dead Circuits OK) AR Sys Checks (AR System Checks) Ext AR Prot Trip (External AR Protection Trip) Ext AR Prot Start(External AR Protection Start) DAR Complete (Delayed Autoreclose Complete) CB in Service (Circuit Breaker in Service) AR Restart DT OK To Start (Dead Time OK to Start) Dead Time Enabled AR Init Trip Test (Initiate Trip Test) AR Skip Shot 1 Inh Reclaim Time (Inhibit Reclaim Time) Autoreclose Function Outputs AR In Progress DAR In Progress Sequence Counter Status DDB signals Successful Close AR In Service AR Blk Main Prot (Block Main Protection)
P14D-B/G/L/Z-TM-EN-1
297 299 300 301 302 302 302 302 302 302 302 302 303 303 303 303 303 303 303 304 304 304 304 305 305 305 305 305 305 305
vii
Contents
P14D
5.7 5.8 5.9 5.10 5.11 5.12 5.13 5.14 5.15 5.16 5.17 6 6.1 6.2 6.3 7 7.1
AR Blk SEF Prot (Block SEF Protection) Reclose Checks DeadTime In Prog DT Complete (Dead Time Complete) AR Sync Check (AR Synchronisation Check) AR SysChecks OK (AR System Checks OK) Auto Close Protection Lockt (Protection Lockout) Reset Lckout Alm (Reset Lockout Alarm) Reclaim In Prog Reclaim Complete Autoreclose Function Alarms AR No Sys Check AR CB Unhealthy AR Lockout Autoreclose Operation Operating Modes
305 306 306 306 306 306 306 306 306 306 306 307 307 307 307 308 308
7.1.1 7.1.2
Four-Position Selector Switch Implementation Operating Mode Selection Logic
308 310
7.2
Autoreclose Initiation
310
7.2.1 7.2.2 7.2.3 7.2.4 7.2.5
Start Signal Logic Trip Signal Logic Blocking Signal Logic Shots Exceeded Logic AR Initiation Logic
311 312 313 314 314
7.3 7.4 7.5
Blocking Instantaneous Protection for Selected Trips Blocking Instantaneous Protection for Lockouts Dead Time Control
314 316 317
7.5.1
AR CB Close Control
318
7.6 7.7 7.8 7.9 7.10 7.11 8 9 10 10.1 10.2
AR System Checks Reclaim Timer Initiation Autoreclose Inhibit Autoreclose Lockout Sequence Co-ordination System Checks for First Reclose DDB Signals Settings Setting Guidelines Number of Shots Dead Timer Setting
319 320 321 322 324 325 326 329 334 334 334
10.2.1 10.2.2 10.2.3 10.2.4 10.2.5 10.2.6
Stability and Synchronism Requirements Operational Convenience Load Requirements Circuit Breaker Fault Deionisation Time Protection Reset Time
334 334 335 335 335 335
10.3
Reclaim Timer Setting
336
Chapter 9
Monitoring and Control
337
1 2 2.1 2.2
Chapter Overview Records Event Records Event Types
339 340 340 346
2.2.1 2.2.2 2.2.3
Opto-input Events Events Alarm Events
347 347 347
viii
P14D-B/G/L/Z-TM-EN-1
P14D
Contents
2.2.4 2.2.5 2.2.6 2.2.7 2.2.8
Protection Events Fault Record Events Maintenance Events Security Events Platform Events
350 350 350 350 352
2.3 2.4 2.5 3 4 4.1
Fault Records Maintenance Records View Records Column Disturbance Recorder Measurements Measured Quantities
352 352 353 357 359 359
4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6
Measured and Calculated Currents Measured and Calculated Voltages Power and Energy Quantities Demand Values Frequency Measurements Other Measurements
359 359 359 360 360 360
4.2 4.3 4.4 4.5 5 5.1
Measurement Setup Measurement Tables Measurement Table 2 Measurement Table 3 I/O Functions Function Keys
360 361 364 366 368 368
5.1.1 5.1.2
Function Key DDB Signals Function Key Settings
368 369
5.2
LEDs
370
5.2.1 5.2.2 5.2.3 5.2.4 5.2.5 5.2.6
Fixed Function LEDs Programable LEDs Function Key LEDs Trip LED Logic LED DDB Signals LED Conditioners
370 370 370 370 371 372
5.3
Opto-inputs
373
5.3.1 5.3.2 5.3.3 5.3.4
Opto-input Configuration Opto-input Labels Opto-input DDB Signals Enhanced Time Stamping
373 375 375 376
5.4
Output Relays
376
5.4.1 5.4.2 5.4.3
Output Relay Labels Output Relay DDB Signals Output Relay Conditioners
376 377 378
5.5
Control Inputs
379
5.5.1 5.5.2 5.5.3 5.5.4
Control Input Settings Control Input Configuration Control Input Labels Control Input DDB Signals
379 379 380 380
6 6.1 6.2 6.3
CB Condition Monitoring CB Condition Measurements CB Monitor Setup Application Notes
381 381 381 382
6.3.1 6.3.2 6.3.3 6.3.4
Setting the Thresholds for the Total Broken Current Setting the thresholds for the Number of Operations Setting the thresholds for the Operating Time Setting the Thresholds for Excesssive Fault Frequency
382 383 383 383
7 7.1 7.2 7.3
Circuit Breaker Control Local Control using the IED Menu Local Control using the Direct Access Keys Local Control using the Function Keys
384 384 385 386
P14D-B/G/L/Z-TM-EN-1
ix
Contents
7.4 7.5 7.6 7.7 7.8 7.9 8 8.1 9 9.1 9.2 9.3 9.4 9.5 9.6 9.7 10 10.1 10.2 10.3 10.4 10.5
P14D
Local Control using the Opto-inputs Remote Control Synchronisation Check CB Healthy Check CB Control Logic CB Control Settings CB State Monitoring CB State Monitoring Logic Voltage Transformer Supervision Loss of One orTwo Phase Voltages Loss of all Three Phase Voltages Absence of all Three Phase Voltages on Line Energisation VTS Implementation VTS Logic VTS DDB Signals VTS Settings Current Transformer Supervision CTS Implementation CTS Logic CTS DDB Signals CTS Settings Application Notes
386 387 387 387 388 388 391 392 393 393 393 393 394 394 396 396 398 398 398 399 399 399
10.5.1
Setting Guidelines
399
11 11.1 11.2 12 12.1 12.2 12.3 12.4 13 13.1 13.2 14 14.1
Pole Dead Function Pole Dead Logic Pole Dead DDB Signals DC Supply Monitor DC Supply Monitor Implementation DC Supply Monitor Logic DC Supply Monitor Settings DC Supply Monitor DDB Signals Fault Locator Fault Locator Settings Fault Locator Settings Example System Checks System Checks Implementation
400 400 401 402 402 403 403 404 405 405 405 407 407
14.1.1 14.1.2 14.1.3
Voltage Monitoring Check Synchronisation System Split
407 408 408
14.2 14.3 14.4 14.5 14.6
System Check Logic System Check PSL System Check Settings System Check DDB Signals Application Notes
409 410 410 412 413
14.6.1 14.6.2 14.6.3 14.6.4
Use of Check Sync 2 and System Split Slip Control Predictive Closure of Circuit Breaker Voltage and Phase Angle Correction
413 414 414 414
15 15.1
Trip Circuit Supervision Trip Circuit Supervision Scheme 1
416 416
15.1.1 15.1.2
Resistor Values PSL for TCS Scheme 1
416 417
15.2
Trip Circuit Supervision Scheme 2
417
15.2.1 15.2.2
Resistor Values PSL for TCS Scheme 2
418 418
15.3
Trip Circuit Supervision Scheme 3
419
15.3.1
Resistor Values
419
x
P14D-B/G/L/Z-TM-EN-1
P14D
Contents
15.3.2
PSL for TCS Scheme 3
420
15.4
Trip Circuit Supervision Scheme 4
420
15.4.1 15.4.2
Resistor Values PSL for TCS Scheme 4
421 421
Chapter 10 SCADA Communications 1 2 3 3.1 3.2
Chapter Overview Communication Interfaces Serial Communication Universal Serial Bus EIA(RS)485 Bus
423 425 426 427 427 427
3.2.1
EIA(RS)485 Biasing Requirements
428
3.3 4 5 6 6.1 6.2 6.3 6.4 6.5 6.6
K-Bus Standard Ethernet Communication Overview of Data Protocols Courier Physical Connection and Link Layer Courier Database Settings Categories Setting Changes Settings Transfer Event Extraction
428 430 431 432 432 432 432 432 433 433
6.6.1 6.6.2
Automatic Event Record Extraction Manual Event Record Extraction
433 433
6.7 6.8 6.9 6.10 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 8 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 9 9.1 9.2 9.3 9.4 9.5
Disturbance Record Extraction Programmable Scheme Logic Settings Time Synchronisation Configuration IEC 60870-5-103 Physical Connection and Link Layer Initialisation Time Synchronisation Spontaneous Events General Interrogation (GI) Cyclic Measurements Commands Test Mode Disturbance Records Command/Monitor Blocking Configuration DNP 3.0 Physical Connection and Link Layer Object 1 Binary Inputs Object 10 Binary Outputs Object 20 Binary Counters Object 30 Analogue Input Object 40 Analogue Output Object 50 Time Synchronisation Configuration MODBUS Physical Connection and Link Layer MODBUS Functions Response Codes Mapping Event Extraction
434 435 435 435 436 436 436 436 437 437 437 437 437 437 438 438 439 439 439 439 440 440 441 441 441 442 442 442 442 443 443
9.5.1
Automatic Event Record Extraction
443
P14D-B/G/L/Z-TM-EN-1
xi
Contents
P14D
9.5.2 9.5.3
Manual Event Record Extraction Record Data
444 444
9.6
Disturbance Record Extraction
445
9.6.1 9.6.2 9.6.3
Manual Extraction Procedure Automatic Extraction Procedure Extracting the disturbance data
446 447 449
9.7 9.8 9.9 9.10 9.11 10 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8
Setting Changes Protection Protection and Disturbance Recorder Settings Time Synchronisation Power and Energy Measurement Data Formats IEC 61850 Benefits of IEC 61850 IEC 61850 Interoperability The IEC 61850 Data Model IEC 61850 in MiCOM IEDs IEC 61850 Data Model Implementation IEC 61850 Communication Services Implementation IEC 61850 Peer-to-peer (GSSE) communications Mapping GOOSE Messages to Virtual Inputs
452 452 452 453 454 456 456 456 456 457 458 458 458 459
10.8.1
IEC 61850 GOOSE Configuration
459
10.9
Ethernet Functionality
459
10.9.1 10.9.2
Ethernet Disconnection Loss of Power
459 459
10.10 11 11.1 11.2 11.3 11.4 11.5 12 13 13.1 14 15 16
IEC 61850 Configurator Settings Read Only Mode IEC 60870-5-103 Protocol Courier Protocol IEC 61850 Protocol Read-Only Settings Read-Only DDB Signals Time Synchronisation Demodulated IRIG-B Demodulated IRIG-B Implementation SNTP Time Synchronsiation using the Communication Protocols Communication Settings
459 462 462 462 463 463 463 464 465 465 467 468 469
Chapter 11 Cyber-Security
473
1 2 3 3.1
Overview The Need for Cyber-Security Standards NERC Compliance
475 476 477 477
3.1.1 3.1.2 3.1.3 3.1.4 3.1.5 3.1.6 3.1.7 3.1.8
CIP 002 CIP 003 CIP 004 CIP 005 CIP 006 CIP 007 CIP 008 CIP 009
478 478 478 478 478 479 479 479
3.2 4 4.1 4.2
IEEE 1686-2007 Cyber-Security Implementation NERC-Compliant Display Four-level Access
479 481 481 482
4.2.1
Blank s
483
xii
P14D-B/G/L/Z-TM-EN-1
P14D
Contents
4.2.2 4.2.3
Rules Access Level DDBs
483 484
4.3
Enhanced Security
484
4.3.1 4.3.2 4.3.3
Strengthening Validation Blocking
484 484 485
4.4
Recovery
486
4.4.1 4.4.2
Recovery Encryption
486 487
4.5 4.6 4.7 4.8 5
Disabling Physical Ports Disabling Logical Ports Security Events Management Logging Out Cyber-Security Settings
487 487 488 490 491
Chapter 12 Settings Application Software 1 2 3 3.1 3.2 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 5 5.1 5.2
Chapter Overview Introduction Interface Tile Structure Menu Structure Getting Started Quick System Guide Data Models Set Up a System Connecting to an IED Front Port Connecting to an IED in a System Send Settings to a Device Extract Settings From a Device Extract a PSL File From a Device Extract a DNP3 File From a Device Extract an Events File From a Device Extract a Disturbance Record From a Device PSL Editor Loading Schemes from Files PSL Editor Toolbar
493 495 496 497 497 498 499 500 500 500 500 500 500 501 501 501 501 501 502 503 503
5.2.1
Logic Symbols
503
5.3
Logic Signal Properties
504
5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.3.6 5.3.7 5.3.8 5.3.9 5.3.10 5.3.11 5.3.12 5.3.13 5.3.14 5.3.15 5.3.16 5.3.17 5.3.18
Link Properties Opto Signal Properties Input Signal Properties Output Signal Properties GOOSE Input Signal Properties GOOSE Output Signal Properties Control Input Signal Properties InterMiCOM Input Properties InterMiCOM Output Properties Function Key Properties Fault Recorder Trigger Properties LED Signal Properties Signal Properties LED Conditioner Properties Conditioner Properties Timer Properties Gate Properties SR Programmable Gate Properties
505 505 505 505 505 506 506 506 506 507 507 507 507 507 508 508 508 508
6
IEC 61850 IED Configurator
510
P14D-B/G/L/Z-TM-EN-1
xiii
Contents
P14D
6.1 6.2 6.3 6.4 6.5
IEC 61850 IED Configurator Tool Features IEC 61850 IED Configurator Languages IEC 61850 Substation Configuration Files Opening a Preconfigured SCL File Opening a Template ICD File
510 510 511 512 512
6.5.1 6.5.2
Template Installed for Required IED Type Template not Installed for Required IED Type
512 512
6.6 6.7 6.8 6.9 6.10 6.11
Opening an Existing MCL Configuration File Configuring a MiCOM IED Reading or Editing IED Details Communications Setup Editing Communications Settings Simple Network Time Protocol (SNTP)
512 513 514 514 515 516
6.11.1 6.11.2
Configuring SNTP in the IED Configuring the SNTP Server
516 517
6.12 6.13 6.14 6.15 6.16 6.17 6.18 6.19 6.20 6.21 6.22 6.23 6.24 6.25 7 7.1 7.2 7.3 7.4 8 8.1 8.2 8.3 8.4
Editing Dataset Definitions GOOSE Publishing Configuration GOOSE Subricription Configuration Report Control Block configuration Controls Configuration Editing Measurement Configurations Editing Configurable Data Attributes Full Validation of IED Configuration Validation Summaries Managing SCL Schema Versions Configuration Banks Transfer of Configurations Exporting Installed ICD Template files Exporting Configured SCL Files DNP3 Configurator Preparing Files Offline to Send to an IED Send Settings to an IED Extract Settings From an IED View IED Settings Curve Tool Features Screen Layout Curve Selection Pane Curve Plot Pane
517 519 520 521 521 522 523 524 524 525 525 526 526 526 527 527 527 527 528 529 529 529 529 529
8.4.1 8.4.2
Zooming and Panning Scales and Grid Lines
530 530
8.5 8.6
Curve Details pane Curve Points Pane
530 530
8.6.1
Entering Values of Q and T into the Table
530
8.7 8.8 8.9 8.10 8.11
Input Table View Product View Formula Editor Curve Template Definitions Connecting to an IED
531 531 531 532 533
8.11.1 8.11.2
Connecting to a Serial Port Connecting to the Ethernet Port
533 534
8.12 8.13 9 9.1 9.2 9.3
Send a Curve to an IED Extract a Curve from an IED S&R Courier Set Up IED Communication Create a New Communication Setup Open a Connection
534 534 535 535 535 536
xiv
P14D-B/G/L/Z-TM-EN-1
P14D
Contents
9.4 9.5 9.6 9.7 10 10.1
Create a New or Default IED DNP 3.0 File Extract a Settings File From a Device Save a Settings File Send a Settings File to a Device AEDR2 Initialisation File
536 536 536 536 537 537
10.1.1 10.1.2 10.1.3 10.1.4
Common Section Courier Section IEC 60870-5-103 Section IEC 60870-5-103 Section
537 538 539 540
10.2 10.3 10.4 10.5 10.6 10.7 11 11.1 12 12.1 12.2 13 13.1 13.2 13.3 13.4 13.5
IEC 60870-5-103 Section Operation Disturbance Record Files Operation Using the Scheduled Tasks Program Scheduled Tasks Program Tutorial WinAEDR2 Functions Wavewin File Manager Features Save as Comtrade Device (Menu) Text Editor Open a Connection Change Connection Open a Menu Text File as a Reference Edit Text File of Device Send Edited Text File to Device
540 541 541 541 542 542 544 544 545 545 545 547 547 547 547 547 547
Chapter 13 Scheme Logic 1 2 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11
Chapter Overview Introduction to the Scheme Logic Fixed Scheme Logic Any Start Logic VTS Acceleration Indication Logic CB Fail SEF Protection Logic CB Fail Non Current Protection Logic Composite Earth Fault Start Logic Any Trip Logic SEF Any Start Logic Programmable Scheme Logic Trip Output Mappings Opto-Input Mappings Output Relay Mappings LED Mappings Control Input Mappings Function Key Mappings Circuit Breaker Mapping Fault Record Trigger Mapping High Impedeance Fault Protection Mappings Check Synchronisation and Voltage Monitor Mappings Settings
Chapter 14 Installation 1 2
Chapter Overview Handling the Goods
P14D-B/G/L/Z-TM-EN-1
549 551 552 554 555 556 556 557 558 558 558 559 560 561 562 562 563 563 563 563 564 564 564
567 569 570
xv
Contents
2.1 2.2 2.3 2.4 3 3.1
P14D
Receipt of the Goods Unpacking the Goods Storing the Goods Dismantling the Goods Mounting the Device Flush Mounting
570 570 570 570 571 571
3.1.1
Rack Mounting
572
3.2
K-Series Retrofit
573
3.2.1
Conventions
575
3.3 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 4.12 4.13 5
Software Only Cables and Connectors Terminal Blocks Power Supply Connections Earth Connnection Current Transformers Voltage Transformer Connections Watchdog Connections EIA(RS)485 and K-Bus Connections IRIG-B Connection Opto-input Connections Output Relay Connections Ethernet Metallic Connections Ethernet Fibre Connections USB Connection Case Dimensions
575 577 577 578 578 578 579 579 579 580 580 580 580 580 581 582
Chapter 15 Commissioning Instructions
585
1 2 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 4 4.1 4.2 5 5.1
Chapter Overview General Guidelines Commissioning Test Menu Opto I/P Status Cell (Opto-input Status) Relay O/P Status Cell (Relay Output Status) Test Port Status Cell Monitor Bit 1 to 8 Cells Test Mode Cell Test Pattern Cell Test Cell Test LEDs Cell Test Autoreclose Cell Red and Green LED Status Cells Commissioning Equipment Minimum Equipment Required Optional Equipment Required Product Checks Product Checks with the IED De-energised
587 588 589 589 589 589 589 589 590 590 590 590 591 592 592 592 593 593
5.1.1 5.1.2 5.1.3 5.1.4 5.1.5
Visual Inspection Insulation External Wiring Watchdog s Power Supply
593 594 594 594 595
5.2
Product Checks with the IED Energised
595
5.2.1 5.2.2 5.2.3 5.2.4 5.2.5
Watchdog s Test LCD Date and Time Test LEDs Test Alarm and Out-of-Service LEDs
595 595 596 596 596
xvi
P14D-B/G/L/Z-TM-EN-1
P14D
Contents
5.2.6 5.2.7 5.2.8 5.2.9 5.2.10 5.2.11 5.2.12 5.2.13 5.2.14
Test Trip LED Test -programmable LEDs Test Opto-inputs Test Output Relays Test Serial Communication Port RP1 Test Serial Communication Port RP2 Test Ethernet Communication Test Current Inputs Test Voltage Inputs
596 596 597 597 597 599 599 599 600
6 6.1
Setting Checks Apply Application-specific Settings
601 601
6.1.1 6.1.2
Transferring Settings from a Settings File Entering settings using the HMI
601 601
7 7.1 7.2 7.3 7.4 8 8.1 8.2 8.3 9
Protection Timing Checks Overcurrent Check Connecting the Test Circuit Performing the Test Check the Operating Time Onload Checks Confirm Current Connections Confirm Voltage Connections On-load Directional Test Final Checks
603 603 603 603 603 605 605 605 606 607
Chapter 16 Maintenance and Troubleshooting
609
1 2 2.1
Chapter Overview Maintenance Maintenance Checks
611 612 612
2.1.1 2.1.2 2.1.3 2.1.4
Alarms Opto-isolators Output Relays Measurement Accuracy
612 612 612 612
2.2 2.3 3 3.1 3.2 3.3 3.4 3.5 3.6
Replacing the Unit Cleaning Troubleshooting Self-Diagnostic Software Power-up Errors Error Message or Code on Power-up Out of Service LED on at power-up Error Code during Operation Mal-operation during testing
613 613 614 614 614 614 615 615 615
3.6.1 3.6.2 3.6.3
Failure of Output s Failure of Opto-inputs Incorrect Analogue Signals
615 616 616
3.7
PSL Editor Troubleshooting
616
3.7.1 3.7.2
Diagram Reconstruction PSL Version Check
616 617
3.8
Repair and Modification Procedure
617
Chapter 17 Technical Specifications 1 2 2.1 2.2 2.3 2.4
Chapter Overview Interfaces Front USB Port Rear Serial Port 1 Rear Serial Port 2 IRIG-B Port
P14D-B/G/L/Z-TM-EN-1
619 621 622 622 622 622 622
xvii
Contents
P14D
2.5
Rear Ethernet Port - Fibre
623
2.5.1 2.5.2
100 Base FX Receiver Characteristics 100 Base FX Transmitter Characteristics
623 623
2.6 3 3.1
Rear Ethernet Port Copper Current Protection Functions Three-Phase CurrentProtection
623 625 625
3.1.1
Directional Parameters
625
3.2 3.3 3.4 3.5
Earth Fault Protection (Measured) Earth Fault Protection (Derived) Earth Fault Directionalisation Sensitive Earth Fault Protection
625 625 626 626
3.5.1
SEF Directionalisation
627
3.6 3.7
Restricted Earth Fault Protection Negative Sequnce Overcurrent Protection
627 628
3.7.1
Directional Parameters
628
3.8 3.9 3.10 3.11 3.12 3.13 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 5 5.1 5.2 6 6.1 6.2 6.3 6.4 6.5 6.6 7 7.1 7.2 7.3 7.4 8 8.1 8.2 8.3 8.4 9 9.1 9.2
Circuit Breaker Fail and Undercurrent Protection Broken Conductor Protection Thermal Overload Protection Cold Load Pickup Protection Selective Overcurrent Protection Voltage Dependent Overcurrent Protection Voltage and Frequency Protection Functions Undervoltage Protection Overvoltage Protection Residual Overvoltage Protection Negative Sequence Voltage Protection Rate of Change of Voltage Protection Overfrequency Protection Underfrequency Protection Supervised Rate of Change of Frequency Protection Independent Rate of Change of Frequency Protection Average Rate of Change of Frequency Protection Load Restoration Power Protection Functions Overpower / Underpower Sensitive Power Monitoring and Control Voltage Transformer Supervision Current Transformer Supervision CB State and Condition Monitoring PSL Timers Check Synchronisation DC Supply Monitor Measurements and Recording General Disturbance Records Event, Fault and Maintenance Records Fault Locator Standards Compliance EMC Compliance: 2004/108/EC Product Safety: 2006/95/EC R&TTE Compliance UL/CUL Compliance Mechanical Specifications Physical Paramters Enclosure Protection
628 628 628 629 629 629 630 630 630 630 631 631 631 632 632 632 633 633 634 634 634 635 635 635 635 635 635 635 637 637 637 637 637 638 638 638 638 638 639 639 639
xviii
P14D-B/G/L/Z-TM-EN-1
P14D
9.3 9.4 10 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9
Contents
Mechanical Specifications Transit Packaging Performance Ratings AC Measuring Inputs Current Transformer Inputs Voltage Transformer Inputs Auxiliary Supply Voltage Nominal Burden Power Supply Interruption Output s Watchdog s Isolated Digital Inputs
639 639 640 640 640 640 640 640 641 641 642 642
10.9.1
Nominal Pickup and Reset Thresholds
642
11 11.1 11.2 11.3 11.4 12 12.1 12.2 12.3 12.4 13 13.1 13.2 13.3 13.4 13.5 13.6 13.7 13.8 13.9 13.10 13.11 13.12 13.13 13.14
Environmental Conditions Ambient Temperature Range Temperature Endurance Test Ambient Humidity Range Corrosive Environments Type Tests Insulation Creepage Distances and Clearances High Voltage (Dielectric) Withstand Impulse Voltage Withstand Test Electromagnetic Compatibility 1 MHz Burst High Frequency Disturbance Test Damped Oscillatory Test Immunity to Electrostatic Discharge Electrical Fast Transient or Burst Requirements Surge Withstand Capability Surge Immunity Test Immunity to Radiated Electromagnetic Energy Radiated Immunity from Digital Communications Radiated Immunity from Digital Radio Telephones Immunity to Conducted Disturbances Induced by Radio Frequency Fields Magnetic Field Immunity Conducted Emissions Radiated Emissions Power Frequency
643 643 643 643 643 644 644 644 644 644 645 645 645 645 645 645 646 646 646 646 646 647 647 647 647
Appendix A Symbols and Glossary 1 2 3 4 5 6 7
649
Chapter Overview Acronyms and Abbreviations Units for Digital Communications American Vs British English Terminology Logic Symbols and Logic Timers Logic Gates
651 652 658 659 660 664 666
Appendix B Commissioning Record
667
1 1.1 1.2 1.3 1.4 1.5
Test Record Engineer Details Front Plate Information Test Equipment Tests with Product De-energised Tests with Product Energised
P14D-B/G/L/Z-TM-EN-1
669 669 669 669 669 670
xix
Contents
1.6 1.7 1.8 1.9 1.10 1.11
P14D
Communication Tests Current Input Tests Voltage Input Tests Overcurrent Checks On-load Checks On-load Checks
Appendix C Wiring Diagrams 1 2 3 4 5 6 7 8 9 10 11 12 13
xx
Appendix Overview I/O Option A I/O Option A with SEF I/O Option A with Ethernet I/O Option A with Ethernet and SEF I/O Option B with 2 Rear Ports I/O Option B with 2 Rear Ports and SEF I/O Option C with TCS I/O Option C with TCS and SEF I/O Option D I/O Option D with SEF KCEG142 Retrofit I/O Option A with NVD Input
670 670 670 671 671 671
673 675 676 677 678 679 680 681 682 683 684 685 686 687
P14D-B/G/L/Z-TM-EN-1
Table of Figures Figure 1:
Functional Overview
11
Figure 2:
Hardware design overview
28
Figure 3:
Exploded view of IED
30
Figure 4:
30TE Three-MIDOS block rear
31
Figure 5:
30TE Two-MIDOS block + communications rear
32
Figure 6:
30TE Two-MIDOS block + blanking plate
32
Figure 7:
P14D with I/O option A
33
Figure 8:
P14D with I/O option A + Ethernet communications
35
Figure 9:
P14D with I/O option B
36
Figure 10:
P14D with I/O option C
38
Figure 11:
P14D with I/O option D
40
Figure 12:
Front (30TE)
42
Figure 13:
Menu navigation
49
Figure 14:
Default display navigation
51
Figure 15:
IEC 60255 IDMT curves
84
Figure 16:
Principle of Protection Function Implementation
87
Figure 17:
Non-directional Overcurrent Logic Diagram
90
Figure 18:
Selecting the current threshold setting
92
Figure 19:
Selecting the timer settings
93
Figure 20:
Directional Overcurrent Logic Diagram
94
Figure 21:
Typical distribution system using parallel transformers
104
Figure 22:
Typical ring main with associated overcurrent protection
105
Figure 23:
Modification of current pickup level for voltage controlled overcurrent protection
109
Figure 24:
Modification of current pickup level for voltage restrained overcurrent protection
110
Figure 25:
Voltage dependant overcurrent logic (Phase A to phase B)
111
Figure 26:
Cold Load Pickup logic
115
Figure 27:
Selective Overcurrent Logic
120
Figure 28:
Negative Sequence Overcurrent logic - non-directional operation
123
Figure 29:
Negative Sequence Overcurrent logic - directional operation
124
Figure 30:
Non-directional EF logic (single stage)
131
Figure 31:
IDG Characteristic
132
Figure 32:
Directional EF logic with neutral voltage polarization (single stage)
133
Figure 33:
Directional Earth Fault logic with negative sequence polarisation (single stage)
135
Figure 34:
Current distribution in Petersen Coil earthed system
144
Figure 35:
Distribution of currents during a C phase to earth fault
145
Figure 36:
Theoretical case - no resistance present in XL or XC
145
Figure 37:
Zero sequence network showing residual currents
146
Figure 38:
Practical case - resistance present in XL and Xc
147
Table of Figures
P14D
Figure 39:
Non-directional SEF logic
150
Figure 40:
EPATR B characteristic shown for TMS = 1.0
151
Figure 41:
Types of directional control
152
Figure 42:
Resistive components of spill current
152
Figure 43:
Operating characteristic for Icos
154
Figure 44:
Directional SEF with VN polarisation (single stage)
155
Figure 45:
EL00627 Current distribution in an insulated system with C phase fault
161
Figure 46:
EL00628 Phasor diagrams for insulated system with C phase fault
162
Figure 47:
Positioning of core balance current transformers
163
Figure 48:
REF protection for delta side
164
Figure 49:
REF protection for star side
164
Figure 50:
REF bias principle
166
Figure 51:
REF bias characteristic
167
Figure 52:
High Impedance principle
168
Figure 53:
High Impedance REF connectivity
169
Figure 54:
Thermal overload protection logic diagram
172
Figure 55:
Dual time constant thermal characteristic
174
Figure 56:
Broken conductor logic
176
Figure 57:
Circuit Breaker Fail Logic - three phase start
180
Figure 58:
Circuit Breaker Fail Logic - single phase start
181
Figure 59:
Blocked Overcurrent logic
186
Figure 60:
Blocked Earth Fault logic
187
Figure 61:
Simple busbar blocking scheme
189
Figure 62:
Simple busbar blocking scheme characteristics
189
Figure 63:
2nd Harmonic Blocking Logic
192
Figure 64:
Load blinder and angle
194
Figure 65:
Load Blinder logic 3phase
195
Figure 66:
Load Blinder logic phase A
196
Figure 67:
HIF Protection Logic
202
Figure 68:
Undervoltage - single and three phase tripping mode (single stage)
213
Figure 69:
Overvoltage - single and three phase tripping mode (single stage)
219
Figure 70:
Rate of Change of Voltage protection logic
224
Figure 71:
Residual overvoltage logic
230
Figure 72:
Residual voltage for a solidly earthed system
232
Figure 73:
Residual voltage for an impedance earthed system
233
Figure 74:
Negative Sequence Overvoltage logic
234
Figure 75:
Underfrequency logic (single stage)
237
Figure 76:
Overfrequency logic (single stage)
239
Figure 77:
Power system segregation based upon frequency measurements
240
Figure 78:
Independent rate of change of frequency logic (single stage)
242
xxii
P14D-B/G/L/Z-TM-EN-1
P14D
Table of Figures
Figure 79:
Frequency-supervised rate of change of frequency logic (single stage)
245
Figure 80:
Frequency supervised rate of change of frequency protection
246
Figure 81:
Average rate of change of frequency characteristic
247
Figure 82:
Average rate of change of frequency logic (single stage)
248
Figure 83:
Load restoration with short deviation into holding band
251
Figure 84:
Load restoration with long deviation into holding band
252
Figure 85:
Load Restoration logic
253
Figure 86:
Overpower logic
281
Figure 87:
Underpower logic
287
Figure 88:
Sensitive Power logic diagram
292
Figure 89:
Sensitive Power input vectors
294
Figure 90:
Four-position selector switch implementation
309
Figure 91:
Autoreclose mode select logic
310
Figure 92:
Start signal logic
311
Figure 93:
Trip signal logic
312
Figure 94:
Blocking signal logic
313
Figure 95:
Shots Exceeded logic
314
Figure 96:
AR initiation logic
314
Figure 97:
Blocking instantaneous protection for selected trips
315
Figure 98:
Blocking instantaneous protection for lockouts
317
Figure 99:
Dead Time Control logic
318
Figure 100:
AR CB Close Control logic
319
Figure 101:
AR System Check logic
320
Figure 102:
Reclaim Time logic
321
Figure 103:
AR Initiation inhibit
322
Figure 104:
Overall Lockout logic
323
Figure 105:
Lockout for protection trip when AR is not available
324
Figure 106:
Trip LED logic
371
Figure 107:
Direct Access menu navigation
385
Figure 108:
Default function key PSL
386
Figure 109:
Remote Control of Circuit Breaker
387
Figure 110:
CB Control logic
388
Figure 111:
CB State Monitoring logic
392
Figure 112:
VTS logic
395
Figure 113:
CTS logic diagram
398
Figure 114:
Pole Dead logic
400
Figure 115:
DC Supply Monitor zones
402
Figure 116:
DC Supply Monitor logic
403
Figure 117:
System Check logic
409
Figure 118:
System Check PSL
410
P14D-B/G/L/Z-TM-EN-1
xxiii
Table of Figures
P14D
Figure 119:
TCS Scheme 1
416
Figure 120:
PSL for TCS Scheme 1
417
Figure 121:
TCS Scheme 2
418
Figure 122:
PSL for TCS Scheme 2
418
Figure 123:
TCS Scheme 3
419
Figure 124:
PSL for TCS Scheme 3
420
Figure 125:
TCS Scheme 4
420
Figure 126:
PSL for TCS Scheme 4
421
Figure 127:
RS485 biasing circuit
428
Figure 128:
Remote communication using K-Bus
429
Figure 129:
Control input behaviour
440
Figure 130:
Manual selection of a disturbance record
447
Figure 131:
Automatic selection of disturbance record - method 1
448
Figure 132:
Automatic selection of disturbance record - method 2
449
Figure 133:
Configuration file extraction
450
Figure 134:
Data file extraction
451
Figure 135:
Data model layers in IEC61850
457
Figure 136:
GPS Satellite timing signal
465
Figure 137:
Default display navigation
482
Figure 138:
Tile structure
497
Figure 139:
Menu structure
498
Figure 140:
499
Figure 141:
Flowchart showing how S1 Agile can be used to set up and save a protection system offline or online. Examples of how to set Red, Green and Yellow LEDs
Figure 142:
IEC 61850 project configuration
511
Figure 143:
Scheme Logic Interfaces
552
Figure 144:
Any Start Logic
555
Figure 145:
VTS Acceleration Indication Logic
556
Figure 146:
CB Fail SEF Protection Logic
556
Figure 147:
CB Fail Non Current Protection Logic
557
Figure 148:
Composite Earth Fault Start Logic
558
Figure 149:
Any Trip Logic
558
Figure 150:
SEF Any Start Logic
558
Figure 151:
Trip Output Mappings
560
Figure 152:
Opto-Input Mappings
561
Figure 153:
Output Relay Mappings
562
Figure 154:
LED Mappings
562
Figure 155:
Control Input Mappings
563
Figure 156:
Function Key Mappings
563
Figure 157:
Circuit Breaker mapping
563
xxiv
507
P14D-B/G/L/Z-TM-EN-1
P14D
Table of Figures
Figure 158:
Fault Record Trigger mapping
563
Figure 159:
High Impedance Fault Protection Mappings
564
Figure 160:
Check Synchronisation and Voltage Monitor mappings
564
Figure 161:
Rack mounting of products
572
Figure 162:
Inserting cradle into case
573
Figure 163:
Spring-loaded CT shorting s
574
Figure 164:
MiDOS terminal block
577
Figure 165:
Earth link for cable screen
579
Figure 166:
20TE case dimensions
582
Figure 167:
30TE case dimensions
583
Figure 168:
RP1 physical connection
598
Figure 169:
Remote communication using K-bus
598
Figure 170:
Logic Gates
666
Figure 171:
P14D Directional IED with 8 inputs and 8 outputs
676
Figure 172:
P14D Directional IED with 8 inputs, 8 outputs and SEF option
677
Figure 173:
P14D Directional IED with 8 inputs, 8 outputs and Ethernet
678
Figure 174:
P14D Directional IED with 8 inputs, 8 outputs, Ethernet and SEF option
679
Figure 175:
P14D Directional IED with 11 inputs, 12 outputs and two rear ports
680
Figure 176:
P14D Directional IED with 11 inputs, 12 outputs, 2 rear ports and SEF option
681
Figure 177:
P14D Directional IED with 11 inputs and 12 outputs, for Trip Circuit Supervision
682
Figure 178:
683
Figure 179:
P14D Directional IED with 11 inputs, 12 outputs and SEF option, for trip Circuit Supervision P14D Directional IED with 13 inputs and 12 outputs
Figure 180:
P14D Directional IED with 13 inputs , 12 outputs and SEF option
685
Figure 181:
P14D Directional IED with 8 inputs and 8 outputs for KCEG142 retrofit applications P14D Directional IED with 8 inputs, 8 outputs and NVD input
686
Figure 182:
P14D-B/G/L/Z-TM-EN-1
684
687
xxv
Table of Figures
xxvi
P14D
P14D-B/G/L/Z-TM-EN-1
INTRODUCTION CHAPTER 1
Chapter 1 - Introduction
2
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 1 - Introduction
CHAPTER OVERVIEW
This chapter contains the following sections: Chapter Overview Foreword Features and Functions Compliance Functional Overview Ordering Options
P14D-B/G/L/Z-TM-EN-1
3 4 7 10 11 12
3
Chapter 1 - Introduction
2
P14D
FOREWORD
This technical manual provides a functional and technical description of Alstom Grid's P14D, as well as a comprehensive set of instructions for using the device. We have attempted to make this manual as accurate, comprehensive and -friendly as possible. However we cannot guarantee that it is free from errors. Nor can we state that it cannot be improved. We would therefore be very pleased to hear from you if you discover any errors, or have any suggestions for improvement. All should be sent to our centre via the following URL: http://www.alstom.com/grid/centre/
2.1
TARGET AUDIENCE
This manual is aimed towards all professionals charged with installing, commissioning, maintaining, troubleshooting, or operating any of the products within the specified product range. This includes installation and commissioning personnel as well as engineers who will be responsible for operating the product. The level at which this manual is written assumes that installation and commissioning engineers have knowledge of handling electronic equipment and that system and protection engineers have a thorough knowledge of protection systems and associated equipment.
2.2
TYPOGRAPHICAL CONVENTIONS
The following typographical conventions are used throughout this manual. ● The names for special keys and function keys appear in capital letters. For example: ENTER ● When describing software applications, menu items, buttons, labels etc as they appear on the screen are written in bold type. For example: Select Save from the file menu. ● Menu hierarchies in documentation describing software applications use the > sign to indicate the next level For example: Select File > Save ● Filenames and paths use the courier font For example: Example\File.text ● Special terminology is written with leading capitals For example: Sensitive Earth Fault ● When reference is made to Alstom Grid's Courier database, the column text is written in upper case For example: The SYSTEM DATA column ● When reference is made to Alstom Grid's Courier database, the cell text is written in bold type For example: The Language cell in the SYSTEM DATA column ● When reference is made to Alstom Grid's Courier database, the value of a cell's content is enclosed in single quotation marks For example: The Language cell in the SYSTEM DATA column contains the value 'English'
2.3
NOMENCLATURE
Due to the technical nature of this manual, many special , abbreviations and acronyms are used throughout the manual. Some of these are well-known industry-specific while others may be special product-specific used by Alstom Grid. A glossary at the back of this manual provides a complete description of all special used throughout the manual.
4
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 1 - Introduction
We would like to highlight the following changes of nomenclature however: ● The word 'relay' is no longer used for the device itself. Instead, the device is referred to as an 'IED' (Intelligent Electronic Device), the 'device', the 'product', or the 'unit'. The word 'relay' is used purely to describe the electromechanical components within the device, i.e. the output relays. ● British English is used throughout this manual. ● The British term 'Earth' is used in favour of the American term 'Ground'.
2.4
MANUAL STRUCTURE
The manual consists of the following chapters: ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ●
2.5
Chapter 1: Introduction Chapter 2: Safety Information Chapter 3: Hardware Design Chapter 4: Configuration Chapter 5: Current Protection Functions Chapter 6: Voltage and Frequency Protection Functions Chapter 7: Power Protection Functions Chapter 8: Autoreclose Functions Chapter 9: Monitoring and Control Functions Chapter 10: Communications Chapter 11: Cyber Security Chapter 12: Settings Application Software Chapter 13: Scheme Logic Chapter 14: Installation Chapter 15: Commissioning Instructions Chapter 16: Maintenance & Troubleshooting Chapter 17: Technical Specifications Appendix A: Symbols and Glossary Appendix B: Commissioning Record Forms Appendix C: Wiring diagrams
PRODUCT SCOPE
The P14D feeder management IED has been designed for the protection of a wide range of overhead lines and underground cables. The P14D provides integral directional and non-directional overcurrent, overvoltage and earth-fault protection and is suitable for application on solidly earthed, impedance earthed, Petersen coil earthed, and isolated systems. In addition to the protection features, the devices include a comprehensive range of other features and measurements and recording facilities to aid with power system diagnosis and fault analysis. The P14D can be used in various applications, depending on the chosen firmware. There are four different models according to which firmware is installed: P14DB, P14DG, P14DL, P14DZ ● ● ● ●
The P14DB is the base device for general application The P14DG is for small generator applications The P14DL is for line protection The P14DZ is for high impedance earth fault applications
The P14D IED is supplied with the following hardware:
P14D-B/G/L/Z-TM-EN-1
5
Chapter 1 - Introduction
P14D
Item
Details
Case
30TE
Number of CT Inputs (1A or 5A)
4 (1 of these can be chosen to be standard or sensitive)
Number of VT inputs
4
Optically coupled digital inputs
8 to 13, depending on chosen options
Standard relay output s
8 to 12, depending on chosen options
Programmable function keys
3
Programmable LEDs
8
6
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 1 - Introduction
3
FEATURES AND FUNCTIONS
3.1
PROTECTION FUNCTIONS
The P14D models offer the following protection functions: ANSI
IEC61850
37 46
NgTOC
46BC 49
ThmPTTR
50 SOTF
Protection Function
P14DB
P14DG
P14DL
P14DZ
Undercurrent detection (low load)
Yes
Yes
Yes
Yes
Negative sequence overcurrent
Yes
Yes
Yes
Yes
Broken Conductor
Yes
Yes
Yes
Yes
Thermal Overload
Yes
Yes
Yes
Yes
Switch onto Fault
Yes
Yes
Yes
Yes
50BF
RBRF
CB Failure
Yes
Yes
Yes
Yes
50
OPTOC
Definite time overcurrent protection
6 stages
6 stages
6 stages
6 stages
50N
EfdPTOC
Neutral/Ground Definite time overcurrent protection Measured and Derived (standard EF CT), Derived (SEF CT)
4 stages
4 stages
4 stages
4 stages
51
OPTOC
IDMT overcurrent protection (stages)
Yes
Yes
Yes
Yes
51N
EfdPTOC
Neutral/Ground IDMT overcurrent protection
Yes
Yes
Yes
Yes
67
OPTOC
Directional Phase Overcurrent
Yes
Yes
Yes
Yes
67N
EfdPTOC
Directional Neutral Overcurrent
Yes
Yes
Yes
Yes
>Wattmetric Earth Fault
Yes
Yes
Yes
Yes
Cold load pick up
Yes
Yes
Yes
Yes
VT supervision
Yes
Yes
Yes
Yes
CT supervision
Yes
Yes
Yes
Yes
Restricted Earth Fault
Yes
Yes
Yes
Yes
Sensitive Earth Fault (with SEF CT only)
Yes
Yes
Yes
Yes
2nd Harmonic Blocking
Yes
Yes
Yes
Yes
Undervoltage
3 stages
3 stages
3 stages
3 stages
Negative sequence overvoltage
Yes
Yes
Yes
Yes
VTS CTS 64N
RefPDIF
68 27
VtpPhsPTUV
47 59
VtpPhsPTOV
Overvoltage
3 stages
3 stages
3 stages
3 stages
59N
VtpResPTOV
Residual Overvoltage
3 stages
3 stages
3 stages
3 stages
81O
FrqPTOF
Overfrequency
Yes
Yes
Yes
Yes
81U
FrqPTUF
Underfrequency
Yes
Yes
Yes
Yes
Rate of change of frequency (df/dt)
Yes
Yes
Yes
Yes
Undervoltage blocking of frequency protection
Yes
Yes
Yes
Yes
Programmable curves
Yes
Yes
Yes
Yes
Voltage Controlled Overcurrent
Yes
Yes
Yes
Yes
Voltage Restrained Overcurrent
No
Yes
Yes
Yes
25
Check synchronising
No
Yes
Yes
Yes
32
Phase Directional Power
No
Yes
Yes
Yes
Sensitive power
No
Yes
Yes
Yes
Load Encroachment supervision (Load Blinders)
No
No
Yes
Yes
81df/dt 81V
DfpPFRC
51V
P14D-B/G/L/Z-TM-EN-1
7
Chapter 1 - Introduction
ANSI 79
P14D
IEC61850 RREC
21FL
Protection Function
P14DB
P14DG
P14DL
P14DZ
Autoreclose (3 phases)
No
No
4 shots
4 shots
Fault Locator
No
No
Yes
Yes
81RF
DfpPFRC
Frequency supervised rate of change of frequency
No
No
Yes
Yes
81RAV
DfpPFRC
Frequency supervised average rate of change of frequency No
No
Yes
Yes
Load Restoration
No
No
Yes
Yes
Rate of change of voltage (dv/dt)
No
No
4 stages
4 stages
Blocking scheme
Yes
Yes
Yes
Yes
Programmable curves
Yes
Yes
Yes
Yes
High Impedance Earth Fault
No
No
No
Yes
CB Monitoring
Yes
Yes
Yes
Yes
Latching output s (Lockout)
Yes
Yes
Yes
Yes
81R
86
3.2
CONTROL FUNCTIONS
The device offers the following control functions: ● ● ● ●
Programmable Scheme Logic (PSL) Trip circuit supervision (TCS) 4 x Setting groups Watchdog s (1NO and 1NC)
● Self-monitoring (diagnostics) ● Manual CB control (local/remote) ● Read Only Mode
3.3
MEASUREMENT FUNCTIONS
The device offers the following measurement functions: Measurement Function Measurements (Exact range of measurements depend on the device model)
Details -
Measured currents and calculated sequence and RMS currents Measured voltages and calculated sequence and RMS voltages Power and energy quantities Peak, fixed and rolling demand values Frequency measurements Others measurements
Disturbance records (waveform capture, oscillography) Channels / duration each or total / samples per cycle
9 / 10, 5 / 24
Fault Records
10
Maintenance Records
10
Event Records / Event logging
2048
Time Stamping of Opto-inputs
Yes
3.4
COMMUNICATION FUNCTIONS
The device offers the following communication functions:
8
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 1 - Introduction
Communication Function
Details
Local HMI
Yes
Multi-language HMI (English, French, German, Italian, Portuguese, Spanish, Russian)
Yes
Front port
USB
1st rear port
RS485 or IRIG-B
2nd rear port (optional)
RS485 or IRIG-B
Protocols available
IEC60870-5-103, IEC 61850, MODBUS, Courier, DNP3, DNP3 over Ethernet
IEC61850 available
option
Virtual inputs
32
Cyber security
Yes
Enhanced Studio (S1 Agile)
Yes
P14D-B/G/L/Z-TM-EN-1
9
Chapter 1 - Introduction
4
P14D
COMPLIANCE
The device has undergone a range of extensive testing and certification processes to ensure and prove compatibility with all target markets. Below is a list of standards with which the device is compliant. A detailed description of these criteria can be found in the Technical Specifications (on page 619) chapter. Compliance Standards Condition
Compliance
EMC compliance (compulsory)
2004/108/EC (demonstrated by EN50263:2000)
Product safety (compulsory)
2006/95/EC (demonstrated by EN60255-27:2005)
R&TTE Compliance (compulsory)
99/5/EC
EMC
EN50263, IEC 60255-22-1/2/3/4, IEC 61000-4-5/6/8/9/10, EN61000-4-3/18, IEEE/ANSI C37.90.1/2, ENV50204, EN55022
Product Safety for North America
UL/CL File No. UL/CUL E202519
Environmental conditions
IEC 60068-2-1/30/60/78
Power supply interruption
IEC 60255-11, IEC 61000-4-11
Type tests for Insulation, creepage distance and clearances, high voltage dielectric withstand, and impulse voltage withstand
IEC 60255-27:2005
Enclosure protection
IEC 60529:1992 – IP10, IP30, IP52
Mechanical robustness
IEC 60255-21-1/2/3
Documentation
IEC 60255-151
10
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 1 - Introduction
5
FUNCTIONAL OVERVIEW 86
37
46 46BC
49
50 50N
50 50BF SOTF
51 51N
64N
68
79
HiZ
CTS
21FL
25
27
32
47
51V
59 59N
67 67N
81O 81U 81R 81V
81RF 81RAV 81df/dt
VTS
I Isen V
Digital I/O Optoinputs
Relay outputs
Communication IRIG-B
Ethernet
RS485
Measurements Local USB
Fault records
Disturbance records
V00001
Figure 1: Functional Overview
P14D-B/G/L/Z-TM-EN-1
11
Chapter 1 - Introduction
6
12
P14D
ORDERING OPTIONS
P14D-B/G/L/Z-TM-EN-1
SAFETY INFORMATION CHAPTER 2
Chapter 2 - Safety Information
14
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 2 - Safety Information
CHAPTER OVERVIEW
This chapter provides information about the safe handling of the equipment. The equipment must be properly installed and handled in order to maintain it in a safe condition and to keep personnel safe at all times. You must be familiar with information contained in this chapter before unpacking, installing, commissioning, or servicing the equipment. This chapter contains the following sections: Chapter Overview Health and Safety Symbols Installation, Commissioning and Servicing Decommissioning and Disposal
15 16 17 18 23
P14D-B/G/L/Z-TM-EN-1
15
Chapter 2 - Safety Information
2
P14D
HEALTH AND SAFETY
Personnel associated with the equipment must be familiar with the contents of this Safety Information chapter as well as the Safety Guide (SFTY/4L). When electrical equipment is in operation, dangerous voltages are present in certain parts of the equipment. Improper use of the equipment and failure to observe warning notices will endanger personnel. Only qualified personnel may work on or operate the equipment. Qualified personnel are individuals who: ● Are familiar with the installation, commissioning, and operation of the equipment and the system to which it is being connected. ● Are familiar with accepted safety engineering practises and are authorised to energise and deenergise equipment in the correct manner. ● Are trained in the care and use of safety apparatus in accordance with safety engineering practises ● Are trained in emergency procedures (first aid). Although the documentation provides instructions for installing, commissioning and operating the equipment, it cannot cover all conceivable circumstances. In the event of questions or problems, do not take any action without proper authorisation. Please the appropriate technical sales office and request the necessary information.
16
P14D-B/G/L/Z-TM-EN-1
P14D
3
Chapter 2 - Safety Information
SYMBOLS
Throughout this manual you will come across the following symbols. You will also see these symbols on parts of the equipment. Caution: Refer to equipment documentation. Failure to do so could result in damage to the equipment Warning: Risk of electric shock
Earth terminal
Protective Earth terminal
P14D-B/G/L/Z-TM-EN-1
17
Chapter 2 - Safety Information
P14D
4
INSTALLATION, COMMISSIONING AND SERVICING
4.1
LIFTING HAZARDS
Plan carefully, identify any possible hazards and determine whether the load needs to be moved at all. Look at other ways of moving the load to avoid manual handling. Use the correct lifting techniques and Personal Protective Equipment to reduce the risk of injury. Many injuries are caused by: ● ● ● ●
4.2
Lifting heavy objects Lifting things incorrectly Pushing or pulling heavy objects Using the same muscles repetitively
ELECTRICAL HAZARDS Caution: All personnel involved in installing, commissioning, or servicing of this equipment must be familiar with the correct working procedures. Caution: Consult the equipment documentation before installing, commissioning, or servicing the equipment. Caution: Always use the equipment in a manner specified by the manufacturer. Failure to do will jeopardise the protection provided by the equipment. Warning: Removal of equipment s or covers may expose hazardous live parts. Do not touch until the electrical power is removed. Take extra care when there is unlocked access to the rear of the equipment. Warning: Isolate the equipment before working on the terminal strips. Warning: A suitable protective barrier should be provided for areas with restricted space, where there is a risk of electric shock due to exposed terminals. Caution: Disconnect power before disassembling. Disassembly of the equipment may expose sensitive electronic circuitry. Take suitable precautions against electrostatic voltage discharge (ESD) to avoid damage to the equipment.
18
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 2 - Safety Information
Caution: NEVER look into optical fibres. Always use optical power meters to determine operation or signal level. Caution: Insulation testing may leave capacitors charged up to a hazardous voltage. At the end of each part of the test, discharge the capacitors by reduce the voltage to zero, before disconnecting the test leads. Caution: Operate the equipment within the specified electrical and environmental limits. Caution: Before cleaning the equipment, ensure that no connections are energised. Use a lint free cloth dampened with clean water.
Note: fingers of test plugs are normally protected by petroleum jelly, which should not be removed.
4.3
UL/CSA/CUL REQUIREMENTS Caution: Equipment intended for rack or mounting is for use on a flat surface of a Type 1 enclosure, as defined by Underwriters Laboratories (UL). Caution: To maintain compliance with UL and CSA/CUL, the equipment should be installed using UL/CSA-recognised parts for: cables, protective fuses, fuse holders and circuit breakers, insulation crimp terminals, and replacement internal batteries. Caution: For external fuse protection, a UL or CSA Listed fuse must be used. The listed protective fuse type is: Class J time delay fuse, with a maximum current rating of 15 A and a minimum DC rating of 250 V dc (for example type AJT15). Caution: Where UL/CSA listing of the equipment is not required, a high rupture capacity (HRC) fuse type with a maximum current rating of 16 Amps and a minimum dc rating of 250 V dc may be used (for example Red Spot type NIT or TIA.
P14D-B/G/L/Z-TM-EN-1
19
Chapter 2 - Safety Information
4.4
P14D
EQUIPMENT CONNECTIONS Warning: Terminals exposed during installation, commissioning and maintenance may present a hazardous voltage unless the equipment is electrically isolated. Caution: Clamping screws of heavy duty terminal block connectors using M4 screws must be tightened to a nominal torque of 1.3 Nm. Caution: Always use insulated crimp terminations for voltage and current connections. Caution: Always use the correct crimp terminal and tool according to the wire size. Caution: Watchdog (self-monitoring) s are provided to indicate the health of the device. We strongly recommend that you hard wire these s into the substation's automation system, for alarm purposes.
4.5
PROTECTION CLASS 1 EQUIPMENT REQUIREMENTS Caution: Earth the equipment with the supplied PCT (Protective Conductor Terminal). Caution: Do not remove the PCT. Caution: The PCT is sometimes used to terminate cable screens. Always check the PCT’s integrity after adding or removing such earth connections. Caution: Use a locknut or similar mechanism to ensure the integrity of M4 studconnected PCTs. Caution: The recommended minimum PCT wire size is 2.5 mm² for countries whose mains supply is 230 V (e.g. Europe) and 3.3 mm² for countries whose mains supply is 110 V (e.g. North America). This may be superseded by local or country wiring regulations.
20
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 2 - Safety Information
Caution: The PCT connection must have low-inductance and be as short as possible. Caution: All connections to the equipment must have a defined potential. Connections that are pre-wired, but not used, should be earthed when binary inputs and output relays are isolated. When binary inputs and output relays are connected to a common potential, unused pre-wired connections should be connected to the common potential of the grouped connections.
4.6
PRE-ENERGIZATION CHECKLIST Caution: Check voltage rating/polarity (rating label/equipment documentation). Caution: Check CT circuit rating (rating label) and integrity of connections. Caution: Check protective fuse or miniature circuit breaker (MCB) rating. Caution: Check integrity of the PCT connection. Caution: Check voltage and current rating of external wiring, ensuring it is appropriate for the application.
4.7
PERIPHERAL CIRCUITRY Warning: Do not open the secondary circuit of a live CT since the high voltage produced may be lethal to personnel and could damage insulation. The secondary of the line CT should be shorted before opening any connections to it.
Note: For most Alstom equipment with ring-terminal connections, the threaded terminal block for current transformer termination has automatic CT shorting on removal of the module. Therefore external shorting of the CTs may not be required. Check the equipment documentation first to see if this applies.
P14D-B/G/L/Z-TM-EN-1
21
Chapter 2 - Safety Information
P14D
Caution: Where external components, such as resistors or voltage dependent resistors (VDRs), are used, these may present a risk of electric shock or burns, if touched. Warning: Take extreme care when using external test blocks and test plugs such as the MMLG, MMLB and MiCOM ALSTOM P990, as hazardous voltages may be exposed. CT shorting links must be in place before inserting or removing MMLB test plugs, to avoid potentially lethal voltages.
4.8
UPGRADING/SERVICING Warning: Modules, PCBs, or expansion boards must not be inserted into or withdrawn from the equipment while energised, as this may result in damage to the equipment. Hazardous live voltages would also be exposed, thus endangering personnel. Caution: Internal modules and assemblies can be heavy. Take care when inserting or removing modules into or out of the IED.
22
P14D-B/G/L/Z-TM-EN-1
P14D
5
Chapter 2 - Safety Information
DECOMMISSIONING AND DISPOSAL Caution: Before decommissioning, isolate completely the equipment power supplies (both poles of any dc supply). The auxiliary supply input may have capacitors in parallel, which may still be charged. To avoid electric shock, discharge the capacitors via the external terminals prior to decommissioning.
Avoid incineration or disposal to water courses. The equipment should be disposed of in a safe, responsible, in an environmentally friendly manner, and if applicable, in accordance with country-specific regulations.
P14D-B/G/L/Z-TM-EN-1
23
Chapter 2 - Safety Information
24
P14D
P14D-B/G/L/Z-TM-EN-1
HARDWARE DESIGN CHAPTER 3
Chapter 3 - Hardware Design
26
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 3 - Hardware Design
CHAPTER OVERVIEW
This chapter provides information about the product's hardware design. This chapter contains the following sections: Chapter Overview Hardware Architecture Mechanical Implementation Terminal Connections Front
27 28 30 33 42
P14D-B/G/L/Z-TM-EN-1
27
Chapter 3 - Hardware Design
2
P14D
HARDWARE ARCHITECTURE
The main components comprising devices based on the P40Agile platform are as follows: ● The housing, consisting of a front and connections at the rear ● The Main processor module consisting of the main U (Central Processing Unit), memory and an interface to the front HMI (Human Machine Interface) ● An I/O board consisting of output relay s and digital opto-inputs ● Communication modules ● Power supply All modules are connected by a parallel data and address bus, which allows the processor module to send and receive information to and from the other modules as required. There is also a separate serial data bus for conveying sampled data from the input module to the U. These parallel and serial databuses are shown as a single interconnection module in the figure, which shows the modules and the flow of information between them.
Front port
Memory Flash memory for all settings and records Super capacitor-backed DRAM for real-time clock
Watchdog s
Auxiliary Supply
Opto-input module
Output relay s Digital inputs
I/O
Interconnection
LEDs
Output relay module
Processor module
LCD
Front HMI
Keypad
Watchdog module
PSU module
CTs
Power system currents*
VTs
Power system voltages*
Analogue Inputs
RS485 module
RS485 communication
IRIG-B module
Time synchronisation (Optional)
Ethernet module
Ethernet communication (Optional)
Communications
* No VTs on current-only models. No CTs on voltage-only models V00200
Figure 2: Hardware design overview
2.1
MEMORY AND REAL TIME CLOCK
The IED contains flash memory for storing the following operational information: ● ● ● ● ● ●
28
Fault, Maintenance and Disturbance Records Events Alarms Measurement values Latched trips Latched s
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 3 - Hardware Design
Flash memory is non-volatile and therefore no backup battery is required. A dedicated Supercapacitor keeps the on board real time clock operational for up to four days after power down.
P14D-B/G/L/Z-TM-EN-1
29
Chapter 3 - Hardware Design
3
P14D
MECHANICAL IMPLEMENTATION
All products based on the P40Agile platform have common hardware architecture. The hardware comprises two main parts; the cradle and the housing. The cradle consists of the front which is attached to a carrier board into which all of the hardware boards and modules are connected. The products have been designed such that all the boards and modules comprising the product are fixed into the cradle and are not intended to be removed or inserted after the product has left the factory. The housing comprises the housing metalwork and connectors at the rear into which the boards in the cradle plug into.
Figure 3: Exploded view of IED
3.1
HOUSING VARIANTS
The P40 Agile range of products are implemented in one of two case sizes. Case dimensions for industrial products usually follow modular measurement units based on rack sizes. These are: U for height and TE for width, where: ● 1U = 1.75" = 44.45 mm ● 1TE = 0.2 inches = 5.08 mm The products are available in -mount or standalone versions. All products are nominally 4U high. This equates to 177.8 mm or 7 inches. The cases are pre-finished steel with a conductive covering of aluminium and zinc. This provides good grounding at all ts, providing a low impedance path to earth that is essential for performance in the presence of external noise. The case width depends on the product type and its hardware options. There are two different case widths for the described range of products: 20TE and 30TE. The products in the P40 Agile range can be used as a
30
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 3 - Hardware Design
K-series refit and the cases, cradle, and pin-outs are completely inter-compatible. The case dimensions and compatibility criteria are as follows: Case width (TE)
Case width (mm)
Equivalent K series
Products
20TE
102.4 mm (4 inches)
KCGG140/142
P14N
30TE
154.2 mm (6 inches)
KCEG140/142
P14N (with extra I/O), P14D
3.2
30TE REAR
The 30TE rear consists of either: ● Three MIDOS heavy duty terminal blocks ● Two MIDOS heavy duty terminal blocks and a communication board ● Two MIDOS heavy duty terminal blocks and a blanking
Figure 4: 30TE Three-MIDOS block rear
P14D-B/G/L/Z-TM-EN-1
31
Chapter 3 - Hardware Design
P14D
Figure 5: 30TE Two-MIDOS block + communications rear
Figure 6: 30TE Two-MIDOS block + blanking plate
32
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 3 - Hardware Design
4
TERMINAL CONNECTIONS
4.1
I/O OPTIONS Component
I/O option A
I/O option B
I/O option C
I/O option D
Digital inputs
8 (1 group of 3 and 1 group of 5)
11 (2 groups of 3 and 1 group of 5)
11 (1 group of 3, 1 group of 5 and 3 individual)
13 (1 group of 3 and 2 groups of 5)
Output relays
8
12
12
12
Note: I/O option C is suitable for Trip Circuit Supervision (TCS) applications
4.2
P14D HARDWARE CONFIGURATION 1
1 4
31
6
33
7
8
35
9
10
37
11
12
39
13
14
41
16
43
18
45
20
47
22
49
24
51
26
53
28
55
5
30
29
3 WatchDog
PSU
15
Vcs
17 19
Va
21
Vc
Vb Ia
23 Ib
25 Ic
27
RL5
RL1
32 34
RL2
RL6
36 38
RL7
RL3
40
RL8
RL4
44
42 46 L4
L1
L5
L2
L6
L3
48 50 52
L7
54
L8
56
In SCN
E00217
Figure 7: P14D with I/O option A Terminal Block Left (as viewed from rear) Description
Terminal 1
Earth
2
Not used
3+5
Watchdog, normally closed
4+6
Watchdog, normally open
7 to 12
Not used
13 + 14
Power Supply Unit
15 + 16
Voltage Transformer Vcs
17 + 18
Voltage Transformers Va and Vb
P14D-B/G/L/Z-TM-EN-1
33
Chapter 3 - Hardware Design
Terminal
P14D
Description
19 + 20
Voltage Transformer Vc
21 + 22
Current Transformer Ia
23 + 24
Current Transformer Ib
25 + 26
Current Transformer Ic
27 + 28
Current Transformer In
Terminal Block Right (as viewed from rear) Terminal
Description
30 + 32
Relay 1, normally open
34 + 36
Relay 2, normally open
38 + 40
Relay 3, normally open
42 + 44
Relay 4, normally open
29 + 31
Relay 5, normally open
33 + 35
Relay 6, normally open
37 + 39
Relay 7, normally open
41 + 43
Relay 8, normally open
46 + 52
Opto-input L1 (group 1)
48 + 52
Opto-input L2 (group 1)
50 + 52
Opto-input L3 (group 1)
45 + 55
Opto-input L4 (group 2)
47 + 55
Opto-input L5 (group 2)
49 + 55
Opto-input L6 (group 2)
51 + 55
Opto-input L7 (group 2)
53 + 55
Opto-input L8 (group 2)
54 + 56
EIA(RS)485 or Demodulated IRIG-B
34
P14D-B/G/L/Z-TM-EN-1
P14D
4.3
Chapter 3 - Hardware Design
P14D HARDWARE CONFIGURATION 2
1 5
30
29
3 WatchDog
4
31
6
33
7
8
9
10
11
12
13
14
PSU
15 19
Va
21
Vc Ia
23 Ib Ic
27
20 22
25
Single Channel
24
10/100Base-TX
100Base-FX
RL6
RL2
RL7
RL3
40
RL8
RL4
44
42 46
45 49 51
26
53
28
55
36 38
41
47 or
32 34
37
43
18 Vb
35 39
16
Vcs
17
Ethernet Communications Board
RL1
RL5
L4
L1
L5
L2
L6
L3
48 50 52
L7
54
L8
56
In SCN
E00221
Figure 8: P14D with I/O option A + Ethernet communications Terminal Block Left (as viewed from rear) Terminal
Description
1
Earth
2
Not used
3+5
Watchdog, normally closed
4+6
Watchdog, normally open
7 to 12
Not used
13 + 14
Power Supply Unit
15 + 16
Voltage Transformer Vcs
17 + 18
Voltage Transformers Va and Vb
19 + 20
Voltage Transformer Vc
21 + 22
Current Transformer Ia
23 + 24
Current Transformer Ib
25 + 26
Current Transformer Ic
27 + 28
Current Transformer In
Terminal Block Right (as viewed from rear) Description
Terminal 30 + 32
Relay 1, normally open
34 + 36
Relay 2, normally open
38 + 40
Relay 3, normally open
42 + 44
Relay 4, normally open
29 + 31
Relay 5, normally open
P14D-B/G/L/Z-TM-EN-1
35
Chapter 3 - Hardware Design
P14D
Terminal
Description
33 + 35
Relay 6, normally open
37 + 39
Relay 7, normally open
41 + 43
Relay 8, normally open
46 + 52
Opto-input L1 (group 1)
48 + 52
Opto-input L2 (group 1)
50 + 52
Opto-input L3 (group 1)
45 + 55
Opto-input L4 (group 2)
47 + 55
Opto-input L5 (group 2)
49 + 55
Opto-input L6 (group 2)
51 + 55
Opto-input L7 (group 2)
53 + 55
Opto-input L8 (group 2)
54 + 56
EIA(RS)485 or Demodulated IRIG-B
4.4
P14D HARDWARE CONFIGURATION 3
1
58
29
60
31
61
62
33
8
63
RL10 64
35
10
65
66
37
11
12
67
RL11 68
39
13
14
69 71
70 RL12 72
41
16 18
73
74
45
20
75
22
77
57
3
4
59
6
7 9
5
WatchDog
PSU
15
Vcs
17 19
Va
21
Vc
Vb Ia
23 Ib
25 Ic
27
24
79
26 28
RL9
L9 L10 L11
43
76
47
78
49
80
51
81
82
53
83
84
55
30 RL5
RL1
32 34
RL2
RL6
36 38
RL7
RL3
40
RL8
RL4
44
42 46 L4
L1
L5
L2
L6
L3
48 50
L7
52 54
L8
56
In SCN
SCN
E00219
Figure 9: P14D with I/O option B Terminal Block Left (as viewed from rear) Description
Terminal 1
Earth
2
Not used
3+5
Watchdog, normally closed
4+6
Watchdog, normally open
7 to 12
Not used
13 + 14
Power Supply Unit
15 + 16
Voltage Transformer Vcs
36
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 3 - Hardware Design
Terminal
Description
17 + 18
Voltage Transformers Va and Vb
19 + 20
Voltage Transformer Vc
21 + 22
Current Transformer Ia
23 + 24
Current Transformer Ib
25 + 26
Current Transformer Ic
27 + 28
Current Transformer In
Terminal Block Right (as viewed from rear) Terminal
Description
30 + 32
Relay 1, normally open
34 + 36
Relay 2, normally open
38 + 40
Relay 3, normally open
42 + 44
Relay 4, normally open
29 + 31
Relay 5, normally open
33 + 35
Relay 6, normally open
37 + 39
Relay 7, normally open
41 + 43
Relay 8, normally open
46 + 52
Opto-input L1 (group 1)
48 + 52
Opto-input L2 (group 1)
50 + 52
Opto-input L3 (group 1)
45 + 55
Opto-input L4 (group 2)
47 + 55
Opto-input L5 (group 2)
49 + 55
Opto-input L6 (group 2)
51 + 55
Opto-input L7 (group 2)
53 + 55
Opto-input L8 (group 2)
54 + 56
EIA(RS)485 or Demodulated IRIG-B
Terminal Block Centre Terminal
Description
58 + 60
Relay 9, normally open
62 + 64
Relay 10, normally open
66 + 68
Relay 11, normally open
70 + 72
Relay 12, normally open
74 + 80
Opto-input L9 (group 3)
76 + 80
Opto-input L10 (group 3)
78 + 80
Opto-input L11 (group 3)
82 + 84
EIA(RS)485 or Demodulated IRIG-B
The rest
Not used
P14D-B/G/L/Z-TM-EN-1
37
Chapter 3 - Hardware Design
4.5
P14D
P14D HARDWARE CONFIGURATION 4
1
58
29
60
31
61
62
33
8
63
RL10 64
35
10
65
66
37
67
RL11 68
39
69
70 RL12 72
41
57
3
4
59
6
7 9 11
12
13
14 16
71
18
73
20
75
22
77
5
WatchDog
PSU
15
Vcs
17 19
Va
21
Vc
Vb Ia
23 Ib
25 Ic
27
24
79
26
81
28
83
RL9
L9 L10
L11
43
74
45
76
47
78
49
80
51
82
53
84
55
30 RL1
RL5
32 34
RL6
RL2
36 38
RL7
RL3
40
RL8
RL4
44
42 46 L4
L1
L5
L2
L6
L3
48 50 52
L7
54
L8
56
In SCN
E00220
Figure 10: P14D with I/O option C Terminal Block Left (as viewed from rear) Terminal
Description
1
Earth
2
Not used
3+5
Watchdog, normally closed
4+6
Watchdog, normally open
7 to 12
Not used
13 + 14
Power Supply Unit
15 + 16
Voltage Transformer Vcs
17 + 18
Voltage Transformers Va and Vb
19 + 20
Voltage Transformer Vc
21 + 22
Current Transformer Ia
23 + 24
Current Transformer Ib
25 + 26
Current Transformer Ic
27 + 28
Current Transformer In
Terminal Block Right (as viewed from rear) Description
Terminal 30 + 32
Relay 1, normally open
34 + 36
Relay 2, normally open
38 + 40
Relay 3, normally open
42 + 44
Relay 4, normally open
29 + 31
Relay 5, normally open
38
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 3 - Hardware Design
Terminal
Description
33 + 35
Relay 6, normally open
37 + 39
Relay 7, normally open
41 + 43
Relay 8, normally open
46 + 52
Opto-input L1 (group 1)
48 + 52
Opto-input L2 (group 1)
50 + 52
Opto-input L3 (group 1)
45 + 55
Opto-input L4 (group 2)
47 + 55
Opto-input L5 (group 2)
49 + 55
Opto-input L6 (group 2)
51 + 55
Opto-input L7 (group 2)
53 + 55
Opto-input L8 (group 2)
54 + 56
EIA(RS)485 or Demodulated IRIG-B
Terminal Block 3 Centre Terminal
Description
58 + 60
Relay 9, normally open
62 + 64
Relay 10, normally open
66 + 68
Relay 11, normally open
70 + 72
Relay 12, normally open
74 + 76
Opto-input L9
78 + 80
Opto-input L10
82 + 84
Opto-input L11
The rest
Not used
P14D-B/G/L/Z-TM-EN-1
39
Chapter 3 - Hardware Design
4.6
P14D
P14D HARDWARE CONFIGURATION 5
1
58
29
60
31
61
62
33
8
63
RL10 64
35
10
65
66
37
12
67
RL11 68
39
14
69
70
41
16
71
RL12 72
43
18
73
74
45
20
75
76
47
57
3
4
59
6
7 9 11 13
5
WatchDog
PSU
15
Vcs
17 19
Va
21
Vc
Vb Ia
23 Ib
25 Ic
27
22
77
24
79
26
81
28
83
RL9
L9 L10 L11 L12 L13
78
49
80
51
82
53
84
55
30 RL1
RL5
32 34
RL6
RL2
36 38
RL7
RL3
RL8
RL4
40 42 44 46
L4
L1
L5
L2
L6
L3
48 50 52
L7
54
L8
56
In SCN
E00218
Figure 11: P14D with I/O option D Terminal Block Left (as viewed from rear) Terminal
Description
1
Earth
2
Not used
3+5
Watchdog, normally closed
4+6
Watchdog, normally open
7 to 12
Not used
13 + 14
Power Supply Unit
15 + 16
Voltage Transformer Vcs
17 + 18
Voltage Transformers Va and Vb
19 + 20
Voltage Transformer Vc
21 + 22
Current Transformer Ia
23 + 24
Current Transformer Ib
25 + 26
Current Transformer Ic
27 + 28
Current Transformer In
Terminal Block Right (as viewed from rear) Description
Terminal 30 + 32
Relay 1, normally open
34 + 36
Relay 2, normally open
38 + 40
Relay 3, normally open
42 + 44
Relay 4, normally open
29 + 31
Relay 5, normally open
40
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 3 - Hardware Design
Terminal
Description
33 + 35
Relay 6, normally open
37 + 39
Relay 7, normally open
41 + 43
Relay 8, normally open
46 + 52
Opto-input L1 (group 1)
48 + 52
Opto-input L2 (group 1)
50 + 52
Opto-input L3 (group 1)
45 + 55
Opto-input L4 (group 2)
47 + 55
Opto-input L5 (group 2)
49 + 55
Opto-input L6 (group 2)
51 + 55
Opto-input L7 (group 2)
53 + 55
Opto-input L8 (group 2)
54 + 56
EIA(RS)485 or Demodulated IRIG-B
Terminal Block Centre Terminal
Description
58 + 60
Relay 9, normally open
62 + 64
Relay 10, normally open
66 + 68
Relay 11, normally open
70 + 72
Relay 12, normally open
74 + 84
Opto-input L9 (group 3)
76 + 84
Opto-input L10 (group 3)
78 + 84
Opto-input L11 (group 3)
80 + 84
Opto-input L12 (group 3)
82 + 84
Opto-input L13 (group 3)
The rest
Not used
P14D-B/G/L/Z-TM-EN-1
41
Chapter 3 - Hardware Design
5
FRONT
5.1
30TE FRONT
P14D
Figure 12: Front (30TE) The figures show the front s for the 30TE variant. It consists of: ● ● ● ● ● ● ●
5.2
LCD display Keypad USB port 4 x fixed function tri-colour LEDs 8 x programmable tri-colour LEDs 3 x function keys 3 x tri-colour LEDs for the function keys
KEYPAD
The keypad consists of the following keys:
4 arrow keys to navigate the menus
42
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 3 - Hardware Design
An enter key for executing the chosen option
A clear key for clearing the last command
A read key for viewing larger blocks of text (arrow keys now used for scrolling)
2 hot keys for scrolling through the default display and for control of setting groups
5.3
LIQUID CRYSTAL DISPLAY
The LCD is a high resolution monochrome display with 16 characters by 3 lines and controllable back light.
5.4
USB PORT
The USB port is situated on the front in the bottom left hand corner, and is used to communicate with a locally connected PC. It has two main purposes: ● To transfer settings information to/from the PC from/to the device. ● For ing firmware updates and menu text editing. The port is intended for temporary connection during testing, installation and commissioning. It is not intended to be used for permanent SCADA communications. This port s the Courier communication protocol only. Courier is a proprietary communication protocol to allow communication with a range of protection equipment, and between the device and the Windows-based software package. You can connect the unit to a PC with a USB cable up to 15 m in length. The inactivity timer for the front port is set to 15 minutes. This controls how long the unit maintains its level of access on the front port. If no messages are received on the front port for 15 minutes, any access level that has been enabled is cancelled. Note: The front USB port does not automatic extraction of event and disturbance records, although this data can be accessed manually.
Caution: When not in use, always close the cover of the USB port to prevent contamination.
P14D-B/G/L/Z-TM-EN-1
43
Chapter 3 - Hardware Design
5.5
P14D
FIXED FUNCTION LEDS
Four fixed-function LEDs on the left-hand side of the front indicate the following conditions. ● Trip (Red) switches ON when the IED issues a trip signal. It is reset when the associated fault record is cleared from the front display. Also the trip LED can be configured as self-resetting. ● Alarm (Yellow) flashes when the IED s an alarm. This may be triggered by a fault, event or maintenance record. The LED flashes until the alarms have been accepted (read), then changes to constantly ON. When the alarms are cleared, the LED switches OFF. ● Out of service (Yellow) is ON when the IED's protection is unavailable. ● Healthy (Green) is ON when the IED is in correct working order, and should be ON at all times. It goes OFF if the unit’s self-tests show there is an error in the hardware or software. The state of the healthy LED is reflected by the watchdog s at the back of the unit.
5.6
FUNCTION KEYS
The programmable function keys are available for custom use for devices using 30TE cases or larger. Factory default settings associate specific functions to these keys, but by using programmable scheme logic, you can change the default functions of these keys to fit specific needs. Adjacent to these function keys are programmable tri-colour LEDs, which are set to be associated with their respective function keys.
5.7
PROGRAMABLE LEDS
The device has a number of programmable LEDs. All of the programmable LEDs on the unit are tri-colour and can be set to RED, YELLOW or GREEN. In the 20TE case, four programmable LEDs are available. In 30TE, eight are available.
44
P14D-B/G/L/Z-TM-EN-1
CONFIGURATION CHAPTER 4
Chapter 4 - Configuration
46
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 4 - Configuration
CHAPTER OVERVIEW
Each product has different configuration parameters according to the functions it has been designed to perform. There is, however, a common methodology used across the entire product series to set these parameters. This chapter describes an overview of this common methodology, as well as providing concise instructions of how to configure the device. This chapter contains the following sections: Chapter Overview Using the HMI Configuring the Data Protocols Date and Time Configuration Configuration Settings
47 48 58 65 67
P14D-B/G/L/Z-TM-EN-1
47
Chapter 4 - Configuration
2
P14D
USING THE HMI
Using the HMI, you can: ● ● ● ● ●
Display and modify settings View the digital I/O signal status Display measurements Display fault records Reset fault and alarm indications
The keypad provides full access to the device functionality by means of a range of menu options. The information is displayed on the LCD. Keys
Description
Function
Up and down cursor keys
To change the menu level or change between settings in a particular column, or changing values within a cell
Left and right cursor keys
To change default display, change between column headings, or changing values within a cell
ENTER key
For changing and executing settings
Hotkeys
For executing commands and settings for which shortcuts have been defined
Cancel key
To return to column header from any menu cell
Read key
To read alarm messages
Function keys (not for 20TE devices)
For executing programmable functions
Note: As the LCD display has a resolution of 16 characters by 3 lines, some of the information is in a condensed mnemonic form.
48
P14D-B/G/L/Z-TM-EN-1
P14D
2.1
Chapter 4 - Configuration
NAVIGATING THE HMI
The cursor keys are used to navigate the menus. These keys have an auto-repeat function if held down continuously. This can be used to speed up both setting value changes and menu navigation. The longer the key is held pressed, the faster the rate of change or movement. The navigation map below shows how to navigate the menu items.
Figure 13: Menu navigation
2.2
GETTING STARTED
When you first start the IED, it will go through its power up procedure. After a few seconds it will settle down into one of the top level menus. There are two menus at this level: ● The Alarms menu for when there are alarms present ● The default display menu for when there are no alarms present. If there are alarms present, the yellow Alarms LED will be flashing and the menu display will read as follows: Alarms / Faults Present HOTKEY
P14D-B/G/L/Z-TM-EN-1
49
Chapter 4 - Configuration
P14D
Even though the device itself should be in full working order when you first start it, an alarm could still be present, for example, if there is no network connection for a device fitted with a network card. If this is the case, you can read the alarm by pressing the 'Read' key. ALARMS NIC Link Fail
If the device is fitted with an Ethernet card (not applicable to 20TE IEDs), the only way you will be able to completely clear this alarm will be by connecting the device into an Ethernet network. This is also the only way you will be able to get into the default display menu. If there are other alarms present, these must also be cleared before you can get into the default display menu options.
2.3
DEFAULT DISPLAY
The default display menu contains a range of possible options that you can choose to be the default display. The options available are: NERC Compliant banner The IED is delivered with a NERC-compliant default display: ACCESS ONLY FOR AUTHORISED S HOTKEY
Date and time For example: 11:09:15 23 Nov 2011 HOTKEY
Description (-defined) For example: Description MiCOM P14NB HOTKEY
Plant reference (-defined) For example: Plant Reference MiCOM HOTKEY
50
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 4 - Configuration
Access Level For example: Access Level 3 HOTKEY
In addition to the above, there are also displays for the system voltages, currents, power and frequency etc., depending on the device model.
2.4
DEFAULT DISPLAY NAVIGATION
The default display navigation is best represented diagrammatically. DISPLAY NOT NERC COMPLIANT. OK?
DISPLAY NOT NERC COMPLIANT. OK?
NERC compliant banner
Access Level
System Current
System Frequency
System Voltage
Plant Reference
System Power
Description
Date & Time
V00403
Figure 14: Default display navigation If the device is not yet configured for NERC compliance (see Cyber-Security chapter (on page 473)) a warning will appear when moving from the "NERC compliant" banner. The warning message is as follows: DISPLAY NOT NERC COMPLIANT. OK?
You will have to confirm with the ENTER button before you can go any further.
P14D-B/G/L/Z-TM-EN-1
51
Chapter 4 - Configuration
P14D
Note: Whenever the IED has an uncleared alarm the default display is replaced by the text Alarms/ Faults present. You cannot override this default display. However, you can enter the menu structure from the default display, even if the display shows the Alarms/Faults present message.
2.5
ENTRY
Configuring the default display (in addition to modification of other settings) requires level 3 access. You will be prompted for a before you can make any changes, as follows. The default level 3 is AAAA. Enter
1.
A flashing cursor shows which character field of the can be changed. Press the up or down cursor keys to change each character (tip: pressing the up arrow once will return an upper case "A" as required by the default level 3 ).
2.
Use the left and right cursor keys to move between the character fields of the .
3.
Press the Enter key to confirm the . If you enter an incorrect , an invalid message is displayed then the display reverts to Enter . Upon entering a valid a message appears indicating that the is correct and which level of access has been unlocked. If this level is sufficient to edit the selected setting, the display returns to the setting page to allow the edit to continue. If the correct level of has not been entered, the prompt page appears again. 4. To escape from this prompt press the Clear key. Alternatively, enter the using System data > . If the keypad is inactive for 15 minutes, the protection of the front interface reverts to the default access level. To manually reset the protection to the default level, select System data > , then press the Clear key instead of entering a .
2.6
PROCESSING ALARMS AND FAULT RECORDS
If there are any alarm messages, they will appear on the default display and the yellow alarm LED flashes. The alarm messages can either be self-resetting or latched. If they are latched, they must be cleared manually. 1.
2.
To view the alarm messages, press the Read key. When all alarms have been viewed but not cleared, the alarm LED changes from flashing to constantly on, and the latest fault record appears (if there is one). Scroll through the pages of the latest fault record, using the cursor keys. When all pages of the fault record have been viewed, the following prompt appears. Press Clear To Reset Alarms
52
P14D-B/G/L/Z-TM-EN-1
P14D
3.
Chapter 4 - Configuration
To clear all alarm messages, press the Clear key. To return to the display showing alarms or faults present, and leave the alarms uncleared, press the Read key. Depending on the configuration settings, you may need to enter a before the alarm messages can be cleared. When all alarms are cleared, the yellow alarm LED switches off. If the red LED was on, this will also be switched off.
4. 5.
Note: To speed up the procedure, you can enter the alarm viewer using the Read key and subsequently pressing the Clear key. This goes straight to the fault record display. Press the Clear key again to move straight to the alarm reset prompt, then press the Clear key again to clear all alarms.
2.7
MENU STRUCTURE
Settings, commands, records and measurements are stored in a local database inside the IED. When using the Human Machine Interface (HMI) it is convenient to visualise the menu navigation system as a table. Each item in the menu is known as a cell, which is accessed by reference to a column and row address. Each column and row is assigned a 2-digit hexadecimal numbers, resulting in a unique 4-digit cell address for every cell in the database. The main menu groups are allocated columns and the items within the groups are allocated rows, meaning a particular item within a particular group is a cell. Each column contains all related items, for example all of the disturbance recorder settings and records are in the same column. There are three types of cell: ● Settings: This is for parameters that can be set to different values ● Commands: This is for commands to be executed ● Data: this is for measurements and records to be viewed, which are not settable Note: Sometimes the term "Setting" is used generically to describe all of the three types.
The table below, provides and example of the menu structure: SYSTEM DATA (Col 00)
VIEW RECORDS (Col 01)
MEASUREMENTS 1 (Col 02)
…
Language (Row 01)
"Select Event [0...n]" (Row 01)
IA Magnitude (Row 01)
…
(Row 02)
Menu Cell Ref (Row 02)
IA Phase Angle (Row 02)
…
Sys Fn Links Row 03)
Time & Date (Row 03)
IB Magnitude (Row 03)
…
…
…
…
…
It is more convenient to specify all the settings in a single column, detailing the complete Courier address for each setting. The above table may therefore be represented as follows: Column
Setting
Row
Description
SYSTEM DATA
00
00
First Column definition
Language (Row 01)
00
01
First setting within first column
(Row 02)
00
02
Second setting within first column
Sys Fn Links Row 03)
00
03
Third setting within first column
…
…
…
VIEW RECORDS
01
00
Second Column definition
Select Event [0...n]
01
01
First setting within second column
P14D-B/G/L/Z-TM-EN-1
53
Chapter 4 - Configuration
P14D
Setting
Column
Row
Description
Menu Cell Ref
01
02
Second setting within second column
Time & Date
01
03
Third setting within second column
…
…
…
MEASUREMENTS 1
02
00
Third Column definition
IA Magnitude
02
01
First setting within third column
IA Phase Angle
02
02
Second setting within third column
IB Magnitude
02
03
Third setting within third column
…
…
…
The first three column headers are common throughout the entire series of products. However the rows within each of these column headers may differ according to the product type. Many of the column headers are the same for all products within the series. However, there is no guarantee that the addresses will be the same for a particular column header. Therefore you should always refer to the product settings documentation and not make any assumptions.
2.8 1. 2. 3. 4. 5.
6.
7.
8. 9.
CHANGING THE SETTINGS Starting at the default display, press the Down cursor key to show the first column heading. Use the horizontal cursor keys to select the required column heading. Use the vertical cursor keys to view the setting data in the column. To return to the column header, either press the Up cursor key for a second or so, or press the Cancel key once. It is only possible to move across columns at the column heading level. To return to the default display, press the Up cursor key or the Cancel key from any of the column headings. If you use the auto-repeat function of the Up cursor key, you cannot go straight to the default display from one of the column cells because the auto-repeat stops at the column heading. To change the value of a setting, go to the relevant cell in the menu, then press the Enter key to change the cell value. A flashing cursor on the LCD shows that the value can be changed. You may be prompted for a first. To change the setting value, press the Up and Down cursor keys. If the setting to be changed is a binary value or a text string, select the required bit or character to be changed using the Left and Right cursor keys. Press the Enter key to confirm the new setting value or the Clear key to discard it. The new setting is automatically discarded if it is not confirmed within 15 seconds. For protection group settings and disturbance recorder settings, the changes must be confirmed before they are used. When all required changes have been entered, return to the column heading level and press the Down cursor key. Before returning to the default display, the following prompt appears. Update settings? ENTER or CLEAR
10.
Press the Enter key to accept the new settings or press the Clear key to discard the new settings.
Note: If the menu time-out occurs before the setting changes have been confirmed, the setting values are also discarded. Control and settings are updated immediately after they are entered, without the Update settings? prompt.
54
P14D-B/G/L/Z-TM-EN-1
P14D
2.9
Chapter 4 - Configuration
DIRECT ACCESS (THE HOTKEY MENU)
It can be quite an onerous process to configure settings using the HMI , especially for settings and commands that need to be executed quickly or on a regular basis. The IED provides a pair of keys directly below the LCD display, which can be used to execute specified settings and commands directly. The functions available for direct access using these keys are: ● Setting group selection ● Control Inputs ● CB Control functions The availability of these functions is controlled by the Direct Access cell in the CONFIGURATION column. There are four options: 'Disabled', 'Enabled', 'CB Ctrl only' and 'Hotkey only'. For the Setting Group selection and Control inputs, this cell must be set to either 'Enabled' or 'Hotkey only'. For CB Control functions, the cell must be set to 'Enabled' or 'CB Ctrl only'.
2.9.1
SETTING GROUP SELECTION
By default, only Setting group 1 is enabled. Other setting groups will only be available if they are first enabled. To be able to select a different setting group, you must first enable them in the CONFIGURATION column. To access the hotkey menu from the default display, you press the key directly below the HOTKEY text on the LCD. The following screen will appear. ¬32 STG GP® HOTKEY MENU EXIT
Use the right cursor keys to enter the Setting Group menu. ¬Menu 01® SETTING GROUP 1 Nxt Grp Select
Select the setting group with Nxt Grp and confirm by pressing Select. If neither of the cursor keys is pressed within 20 seconds of entering a hotkey sub menu, the device reverts to the default display.
2.9.2
CONTROL INPUTS
The control inputs are -assignable functions. You can use the CTRL I/P CONFIG column to configure the control inputs for the hotkey menu. In order to do this, use the first setting Hotkey Enabled cell to enable or disable any of the 32 control inputs. You can then set each control input to latched or pulsed and set its command to 'On/Off', 'Set/Reset', 'In/Out', or 'Enabled/Disabled'. By default, the hotkey is enabled for all 32 control inputs and they are set to "Set/Reset" and are "Latched". To access the hotkey menu from the default display, you press the key directly below the HOTKEY text on the LCD. The following screen will appear. ¬32 STG GP® HOTKEY MENU EXIT
P14D-B/G/L/Z-TM-EN-1
55
Chapter 4 - Configuration
P14D
Press the right cursor key twice to get to the first control input, or the left cursor key to get to the last control input. ¬STP GP 02® Control Input 1 EXIT SET
Now you can execute the chosen function (Set/Reset in this case). If neither of the cursor keys is pressed within 20 seconds of entering a hotkey sub menu, the device reverts to the default display.
2.9.3
CB CONTROL
You can open and close the controlled circuit breaker with the direct access key to the right, if enabled as described above. By default direct access to the circuit breakers is disabled. If direct access to the circuit breakers has been enabled, the bottom right hand part of the display will read "Open or Close" depending on whether the circuit breaker is closed or open respectively: For example: Plant Reference MiCOM HOTKEY CLOSE
To close the circuit breaker (in this case), press the key directly below CLOSE. You will be given an option to cancel or confirm. Execute CB CLOSE Cancel Confirm
More detailed information on CB Control (on page 384) can be found in the CB Control section in the Monitoring and Control chapter.
2.10
FUNCTION KEYS
With the exception of products housed in 20TE cases, the IED has a number of function keys for programming control functionality using the programmable scheme logic (PSL). Each function key has an associated programmable tri-colour LED that can be programmed to give the desired indication on function key activation. These function keys can be used to trigger any function that they are connected to as part of the PSL. The function key commands are in the FUNCTION KEYS column. The first cell down in the FUNCTION KEYS column is the Fn Key Status cell. This contains a 10 bit word, which represents the 10 function key commands. Their status can be read from this 10 bit word. FUNCTION KEYS Fn Key Status 0000000000
56
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 4 - Configuration
The next cell down (Fn Key 1) allows you to activate or disable the first function key (1). The Lock setting allows a function key to be locked. This allows function keys that are set to ‘Toggled’ mode and their DDB signal active ‘high’, to be locked in their active state, preventing any further key presses from deactivating the associated function. Locking a function key that is set to the Normal mode causes the associated DDB signals to be permanently off. This safety feature prevents any inadvertent function key presses from activating or deactivating critical relay functions. FUNCTION KEYS Fn Key 1 Unlocked
The next cell down (Fn Key 1 Mode) allows you to set the function key to 'Normal' or 'Toggled'. In the Toggle mode the function key DDB signal output stays in the set state until a reset command is given, by activating the function key on the next key press. In the Normal mode, the function key DDB signal stays energised for as long as the function key is pressed then resets automatically. If required, a minimum pulse width can be programmed by adding a minimum pulse timer to the function key DDB output signal. FUNCTION KEYS Fn Key 1 Mode Toggled
The next cell down (Fn Key 1 Label) allows you to change the label of the function. The default label is "Function key 1" in this case. To change the label you need to press the enter key and then change the text on the bottom line, character by character. This text is displayed when a function key is accessed in the function key menu, or it can be displayed in the PSL. FUNCTION KEYS Fn Key 1 Label Function Key 1
Subsequent cells allow you to carry out the same procedure as above for the other function keys. The status of the function keys is stored in non-volatile memory. If the auxiliary supply is interrupted, the status of all the function keys is restored. The IED only recognises a single function key press at a time and a minimum key press duration of approximately 200 ms is required before the key press is recognised in PSL. This feature avoids accidental double presses.
P14D-B/G/L/Z-TM-EN-1
57
Chapter 4 - Configuration
3
P14D
CONFIGURING THE DATA PROTOCOLS
Different protocols can be used with the various ports. The choice of protocol depends on the chosen model. Only one data protocol can be configured at any one time on any one IED. The range of available communication settings depend on which protocol has been chosen.
3.1
COURIER CONFIGURATION
To use the rear port with Courier, you can configure the settings using the HMI . 1. 2. 3.
Select the CONFIGURATION column and check that the Comms settings cell is set to Visible. Select the COMMUNICATIONS column. Move to the first cell down (RP1 protocol). This is a non-settable cell, which shows the chosen communication protocol – in this case Courier. COMMUNICATIONS RP1 Protocol Courier
4.
Move down to the next cell (RP1 Address). This cell controls the address of the IED. Up to 32 IEDs can be connected to one spur. It is therefore necessary for each IED to have a unique address so that messages from the master control station are accepted by one IED only. Courier uses an integer number between 1 and 254 for the IED address. It is set to 255 by default, which has to be changed. It is important that no two IEDs share the same address. COMMUNICATIONS RP1 Address 100
5.
Move down to the next cell (RP1 InactivTimer). This cell controls the inactivity timer. The inactivity timer controls how long the IED waits without receiving any messages on the rear port before it reverts to its default state, including revoking any access that was enabled. For the rear port this can be set between 1 and 30 minutes. COMMUNICATIONS RP1 Inactivtimer 10.00 mins.
6.
If the optional fibre optic connectors are fitted, the RP1 PhysicalLink cell is visible. This cell controls the physical media used for the communication (Copper or Fibre optic). COMMUNICATIONS RP1 PhysicalLink Copper
58
P14D-B/G/L/Z-TM-EN-1
P14D
7.
Chapter 4 - Configuration
Move down to the next cell (RP1 Card Status). This cell is not settable. It just displays the status of the chosen physical layer protocol for RP1. COMMUNICATIONS RP1 Card Status K-Bus OK
8.
Move down to the next cell (RP1 Port Config). This cell controls the type of serial connection. Select between K-Bus or RS485. COMMUNICATIONS RP1 Port Config K-Bus
9.
If using EIA(RS)485, the next cell (RP1 Comms Mode) selects the communication mode. The choice is either IEC 60870 FT1.2 for normal operation with 11-bit modems, or 10-bit no parity. If using K-Bus this cell will not appear. COMMUNICATIONS RP1 Comms Mode IEC 60870 FT1.2
10.
If using EIA(RS)485, the next cell down controls the baud rate. Three baud rates are ed; 9600, 19200 and 38400. If using K-Bus this cell will not appear as the baud rate is fixed at 64 kbps. COMMUNICATIONS RP1 Baud rate 19200
Note: If you modify protection and disturbance recorder settings using an on-line editor such as PAS&T, you must confirm them. To do this, from the Configuration column select the Save changes cell. Off-line editors such as MiCOM S1 Agile do not need this action for the setting changes to take effect.
3.2
DNP3 CONFIGURATION
To use the rear port with DNP3.0, you can configure the settings using the HMI . 1. 2. 3.
Select the CONFIGURATION column and check that the Comms settings cell is set to Visible. Select the COMMUNICATIONS column. Move to the first cell down (RP1 protocol). This is a non-settable cell, which shows the chosen communication protocol – in this case DNP3.0. COMMUNICATIONS RP1 Protocol DNP3.0
P14D-B/G/L/Z-TM-EN-1
59
Chapter 4 - Configuration
4.
P14D
Move down to the next cell (RP1 Address). This cell controls the DNP3.0 address of the IED. Up to 32 IEDs can be connected to one spur, therefore it is necessary for each IED to have a unique address so that messages from the master control station are accepted by only one IED. DNP3.0 uses a decimal number between 1 and 65519 for the IED address. It is important that no two IEDs have the same address. COMMUNICATIONS RP1 Address 1
5.
Move down to the next cell (RP1 Baud Rate). This cell controls the baud rate to be used. Six baud rates are ed by the IED 1200 bps, 2400 bps, 4800 bps, 9600 bps, 19200 bps and 38400 bps. Make sure that the baud rate selected on the IED is the same as that set on the master station. COMMUNICATIONS RP1 Baud rate 9600 bits/s
6.
Move down to the next cell (RP1 Parity). This cell controls the parity format used in the data frames. The parity can be set to be one of None, Odd or Even. Make sure that the parity format selected on the IED is the same as that set on the master station. COMMUNICATIONS RP1 Parity None
7.
If the optional fibre optic connectors are fitted, the RP1 PhysicalLink cell is visible. This cell controls the physical media used for the communication (Copper or Fibre optic). COMMUNICATIONS RP1 PhysicalLink Copper
8.
Move down to the next cell (RP1 Time Sync). This cell sets the time synchronisation request from the master by the IED. It can be set to enabled or disabled. If enabled it allows the DNP3.0 master to synchronise the time. COMMUNICATIONS RP1 Time sync Enabled
3.2.1
DNP3 CONFIGURATOR
A PC package for DNP3.0 is available as part of the supplied settings application software (MiCOM S1 Agile) to allow configuration of the device's DNP3.0 response. The configuration data is ed from the device to the PC in a block of compressed format data and ed in a similar manner after modification. The new DNP3.0 configuration takes effect after the is complete. To restore the default configuration at any time, from the CONFIGURATION column, select the Restore Defaults cell then select 'All Settings'.
60
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 4 - Configuration
In MiCOM S1 Agile, the DNP3.0 data is shown in three main folders, one folder each for the point configuration, integer scaling and default variation (data format). The point configuration also includes screens for binary inputs, binary outputs, counters and analogue input configuration.
3.3
IEC 60870-5-103 CONFIGURATION
To use the rear port with IEC 60870-5-103, you can configure the settings using the HMI . The device operates as a slave in the system, responding to commands from a master station. 1. 2. 3.
Select the CONFIGURATION column and check that the Comms settings cell is set to Visible. Select the COMMUNICATIONS column. Move to the first cell down (RP1 protocol). This is a non-settable cell, which shows the chosen communication protocol – in this case IEC 60870-5-103. COMMUNICATIONS RP1 Protocol IEC 60870-5-103
4.
Move down to the next cell (RP1 Address). This cell controls the IEC 60870-5-103 address of the IED. Up to 32 IEDs can be connected to one spur. It is therefore necessary for each IED to have a unique address so that messages from the master control station are accepted by one IED only. IEC 60870-5-103 uses an integer number between 0 and 254 for the IED address. It is important that no two IEDs have the same IEC 60870 5 103 address. The IEC 60870-5-103 address is then used by the master station to communicate with the IED. COMMUNICATIONS RP1 address 162
5.
Move down to the next cell (RP1 Baud Rate). This cell controls the baud rate to be used. Two baud rates are ed by the IED, ‘9600 bits/s’ and ‘19200 bits/s’. Make sure that the baud rate selected on the IED is the same as that set on the master station. COMMUNICATIONS RP1 Baud rate 9600 bits/s
6.
Move down to the next cell (RP1 Meas. period). The next cell down controls the period between IEC 60870-5-103 measurements. The IEC 60870-5-103 protocol allows the IED to supply measurements at regular intervals. The interval between measurements is controlled by this cell, and can be set between 1 and 60 seconds. COMMUNICATIONS RP1 Meas. Period 30.00 s
P14D-B/G/L/Z-TM-EN-1
61
Chapter 4 - Configuration
7.
P14D
If the optional fibre optic connectors are fitted, the RP1 PhysicalLink cell is visible. This cell controls the physical media used for the communication (Copper or Fibre optic). COMMUNICATIONS RP1 PhysicalLink Copper
8.
The next cell down (RP1 CS103Blcking) can be used for monitor or command blocking. COMMUNICATIONS RP1 CS103Blcking Disabled
9.
There are three settings associated with this cell; these are: Setting:
Description:
Disabled
No blocking selected.
Monitor Blocking
When the monitor blocking DDB Signal is active high, either by energising an opto input or control input, reading of the status information and disturbance records is not permitted. When in this mode the device returns a "Termination of general interrogation" message to the master station.
Command Blocking
When the command blocking DDB signal is active high, either by energising an opto input or control input, all remote commands will be ignored (i.e. CB Trip/Close, change setting group etc.). When in this mode the device returns a "negative acknowledgement of command" message to the master station.
3.4
MODBUS CONFIGURATION
To use the rear port with Modbus, you can configure the settings using the HMI . 1. 2. 3.
Select the CONFIGURATION column and check that the Comms settings cell is set to Visible. Select the COMMUNICATIONS column. Move to the first cell down (RP1 protocol). This is a non settable cell, which shows the chosen communication protocol – in this case Modbus. COMMUNICATIONS RP1 Protocol Modbus
4.
Move down to the next cell (RP1 Address). This cell controls the Modbus address of the IED. Up to 32 IEDs can be connected to one spur, therefore it is necessary for each IED to have a unique address so that messages from the master control station are accepted by only one IED. Modbus uses a decimal number between 1 and 247 for the IED address. It is important that no two IEDs have the same address. COMMUNICATIONS RP1 Address 1
62
P14D-B/G/L/Z-TM-EN-1
P14D
5.
Chapter 4 - Configuration
Move down to the next cell (RP1 InactivTimer). This cell controls the inactivity timer. The inactivity timer controls how long the IED waits without receiving any messages on the rear port before it reverts to its default state, including revoking any access that was enabled. For the rear port this can be set between 1 and 30 minutes.
COMMUNICATIONS RP1 Inactivtimer 10.00 mins 6.
Move down to the next cell (RP1 Baud Rate). This cell controls the baud rate to be used. Six baud rates are ed by the IED 1200 bits/s, 2400 bits/s, 4800 bits/s, 9600 bits/s, 19200 bits/s and 38400 bits/s. Make sure that the baud rate selected on the IED is the same as that set on the master station. COMMUNICATIONS RP1 Baud rate 9600 bits/s
7.
Move down to the next cell (RP1 Parity). This cell controls the parity format used in the data frames. The parity can be set to be one of None, Odd or Even. Make sure that the parity format selected on the IED is the same as that set on the master station. COMMUNICATIONS RP1 Parity None
8.
Move down to the next cell (Modbus IEC Time). This cell controls the order in which the bytes of information are transmitted. There is a choice of Standard or Reverse. When ‘Standard’ is selected the time format complies with IEC 60870-5-4 requirements such that byte 1 of the information is transmitted first, followed by bytes 2 through to 7. If ‘Reverse’ is selected the transmission of information is reversed. COMMUNICATIONS Modbus IEC Time Standard
3.5
IEC 61850 CONFIGURATION
You cannot configure the device for IEC 61850 using the HMI on the product. For this you must use the IED Configurator. IEC 61850 allows IEDs to be directly configured from a configuration file. The IED’s system configuration capabilities are determined from an IED Capability Description file (ICD), supplied with the product. By using ICD files from the products to be installed, you can design, configure and even test (using simulation tools), a substation’s entire protection scheme before the products are even installed into the substation. To help with this process, the settings application software provides an IED Configurator tool, which allows the pre-configured IEC 61850 configuration file to be imported and transferred to the IED. As well as this, you can manually create configuration files for MiCOM IEDs, based on their original IED capability description (ICD file).
P14D-B/G/L/Z-TM-EN-1
63
Chapter 4 - Configuration
P14D
Other features include: ● The extraction of configuration data for viewing and editing. ● A sophisticated error checking sequence to validate the configuration data before sending to the IED. Note: To help the , some configuration data is available in the IED CONFIGURATOR column, allowing read-only access to basic configuration data.
3.5.1
IEC 61850 CONFIGURATION BANKS
To help version management and minimise down-time during system upgrades and maintenance, the MiCOM IEDs have incorporated a mechanism consisting of multiple configuration banks. These configuration banks fall into two categories: ● Active Configuration Bank ● Inactive Configuration Bank Any new configuration sent to the IED is automatically stored in the inactive configuration bank, therefore not immediately affecting the current configuration. When the upgrade or maintenance stage is complete, the IED Configurator tool can be used to transmit a command, which authorises activation of the new configuration contained in the inactive configuration bank. This is done by switching the active and inactive configuration banks. The capability of switching the configuration banks is also available using the IED CONFIGURATOR column of the HMI. The SCL Name and Revision attributes of both configuration banks are also available in the IED CONFIGURATOR column of the HMI.
3.5.2
IEC 61850 NETWORK CONNECTIVITY
Configuration of the IP parameters and SNTP time synchronisation parameters is performed by the IED Configurator tool. If these parameters are not available using an SCL file, they must be configured manually. As the IP addressing will be completely detached and independent from any public network, it is up to the company’s system to establish the IP addressing strategy. Every IP address on the network must be unique. This applies to all devices on the network. Duplicate IP addresses will result in conflict and must be avoided. The IED will check for a conflict on every IP configuration change and at power up. An alarm will be raised if an IP conflict is detected. The IED can be configured to accept data from other networks using the Gateway setting. If multiple networks are used, the IP addresses must be unique across networks.
64
P14D-B/G/L/Z-TM-EN-1
P14D
4
Chapter 4 - Configuration
DATE AND TIME CONFIGURATION
The Date and Time setting will normally be updated automatically by the chosen UTC (Universal Time Coordination) time synchronisation mechanism when the device is in service. This does not mean that you should dispense with configuring the date and time parameters during commissioning. It is desirable to have the correct date and time represented for the commissioning process, therefore this should be the first item to configure during the commissioning process. The date and time is set in the Date/Time cell in the DATE AND TIME column.
4.1
TIME ZONE COMPENSATION
The UTC time standard uses Greenwich Mean Time as its standard. Without compensation, this would be the date and time that would be displayed on the device irrespective of its location. It is obviously desirable for the device to display the local time corresponding to its geographical location. For this reason, it is possible to compensate for any difference between the local time and the UTC time. This is achieved with the settings LocalTime Enable and LocalTime Offset The LocalTime Enable has three setting options; 'Disabled', 'Fixed', and 'Flexible'. With 'Disabled', no local time zone is maintained. Time synchronisation from any interface will be used to directly set the master clock. All times displayed on all interfaces will be based on the master clock with no adjustment. With 'Fixed', a local time zone adjustment is defined using the LocalTime Offset setting and all non-IEC 61850 interfaces (which uses SNTP) are compensated to display the local time. With 'Flexible', a local time zone adjustment is defined using the LocalTime Offset setting and the non-local and non-IEC 61850 interfaces can be set to either the UTC zone or the local time zone. The local interfaces are always set to the local time zone and the Ethernet interface is always set to the UTC zone. The interfaces where you can select between UTC and Local Time are the serial interfaces RP1, RP2, DNP over Ethernet (if applicable) and Tunnelled Courier (if applicable). This is achieved by means of the following settings: ● ● ● ●
RP1 Time Zone RP2 Time Zone DNPOE Time Zone Tunnel Time Zone
The LocalTime Offset setting allows you to enter the local time zone compensation from -12 to + 12 hours at 15 minute intervals.
4.2
DAYLIGHT SAVING TIME COMPENSATION
It is possible to compensate for Daylight Saving time using the following settings ● ● ● ● ● ● ●
DST Enable DST Offset DST Start DST Start Day DST Start Month DST Start Mins DST End
P14D-B/G/L/Z-TM-EN-1
65
Chapter 4 - Configuration
P14D
● DST End Day ● DST End Month ● DST End Mins These settings are described in the DATE AND TIME settings table in the configuration chapter.
66
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 4 - Configuration
5
CONFIGURATION SETTINGS
5.1
SYSTEM DATA
Menu Text
Col
Row
Default Setting
Available Options
Description SYSTEM DATA
00
00
This column contains general system settings and records Language
00
01
English
0 = English, 1 = French 2 = German 3 = Spanish
This setting defines the default language used by the device for ordering option language = 0 Language
00
01
English
0 = English, 1 = Italian, 2 = Portuguese, 3 = Russian
This setting defines the default language used by the device for ordering option language = 6
00
02
ASCII text (characters 33 to 122 inclusive)
This setting defines the plain text . Sys Fn Links
00
03
0
Binary flag (data type G95) Bit 0 = 0: Disable self reset Bit 0 = 1: Enable self reset
This setting allows the fixed function trip LED to be self resetting (set to 1 to extinguish the LED after a period of healthy restoration of load current). Only bit 0 is used. Description
00
04
MiCOM P14N MiCOM P14D MiCOM P94V
ASCII text
In this cell, you can enter and edit a 16 character IED description. Plant Reference
00
05
MiCOM
Extended ASCII text (characters 32 to 234 inclusive)
In this cell, you can enter and edit a 16 character plant description. Model Number
00
06
Model Number
<Model number>
This cell displays the IED model number. This cannot be edited. Serial Number
00
08
Serial Number
<Serial number>
This cell displays the IED serial number. This cannot be edited Frequency
00
09
50
50 Hz, 60 Hz
This cell sets the mains frequency to either 50 Hz or 60 Hz Comms Level
00
0A
2
This cell displays the Courier communications conformance level IED Address
00
0B
255
0 to 255 (Courier) 0 to 247 (Modbus) 0 to 254 (CS103) 0 to 65519 (DNP3.0)
This cell sets the first rear port IED address. Available settings are dependent on the protocol. This setting can also be made in the COMMUNICATIONS column. IED Address
00
0B
1
0 to 255 (Courier) 0 to 247 (Modbus) 0 to 254 (CS103) 0 to 65519 (DNP3.0)
This cell sets the first rear port IED address. Available settings are dependent on the protocol. This setting can also be made in the COMMUNICATIONS column.
P14D-B/G/L/Z-TM-EN-1
67
Chapter 4 - Configuration
Menu Text
P14D
Col
Row
Default Setting
Available Options
Description IED Address
00
0B
1
0 to 255 (Courier) 0 to 247 (Modbus) 0 to 254 (CS103) 0 to 65519 (DNP3.0)
This cell sets the first rear port IED address. Available settings are dependent on the protocol. This setting can also be made in the COMMUNICATIONS column. IED Address
00
0B
1
0 to 255 (Courier) 0 to 247 (Modbus) 0 to 254 (CS103) 0 to 65519 (DNP3.0)
This cell sets the first rear port IED address. Available settings are dependent on the protocol. This setting can also be made in the COMMUNICATIONS column. Plant Status
00
Binary flag (data type G4) Bit 0 = CB 1 52A state (0 = closed 1 = open) Bit 1 = CB 2 52B state (0 = open, 1 = closed)
0C
This cell displays the circuit breaker plant status. The first two bits are used. One to indicate the 52A state and one to indicate the 52B state. Control Status
00
0D
00
0E
Not used
This cell is not used Active Group
1
1, 2, 3, 4
No Operation
0 = No Operation, 1 = Trip, 2 = Close
This cell displays the active settings group CB Trip/Close
00
10
s trip and close commands if enabled in the Circuit Breaker Control menu. CB Trip/Close
00
10
No Operation
0 = No Operation, 1 = Trip, 2 = Close
s trip and close commands if enabled in the Circuit Breaker Control menu. Software Ref. 1
00
11
<Software Ref. 1>
This cell displays the IED software version including the protocol and IED model. Software Ref. 2
00
12
<Software Ref. 2>
This cell displays the software version of the Ethernet card for models equipped with IEC 61850. Opto I/P Status
00
20
32 bit binary flag (data type G8): 0 = energised 1 = de-energised
This cell displays the status of the available opto-inputs. This information is also available in the COMMISSIONING TESTS column Relay O/P Status
00
21
32 bit binary flag (data type G9): 0 = operated state 1 = non-operated state
This cell displays the status of the available output relays.
68
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 4 - Configuration
Menu Text
Col
Row
Default Setting
Available Options
Description
Alarm Status 1
00
22
Binary flag (data type G96-1): Bit 2 = SG-opto Invalid 3 = Prot'n Disabled 4 = F out of Range 5 = VT Fail Alarm 6 = CT Fail Alarm 7 = CB Fail Alarm 8 = I^ Maint Alarm 9 = I^ Lockout Alarm 10 = CB Ops Maint 11 = CB Ops Lockout 12 = CB Op Time Maint 13 = CB Op Time Lock 14 = Fault Freq Lock 15 = CB Status Alarm 16 = Man CB Trip Fail ON/OFF 17 = Man CB Cls Fail ON/OFF 18 = Man CB Unhealthy ON/OFF 19 = Man No Checksync ON/OFF 20 = A/R Lockout ON/OFF 21 = A/R CB Unhealthy ON/OFF 22 = A/R No Checksync ON/OFF 23 = System Split ON/OFF 24 = UV Block ON/OFF Bits 25 to 31 = SR Alarms 1 to 7
This cell displays the status of the first 32 alarms as a binary string, including fixed and settable alarms. This information is repeated for system purposes. Opto I/P Status
00
30
Binary flag (data type G8): 0 = energised, 1 = deenergised
This cell display the status of the available opto-inputs. This information is repeated for system purposes. Relay O/P Status
00
40
Binary flag (data type G9): 0 = operated state, 1 = non-operated state
This cell displays the status of the available output relays.This information is repeated for system purposes.
P14D-B/G/L/Z-TM-EN-1
69
Chapter 4 - Configuration
Menu Text
P14D
Col
Row
Default Setting
Available Options
Description
Alarm Status 1
00
Binary flag (data type G96-1): Bit 2 = SG-opto Invalid 3 = Prot'n Disabled 4 = F out of Range 5 = VT Fail Alarm 6 = CT Fail Alarm 7 = CB Fail Alarm 8 = I^ Maint Alarm 9 = I^ Lockout Alarm 10 = CB Ops Maint 11 = CB Ops Lockout 12 = CB Op Time Maint 13 = CB Op Time Lock 14 = Fault Freq Lock 15 = CB Status Alarm 16 = Man CB Trip Fail ON/OFF 17 = Man CB Cls Fail ON/OFF 18 = Man CB Unhealthy ON/OFF 19 = Man No Checksync ON/OFF 20 = A/R Lockout ON/OFF 21 = A/R CB Unhealthy ON/OFF 22 = A/R No Checksync ON/OFF 23 = System Split ON/OFF 24 = UV Block ON/OFF Bits 25 to 31 = SR Alarms 1 to 7
50
This cell displays the status of the first 32 alarms as a binary string, including fixed and settable alarms. This information is repeated for system purposes. Alarm Status 2
00
32 bit Binary flag (data type G96-2): Bits 4 to 13 = SR Alarms 8 to 35 Bits 14 to 31 = MR alarms 18 to 35
51
This cell displays the status of the second set of 32 alarms as a binary string, including fixed and settable alarms. This cell uses data type G96-2.
Alarm Status 3
00
32 bit Binary flag (data type G228): Bit 0 = DC Supply Fail Bit 3 = GOOSE IED Absent Bit 4 = NIC Not Fitted Bit 5 = NIC No Response Bit 6 = NIC Fatal Error Bit 8 = Bad T/IP Cfg. Bit 10 = NIC Link Fail Bit 11 = NIC SW Mis-Match Bit 12 = IP Addr Conflict Bit 18 = Bad DNP Settings
52
This cell displays the status of the third set of alarms as a binary string, including fixed and settable alarms. This cell uses data type G228. Access Level
00
0 = Read Some, 1 = Read All, 2 = Read All + Write Some, 3 = Read All + Write All
D0
This cell displays the current access level. Level 1
00
D2
blank
ASCII text (characters 33 to 122 inclusive)
blank
ASCII text (characters 33 to 122 inclusive)
This setting allows you to change level 1. Level 1
00
D2
This setting allows you to change level 1 for Modbus only. Level 2
00
D3
AAAA
ASCII text (characters 33 to 122 inclusive)
AAAA
ASCII text (characters 33 to 122 inclusive)
This setting allows you to change level 2. Level 2
70
00
D3
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 4 - Configuration
Menu Text
Col
Row
Default Setting
Available Options
Description This setting allows you to change level 2 for Modbus only. Level 3
00
D4
AAAA
ASCII text (characters 33 to 122 inclusive)
AAAA
ASCII text (characters 33 to 122 inclusive)
This setting allows you to change level 3. Level 3
00
D4
This setting allows you to change level 3 for Modbus only. Security Feature
00
DF
This setting displays the level of cyber security implemented, 1 = phase 1.
00
E1
ASCII text (characters 33 to 122 inclusive)
This cell allows you to enter the encrypted . It is not visible via the interfaced. Level 1
00
E2
blank
ASCII text (characters 33 to 122 inclusive)
This setting allows you to change the encrypted level 1. This is not visible via the interface. Level 2
00
E3
AAAA
ASCII text (characters 33 to 122 inclusive)
This setting allows you to change the encrypted level 2. This is not visible via the interface. Level 3
00
E4
AAAA
ASCII text (characters 33 to 122 inclusive)
This setting allows you to change the encrypted level 3. This is not visible via the interface.
5.2
DATE AND TIME Menu Text
Col
Row
Default Setting
Available Options
Description DATE AND TIME
08
00
This column contains Date and Time stamp settings Date/Time
08
01
This setting defines the IED’s current date and time. IRIG-B Status
08
0 = Disabled 1 = RP1 2 = RP2
04
This setting enables or disables IRIG-B synchronisation and defines which rear port is to be used as an IRIG-B input. IRIG-B Status
08
05
0 = No Signal 1 = Signal Healthy 2 = No Error
13
Not Settable
This cell displays the IRIG-B status SNTP Status
08
This cell displays the SNTP time synchronisation status for IEC 61850 or DNP3 over Ethernet versions. LocalTime Enable
08
20
Fixed
0 = Disabled, 1 = Fixed or 2 = Flexible
Disabled: No local time zone will be maintained Fixed - Local time zone adjustment can be defined (all interfaces) Flexible - Local time zone adjustment can be defined (non-local interfaces) LocalTime Offset
08
21
0
From -720 mins to 720 mins step 15m
This setting specifies the offset for the local time zone from -12 hours to +12 hours in 15 minute intervals. This adjustment is applied to the time based on the UTC/GMT master clock. DST Enable
08
22
Enabled
0 = Disabled or 1 = Enabled
This setting turns daylight saving time adjustment on or off. DST Offset
08
P14D-B/G/L/Z-TM-EN-1
23
60
30 minutes, 60 minutes
71
Chapter 4 - Configuration
Menu Text
Col
P14D
Row
Default Setting
Available Options
Description This setting defines the daylight saving offset used for the local time adjustment. DST Start
08
24
0 = First, 1 = Second, 2 = Third, 3 = Fourth or 4 = Last
Last
This setting specifies the week of the month in which daylight saving time adjustment starts. DST Start Day
08
25
0 = Sunday, 1 = Monday, 2 = Tuesday, 3 = Wednesday, 4 = Thursday, 5 = Friday or 6 = Saturday
Sunday
This setting specifies the day of the week in which daylight saving time adjustment starts DST Start Month
08
26
0 = January, 1 = February, 2 = March, 3 = April, 4 = May, 5 = June, 6 = July, 7 = August, 8 = September, 9 = October, 10 = November or 11 = December
March
This setting specifies the month in which daylight saving time adjustment starts DST Start Mins
08
27
60
From 0 mins to 1425 mins step 15 mins
Setting to specify the time of day in which daylight saving time adjustment starts. This is set relative to 00:00 hours on the selected day when time adjustment is to start DST End
08
28
0 = First, 1 = Second, 2 = Third, 3 = Fourth or 4 = Last
Last
This setting specifies the week of the month in which daylight saving time adjustment ends DST End Day
08
29
0 = Sunday, 1 = Monday, 2 = Tuesday, 3 = Wednesday, 4 = Thursday, 5 = Friday or 6 = Saturday
Sunday
This setting specifies the day of the week in which daylight saving time adjustment ends. DST End Month
08
2A
0 = January, 1 = February, 2 = March, 3 = April, 4 = May, 5 = June, 6 = July, 7 = August, 8 = September, 9 = October, 10 = November or 11 = December
October
This setting specifies the month in which daylight saving time adjustment ends. DST End Mins
08
2B
60
From 0m to 1425m step 15m
This setting specifies the time of day in which daylight saving time adjustment ends. This is set relative to 00:00 hours on the selected day when time adjustment is to end. RP1 Time Zone
08
30
Local
0 = UTC or 1 = Local
Setting for the rear port 1 interface to specify if time synchronisation received will be local or universal time co-ordinated. RP2 Time Zone
08
31
Local
0 = UTC or 1 = Local
Setting for the rear port 2 interface to specify if time synchronisation received will be local or universal time co-ordinated DNPOE Time Zone
08
32
Local
0 = UTC or 1 = Local
This setting specifies whether DNP3.0 over Ethernet time synchronisation is coordinated by local time or universal time. Tunnel Time Zone
08
33
Local
0 = UTC or 1 = Local
This setting specifies whether tunnelled Courier time synchronisation is coordinated by local time or universal time.
5.3
GENERAL CONFIGURATION Menu Text
Col
Row
Default Setting
Available Options
Description CONFIGURATION
09
00
This column contains the general configuration options
72
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 4 - Configuration
Menu Text
Col
Row
Default Setting
Available Options
Description Restore Defaults
09
01
No Operation
0 = No Operation, 1 = All Settings, 2 = Setting Group 1, 3 = Setting Group 2, 4 = Setting Group 3, 5 = Setting Group 4
This setting restores the chosen setting groups to factory default values. Note: Restoring defaults to all settings includes the rear communication port settings, which may result in communication via the rear port being disrupted if the new (default) settings do not match those of the master station. Setting Group
09
02
Select via Menu
0 = Select via Menu or 1 = Select via PSL
This setting allows you to choose whether the setting group changes are to be initiated via an Opto-input or the HMI menu. Active Settings
09
Group 1
0 = Group 1, 1 = Group 2, 2 = Group 3, 3 = Group 4
04
No Operation
0 = No Operation, 1 = Save, 2 = Abort
05
Group 1
0 = Group 1, 1 = Group 2, 2 = Group 3, 3 = Group 4
03
This setting selects the active settings group. Save Changes
09
This command saves all IED settings. Copy From
09
This setting copies settings from a selected setting group. Copy To
09
06
No Operation
0 = No Operation, 1 = Group 1, 2 = Group 2, 3 = Group 3
This command allows the displayed settings to be copied to a selected setting group. Setting Group 1
09
07
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables settings Group 1. Setting Group 2
09
08
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables settings Group 2. Setting Group 3
09
09
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables settings Group 3. Setting Group 4
09
0A
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables settings Group 4. System Config
09
0B
Invisible
0 = Invisible or 1 = Visible
This setting hides or unhides the System Config menu. Overcurrent
09
10
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Phase Overcurrent Protection function. Neg Sequence O/C
09
11
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Negative Sequence Overcurrent Protection function. Broken Conductor
09
12
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Broken Conductor function. Earth Fault 1
09
13
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the measured Earth Fault Protection function. Earth Fault 2
09
14
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the derived Earth Fault Protection function. SEF Protection
09
15
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Sensitive Earth Fault Protection function. Residual O/V NVD
09
16
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Residual Overvoltage Protection function. Thermal Overload
P14D-B/G/L/Z-TM-EN-1
09
17
Disabled
0 = Disabled or 1 = Enabled
73
Chapter 4 - Configuration
Menu Text
Col
P14D
Row
Default Setting
Available Options
Description This setting enables or disables the Thermal Overload Protection function. Neg Sequence O/V
09
18
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Negative Sequence Overvoltage Protection function. Cold Load Pickup
09
19
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Cold Load Pickup protection. Selective Logic
09
1A
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the the Selective Logic element. Power Protection
09
1C
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Power protection function. Power Protection
09
1C
Disabled
0 = Disabled
This setting disables the Power protection function for Model B Volt Protection
09
1D
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Voltage protection. REF Protection
09
1E
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Restricted Earth Fault Protection. DC SupplyMonitor
09
1F
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the DC Supply Monitoring supervision function. CB Fail
09
20
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Circuit Breaker Fail Protection function. Supervision
09
21
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Supervision (VTS & CTS) functions. Fault Locator
09
22
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Fault Locator function. Fault Locator
09
22
Disabled
0 = Disabled
This setting disables the Fault Locator function for models B and G. System Checks
09
23
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the System Checks function (Check Synchronisation and Voltage Monitor). System Checks
09
23
Disabled
0 = Disabled
This setting disables the System Checks function (Check Synchronisation and Voltage Monitor) for some models Auto-Reclose
09
24
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Autoreclose function. Auto-Reclose
09
24
Disabled
0 = Disabled
This setting disables the Autoreclose function for some models Input Labels
09
25
Visible
0 = Invisible or 1 = Visible
This setting hides or unhides the Input Labels menu from the IED display. Output Labels
09
26
Visible
0 = Invisible or 1 = Visible
This setting hides or unhides the Output Labels menu from the IED display. Freq Protection
09
27
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Frequency Protection function. TransformerRatio
09
28
Visible
0 = Invisible or 1 = Visible
This setting hides or unhides the Transformer Ratios menu from the IED display. Record Control
74
09
29
Invisible
0 = Invisible or 1 = Visible
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 4 - Configuration
Menu Text
Col
Row
Default Setting
Available Options
Description This setting hides or unhides the Record Control menu from the IED display. Disturb Recorder
09
2A
Invisible
0 = Invisible or 1 = Visible
This setting hides or unhides the Disturbance Recorder menu from the IED display. Measure't Setup
09
2B
Invisible
0 = Invisible or 1 = Visible
This setting hides or unhides the Measurement Setup menu from the IED display. Comms Settings
09
2C
Visible
0 = Invisible or 1 = Visible
This setting hides or unhides the Communication Settings menu from the IED display. Commission Tests
09
2D
Visible
0 = Invisible or 1 = Visible
This setting hides or unhides the Commission Tests menu from the IED display. Setting Values
09
2E
Primary
0 = Primary or 1 = Secondary
This setting determines the reference for all settings dependent on the transformer ratios; either referenced to the primary or the secondary. Control Inputs
09
2F
Visible
0 = Invisible or 1 = Visible
Activates the Control Input status and operation menu further on in the IED setting menu. Ctrl I/P Config
09
35
Visible
0 = Invisible or 1 = Visible
Sets the Control Input Configuration menu visible further on in the IED setting menu. Ctrl I/P Labels
09
36
Visible
0 = Invisible or 1 = Visible
Sets the Control Input Labels menu visible further on in the IED setting menu. HIF Detection
09
37
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the High Impedance (HIF) function. Direct Access
09
39
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables direct control of the Circuit Breakers from the IED's hotkeys. Function Key
09
50
Visible
0 = Disabled or 1 = Enabled
This setting enables or disables the Function Key menu. RP1 Read Only
09
FB
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables Read Only Mode for Rear Port 1. RP2 Read Only
09
FC
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables Read Only Mode for Rear Port 2. NIC Read Only
09
FD
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables Read Only Mode of the Network Interface Card for Ethernet models. LCD Contrast
09
FF
11
0 to 31 step 1
This setting sets the LCD contrast.
5.4
TRANSFORMER RATIOS Menu Text
Col
Row
Default Setting
Available Options
Description TRANS. RATIOS
0A
00
This column contains settings for Current and Voltage Transformer ratios Main VT Primary
0A
01
110
100 V to 1 MV step 1 V
This setting sets the main voltage transformer input primary voltage. Main VT Sec'y
0A
02
110
80 V to 140 V step 0.2 V
This setting sets the main voltage transformer input secondary voltage.
P14D-B/G/L/Z-TM-EN-1
75
Chapter 4 - Configuration
Menu Text
Col
P14D
Row
Default Setting
Available Options
Description C/S VT Primary
0A
03
110
100 V to 1 MV step 1 V
This setting sets the System Check Synchronism voltage transformer input primary voltage. C/S VT Secondary
0A
04
110
80 V to 140 V step 0.2 V
This setting sets the System Check Synchronism voltage transformer input secondary voltage. NVD VT Primary
0A
05
110
100 V to 1 MV step 1 V
This setting sets the NVD transformer input primary voltage. NVD VT Secondary
0A
06
110
80 V to 140 V step 0.2 V
This setting sets the NVD transformer input secondary voltage. Phase CT Primary
0A
07
1
From 1A to 30000A step 1A
This setting sets the phase current transformer input primary current rating. Phase CT Sec'y
0A
08
1
1A or 5A
This setting sets the phase current transformer input secondary current rating. E/F CT Primary
0A
09
1
From 1A to 30000A step 1A
This setting sets the earth fault current transformer input primary current rating. E/F CT Secondary
0A
0A
1
1A or 5A
This setting sets the earth fault current transformer input secondary current rating. SEF CT Primary
0A
0B
1
From 1A to 30000A step 1A
This setting sets the sensitive earth fault current transformer input primary current rating. SEF CT Secondary
0A
0C
1
1A or 5A
Sets the sensitive earth fault current transformer input secondary current rating. C/S Input
0A
0F
A-N
0 = AN, 1 = BN, 2 = CN, 3 = AB, 4 = BC, 5 = CA
This setting selects the System Check Synchronism Input voltage measurement. Main VT Location
0A
10
Line
0 = Line or 1 = Bus
1
From 0.1 to 5 step 0.001
This setting defines the Main VT Location. C/S V kSM
0A
14
This setting sets the voltage magnitude correction factor for check synchronism in case of different VT ratios. C/S Phase kSA
0A
15
0
From -150 to 180 step 30
This setting sets the phase angle correction factor for check synchronism.
5.5
SYSTEM CONFIGURATION Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 SYSTEM CONFIG
30
00
This column contains settings for setting the phase rotation and 2nd harmonic blocking Phase Sequence
30
02
Standard ABC
0=Standard ABC 1=Reverse ACB
This setting sets the phase rotation to standard (ABC) or reverse (ACB). Warning: This will affect the positive and negative sequence quantities calculated by the IED as well as other functions that are dependant on phase quantities.
76
P14D-B/G/L/Z-TM-EN-1
P14D
5.6
Chapter 4 - Configuration
SECURITY CONFIGURATION Menu Text
Col
Row
Default Setting
Available Options
Description SECURITY CONFIG
25
00
This column contains settings for the Cyber Security configuration Banner
25
01
ACCESS ONLY FOR AUTHORISED S
ASCII 32 to 234
With this setting, you can enter text for the NERC compliant banner. Attempts Limit
25
02
3
0 to 3 step 1
This setting defines the maximum number of failed attempts before action is taken. Attempts Timer
25
03
2
1 to 3 step 1
This setting defines the time window used in which the number of failed attempts is counted. Blocking Timer
25
04
5
1 to 30 step 1
This setting defines the time duration for which the is blocked, after exceeding the maximum attempts limit. Front Port
25
05
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the physical Front Port. Rear Port 1
25
06
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the primary physical rear port (RP1). Rear Port 2
25
07
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the secondary physical rear port (RP2). Ethernet Port
25
08
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the physical Ethernet Port Courier Tunnel
25
09
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the logical tunnelled Courier port IEC 61850
25
0A
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the logical IEC 61850 port. DNP3 OE
25
0B
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the logical DNP3 over Ethernet port. Attempts Remain
25
11
Not Settable
This cell displays the number of attempts remaining Blk Time Remain
25
12
Not Settable
This cell displays the remaining blocking time. Fallbck PW level
25
20
0 = Level 0, 1 = Level 1, 2 = Level 2, 3 = Level 3
This cell displays the level adopted by the IED after an inactivity timeout, or after the logs out. This will be either the level of the highest level that is blank, or level 0 if no s are blank. Security Code
25
FF
Not Settable
This cell displays the 16-character security code required when requesting a recovery .
P14D-B/G/L/Z-TM-EN-1
77
Chapter 4 - Configuration
78
P14D
P14D-B/G/L/Z-TM-EN-1
CURRENT PROTECTION FUNCTIONS CHAPTER 5
Chapter 5 - Current Protection Functions
80
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 5 - Current Protection Functions
CHAPTER OVERVIEW
The P14D provides a wide range of current protection functions. This chapter describes the operation of these functions including the principles, logic diagrams and applications. This chapter contains the following sections: Chapter Overview Overcurrent Protection Principles Phase Overcurrent Protection Voltage Dependent Overcurrent Element Cold Load Pickup Selective Overcurrent Logic Negative Sequence Overcurrent Protection Earth Fault Protection Sensitive Earth Fault Protection Restricted Earth Fault Protection Thermal Overload Protection Broken Conductor Protection Circuit Breaker Fail Protection Blocked Overcurrent Protection Second Harmonic Blocking Load Blinders High Impedance Fault Detection Current Transformer Requirements
P14D-B/G/L/Z-TM-EN-1
81 82 89 108 114 120 122 130 149 164 171 176 179 186 190 194 199 205
81
Chapter 5 - Current Protection Functions
2
P14D
OVERCURRENT PROTECTION PRINCIPLES
Most power system faults result in an overcurrent of one kind or another. It is the job of protection devices, formerly known as 'relays' but now known as Intelligent Electronic Devices (IEDs) to protect the power system from such faults. The general principle is to isolate the faults as quickly as possible to limit the danger and prevent unwanted fault currents flowing through systems, which can cause severe damage to equipment and systems. At the same time, we wish to switch off only the parts of the grid that are absolutely necessary, to prevent unnecessary blackouts. The protection devices that control the tripping of the grid's circuit breakers are highly sophisticated electronic units, providing an array of functionality to cover the different fault scenarios for a multitude of applications. The described products offer a range of overcurrent protection functions including: ● ● ● ● ●
Phase Overcurrent protection Earth Fault Overcurrent protection Negative Sequence Overcurrent protection Sensitive Earth Fault protection Restricted Earth Fault protection
To ensure that only the necessary circuit breakers are tripped and that these are tripped with the smallest possible delay, the IEDs in the protection scheme need to co-ordinate with each other. Various methods are available to achieve correct co-ordination between IEDs in a system. These are: ● By means of time alone ● By means of current alone ● By means of a combination of both time and current. Grading by means of current is only possible where there is an appreciable difference in fault level between the two locations where the devices are situated. Grading by time is used by some utilities but can often lead to excessive fault clearance times at or near source substations where the fault level is highest. For these reasons the most commonly applied characteristic in co-ordinating overcurrent devices is the IDMT (Inverse Definite Minimum Time) type.
2.1
IDMT CHARACTERISTICS
There are two basic requirements to consider when deg protection schemes: ● All faults should be cleared as quickly as possible to minimise damage to equipment ● Fault clearance should result in minimum disruption to the electrical power grid. The second requirement means that the protection scheme should be designed such that only the circuit breaker(s) in the protection zone where the fault occurs, should trip. These two criteria are actually in conflict with one another, because to satisfy (1), we increase the risk of shutting off healthy parts of the grid, and to satisfy (2) we purposely introduce time delays, which increase the amount of time a fault current will flow. This problem is exacerbated by the nature of faults in that the protection devices nearest the source, where the fault currents are largest, actually need the longest time delay. The old electromechanical relays countered this problem somewhat due to their natural operate time v. fault current characteristic, whereby the higher the fault current, the quicker the operate time. The characteristic typical of these electromechanical relays is called Inverse Definite Minimum Time or IDMT for short.
82
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
2.1.1
IEC60255 IDMTCURVES
There are three well-known variants of this characteristic, as defined by IEC 60255: ● Inverse ● Very inverse ● Extremely inverse These equations and corresponding curves governing these characteristics are very well known in the power industry. Inverse The curve is very steep. The relay can operate at low values of fault current, but at high fault currents has a significant operate time. The inverse characteristic equation is as follows:
top = T
0.14 I Is
0.02
−1
Very Inverse The curve lies somewhere between inverse and extremely inverse. The inverse characteristic equation is as follows.
top = T
13.5 I −1 Is
Extremely Inverse The curve is very shallow. The relay does not operate at very low values of fault current, but operates very quickly at high levels of fault current.
top = T
80 2
I −1 Is
In the above equations: ● top is the operating time ● T is the time multiplier setting ● I is the measured current ● Is is the current threshold setting. The ratio I/Is is sometimes defined as ‘M’ or ‘PSM’ (Plug Setting Multiplier). These three curves are plotted as follows:
P14D-B/G/L/Z-TM-EN-1
83
Chapter 5 - Current Protection Functions
P14D
Figure 15: IEC 60255 IDMT curves
2.1.2
EUROPEAN STANDARDS
The IEC 60255 IDMT Operate equation is:
β top = T α + L+C M −1 and the IEC 60255 IDMT Reset equation is:
β tr = T + L +C α 1− M where: ● top is the operating time ● T is the Time Multiplier setting ● M is the ratio of the measured current divided by the threshold current (I/Is) ● β is a constant, which can be chosen to satisfy the required curve characteristic ● α is a constant, which can be chosen to satisfy the required curve characteristic ● C is a constant for adding Definite Time (Definite Time adder) ● L is a constant (usually only used for ANSI/IEEE curves) The constant values for the IEC IDMT curves are as follows: b constant
Curve Description
a constant
L constant
IEC Standard Inverse Operate
0.14
0.02
0
IEC Standard Inverse Reset
8.2
6.45
0
IEC Very Inverse Operate
13.5
1
0
IEC Very Inverse Reset
50.92
2.4
0
IEC Extremely Inverse Operate
80
2
0
84
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
b constant
Curve Description
a constant
L constant
IEC Extremely Inverse Reset
44.1
3.03
0
UK Long Time Inverse Operate*
120
1
0
BPN (EDF) Operate*
1000
2
0.655
UK Rectifier Operate*
45900
5.6
0
FR Short Time Inverse Operate
0.05
0.04
0
Rapid Inverse (RI) characteristic The RI operate curve is represented by the following equation:
1 top = K 0.236 0.339 − M where: ● top is the operating time ● K is the Time Multiplier setting ● M is the ratio of the measured current divided by the threshold current (I/Is) Note: * When using UK Long Time Inverse, BPN, UK Rectifier, FR Short Time Inverse, or RI for the Operate characteristic, DT is always used for the Reset characteristic.
2.1.3
NORTH AMERICAN STANDARDS
The IEEE IDMT Operate equation is:
β top = TD α + L+C M −1 and the IEEE IDMT Reset equation is:
β top = TD + L+C α 1− M where: ● top is the operating time ● TD is the Time Dial setting ● M is the ratio of the measured current divided by the threshold current (I/Is) ● b is a constant, which can be chosen to satisfy the required curve characteristic ● a is a constant, which can be chosen to satisfy the required curve characteristic ● C is a constant for adding Definite Time (Definite Time adder) ● L is a constant (usually only used for ANSI/IEEE curves) The constant values for the IEEE curves are as follows: Curve Description IEEE Moderately Inverse Operate
P14D-B/G/L/Z-TM-EN-1
b constant 0.0515
a constant 0.02
L constant 0.114
85
Chapter 5 - Current Protection Functions
P14D
b constant
Curve Description
a constant
L constant
IEEE Moderately Inverse Reset
4.85
2
0
IEEE Very Inverse Operate
19.61
2
0.491
IEEE Very Inverse Reset
21.6
2
0
IEEE Extremely Inverse Operate
28.2
2
0.1217
IEEE Extremely Inverse Reset
29.1
2
0
CO8 US Inverse Operate
5.95
2
0.18
CO8 US Inverse Reset
5.95
2
0
CO2 US Short Time Inverse Operate
0.16758
0.02
0.11858
CO2 US Short Time Inverse Reset
2.261
2
0
ANSI Normally Inverse Operate
8.9341
2.0938
0.17966
ANSI Normally Inverse Reset
9
2
0
ANSI Short Time Inverse Operate
0.03393
1.2969
0.2663
ANSI Short Time Inverse Reset
0.5
2
0
ANSI Long Time Inverse Operate
2.18592
1
5.6143
ANSI Long Time Inverse Reset
15.75
2
0
Note: * When using UK Long Time Inverse, BPN, UK Rectifier, or FR Short Time Inverse for the Operate characteristic, DT is always used for the Reset characteristic.
2.1.4
DIFFERENCES BETWEEN THE NORTH AMERICAN AND EUROPEAN STANDARDS
The IEEE and US curves are set differently to the IEC/UK curves, with regard to the time setting. A time multiplier setting (TMS) is used to adjust the operating time of the IEC curves, whereas a time dial setting is used for the IEEE/US curves. The menu is arranged such that if an IEC/UK curve is selected, the I> Time Dial cell is not visible and vice versa for the TMS setting. For both IEC and IEEE/US type curves, a definite time adder setting is available, which will increase the operating time of the curves by the set value.
2.1.5
PROGRAMMABLE CURVES
As well as the standard curves as defined by various countries and standardising bodies, it is possible to program custom curves using Alstom Grid's Programmable Curve Tool, described in the MiCOM S1 Agile chapter. This is a -friendly tool by which you can create curves either by formula or by entering data points. Programmable curves help you to match more closely the withstand characteristics of the electrical equipment than standard curves.
2.2
PRINCIPLES OF IMPLEMENTATION
The MiCOM range of protection products provides a very wide range of protection functionality. Despite the diverse range of functionality provided, there is some commonality between the way many of the protection functions are implemented. It is important to describe some of these basic principles before going deeper into the individual protection functions. A very simple representation of protection functionality is shown in the following diagram:
86
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Energising quantity
Start signal IDMT/DT
Threshold
&
&
&
Trip Signal
Function inhibit Stage Blocking signals
Timer Settings
1 Stage Blocking settings Voltage
Directional Check
Current Timer Blocking signals 1 Timer Blocking settings
Key: Energising Quanitity
AND gate
&
OR gate
1
Timer
External DDB Signal Setting cell
Comparator
Internal function V00654
Figure 16: Principle of Protection Function Implementation An energising quantity is either a voltage input from a system voltage transformer, a current input from a system current transformer or another quantity derived from one or both of these. The energising quantities are extracted from the power system and presented to the IED in the form of analogue signals. These analogue signals are then converted to digital quantities where they can be processed by the IEDs internal computer. In general, an energising quantity, be it a current, voltage, power, frequency, or phase quantity, is compared with a threshold value, which may be settable, or hard-coded depending on the function. If the quantity exceeds (for overvalues) or falls short of (for undervalues) the threshold, a signal is produced, which when gated with the various inhibit and blocking functions becomes the Start signal for that protection function. This Start signal is generally made available to Fixed Scheme logic and Programmable scheme logic for further processing. It is also ed through a timer function to produce the Trip signal. The timer function may be an IDMT curve, or a Definite Time delay, depending on the function. This timer may also be blocked with timer blocking signals and settings. The timer can be configured by a range of settings to define such parameters as the type of curve, The Time Multiplier Setting, the IDMT constants, the Definite Time delay etc. Many protection functions require a direction-dependent decision. Such functions can only be implemented where both current and voltage inputs are available. For such functions, a directional check is required, whose output can block the Start signal should the direction of the fault be wrong. In MiCOM products, there are usually several independent stages for each of the functions, and for threephase functions, there are usually independent stages for each of the three phases. Typically in MiCOM products, stages 1,2 and 5 (if available) use an IDMT timer function, whilst stages 3,4 and 6 (if available) use a Definite Time timer function. If the DT time delay is set to '0', then the function is known to be "instantaneous". In many instances, the term 'instantaneous protection" is used loosely to describe Definite Time protection stages, even when the stage may not theoretically be instantaneous.
P14D-B/G/L/Z-TM-EN-1
87
Chapter 5 - Current Protection Functions
2.2.1
P14D
TIMER HOLD FACILITY
This feature may be useful in certain applications, such as when grading with upstream electromechanical overcurrent relays, which have inherent reset time delays. If you set the hold timer to a value other than zero, the resetting of the protection element timers will be delayed for this period. This allows the element to behave in a similar way to an electromechanical relay. If you set the hold timer to zero, the overcurrent timer for that stage will reset instantaneously as soon as the current falls below a specified percentage of the current setting (typically 95%). Another possible situation where the timer hold facility may be used to reduce fault clearance times is for intermittent faults. An example of this may occur in a plastic insulated cable. In this application it is possible that the fault energy melts and reseals the cable insulation, thereby extinguishing the fault. This process repeats to give a succession of fault current pulses, each of increasing duration with reducing intervals between the pulses, until the fault becomes permanent. When the reset time is instantaneous, the device will repeatedly reset and not be able to trip until the fault becomes permanent. By using the Timer Hold facility the device will integrate the fault current pulses, thereby reducing fault clearance time. The Timer Hold facility is only available for stages with IDMT functionality , and is controlled by the timer reset settings for the relevant stages (e.g. I>1 tReset, I>2 tReset ). These cells are not visible for the IEEE/US curves if an inverse time reset characteristic has been selected, because in this case the reset time is determined by the time dial setting (TDS).
88
P14D-B/G/L/Z-TM-EN-1
P14D
3
Chapter 5 - Current Protection Functions
PHASE OVERCURRENT PROTECTION
Phase current faults are faults where fault current flows between two or more phases of a three-phase power system. The fault current may be between the phase conductors only or, between two or more phase conductors and earth. There are three types of phase fault: ● Line to Line (ing for approximately 8% of all faults) ● Line to Line to Earth (ing for approximately 5% of all faults) ● Line to Line to Line (ing for approximately 2% of all faults) Although not as common as earth faults (single line to earth), phase faults are typically more severe. An example of a phase fault is where a fallen tree branch bridges two or more phases of an overhead line.
3.1
PHASE OVERCURRENT PROTECTION IMPLEMENTATION
Phase Overcurrent Protection is implemented in the OVERCURRENT column of the relevant settings group. The product provides six stages of three-phase overcurrent protection with independent time delay characteristics. All settings apply to all three phases but are independent for each of the six stages. Stages 1, 2 and 5 provide a choice of operate and reset characteristics, where you can select between: ● A range of standard IDMT (Inverse Definite Minimum Time) curves ● A range of -defined curves ● DT (Definite Time) This is achieved using the cells ● I>(n) Function for the overcurrent operate characteristic ● I>(n) Reset Char for the overcurrent reset characteristic ● I>(n) Usr RstChar for the reset characteristic for -defined curves where (n) is the number of the stage. The IDMT-capable stages, (1,2 and 5) also provide a Timer Hold facility (on page 88). This is configured using the cells I>(n) tReset, where (n) is the number of the stage. This is not applicable for curves based on the IEEE standard. Stages 3, 4 and 6 can have definite time characteristics only.
P14D-B/G/L/Z-TM-EN-1
89
Chapter 5 - Current Protection Functions
3.2
P14D
NON-DIRECTIONAL OVERCURRENT LOGIC IA
I>(n) Start A IDMT/DT
I> Threshold*1
&
IA2H Start I> Blocking 2H Blocks I>(n)
&
I>(n) Trip A
&
2H 1PH Block
A LoadBlinder I> Blocking 2
Timer Settings*4
*2
Blinder Blk I>(n)
&
Blinder Function 1Ph(based on Z)
I>(n) Start B
IB IDMT/DT
I> Threshold*1
&
IB2H Start I> Blocking 2H Blocks I>(n)
&
I>(n) Trip B
&
2H 1PH Block
Timer Settings*4
B LoadBlinder *1 I> Blocking 2 Blinder Blk I>(n)
&
Blinder Function 1Ph(based on Z)
I>(n) Start C
IC IDMT/DT
I> Threshold*1
&
IC2H Start I> Blocking 2H Blocks I>(n)
&
I>(n) Trip C
&
2H 1PH Block
C LoadBlinder *2 I> Blocking 2 Blinder Blk I>(n)
1
I>(n) Start
1
I>(n) Trip
Timer Settings*4
&
Blinder Function 1Ph(based on Z)
I2H Any Start I> Blocking 2H Blocks I>(n)
Key: &
External DDB Signal Setting cell
2H 1PH Block
Setting value
Z1 LoadBlinder *2 Blinder Function 3Ph(based on Z1)
Energising Quanitity
&
I> Blocking 2
Derived setting AND gate
&
OR gate
1
Blinder Blk I>(n)
I>(n) Timer Block AR Blk Main Prot
Timer
*3
I>Blocking
&
AR Blocks I>(n)
Comparator for detecting overvalues
V00601
Figure 17: Non-directional Overcurrent Logic Diagram
90
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Note: *1 The threshold settings are influenced by Voltage Dependent and Cold Load Pickup functionality *2 Load blinder functionality is only available for stages 1,2 and 5 and on selected models *3 Autoreclose blocking is only available for stages 3,4 and 6 and on selected models *4 The timer settings are influenced by Cold Load Pickup and Selective Overcurrent Logic
Phase Overcurrent Modules are level detectors that detect when the current magnitude exceeds a set threshold. When this happens, the Phase Overcurrent Module in question issues a signal, which is gated with some blocking signals to produce the Start signal. This Start signal is gated with other blocking signals and applied to the IDMT/DT timer module. It is also made available directly to the for use in the PSL. For each stage, there are three Phase Overcurrent Modules, one for each phase. The three Start signals from each of these phases are OR'd together to create a 3-phase Start signal. The outputs of the IDMT/DT timer modules are the trip signals which are used to drive the tripping output relay. These tripping signals are also OR'd together to create a 3-phase Trip signal. The IDMT/DT timer modules can be blocked by: ● A Phase Overcurrent Timer Block (I>(n) Timer Block) ● For models with Autoreclose functionality, an Autoreclose blocking signal, produced by the DDB AR Blk Main Prot and the relevant settings in the I>Blocking cell. This is only valid for the DT-only stages If any one of the above signals is high, or goes high before the timer has counted out, the IDMT/DT timer module is inhibited (effectively reset) until the blocking signal goes low again. There are separate phase overcurrent timer block signals, which are independent for each overcurrent stage. The start signal can be blocked by: ● The Second Harmonic blocking function on a per phase basis or for all three phases. The relevant bits are set in the I> Blocking cell and this is combined with the relevant second harmonic blocking DDBs. ● The Load Blinder function, on a per phase basis or for all three phases. The relevant bits are set in the I> Blocking 2 cell and this is combined with the relevant Load Blinder blocking DDBs. The G14 Data type is used for the I>Blocking setting: Bit number
I> Blocking function
Bit 0
VTS Blocks I>1
Bit 1
VTS Blocks I>2
Bit 2
VTS Blocks I>3
Bit 3
VTS Blocks I>4
Bit 4
VTS Blocks I>5
Bit 5
VTS Blocks I>6
Bit 6
AR Blocks I>3
Bit 7
AR Blocks I>4
Bit 8
AR Blocks I>6
Bit 9
2H Blocks I>1
Bit 10
2H Blocks I>2
Bit 11
2H Blocks I>3
Bit 12
2H Blocks I>4
Bit 13
2H Blocks I>5
Bit 14
2H Blocks I>6
Bit 15
2H 1PH Block
These can be set via the Front HMI or with the settings application software.
P14D-B/G/L/Z-TM-EN-1
91
Chapter 5 - Current Protection Functions
P14D
The Phase Overcurrent threshold setting can be influenced by the Cold Load Pickup (CLP) (on page 114) and Voltage Dependent Overcurrent (VDep OC) (on page 108) functions, if this functionality is available and used. Likewise, the timer settings can be influenced by the Selective Logic (on page 120) function.
3.3
CURRENT SETTING THRESHOLD SELECTION
The threshold setting used in the level detector depends on whether there is a Voltage Dependent condition or a Cold Load Pickup condition. The Overcurrent function selects the threshold setting according to the following diagram: Start
Does a Voltage Dependent condition exist?
Yes
Use the threshold setting calculated by the Voltage Dependent function
No
Does a cold Load Pickup condition exist?
Yes
Use the current threshold setting defined in the COLD LOAD PICKUP column
No
Use the current threshold setting defined in the OVERCURRENT column
End V00646
Figure 18: Selecting the current threshold setting
3.4
TIMER SETTING SELECTION
The timer settings used depend on whether there is a Selective Overcurrent condition or a Cold Load Pickup condition. The Overcurrent function selects the settings according to the following flow diagram:
92
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Start
Does a Selective Overcurrent condition exist?
Yes
Use the timer settings calculated by the Selective Overcurrent Logic function
No
Does a cold Load Pickup condition exist?
Yes
Use the timer settings defined in the COLD LOAD PICKUP column
No
Use the timer settings defined in the OVERCURRENT column
End V00652
Figure 19: Selecting the timer settings
3.5
DIRECTIONAL ELEMENT
If fault current can flow in both directions through a protected location, you will need to use a directional overcurrent element to determine the direction of the fault. Typical systems that require such protection are parallel feeders (both plain and transformer) and ring main systems, each of which are relatively common in distribution networks. To determine the direction of a phase overcurrent fault, the device must provide a voltage transformer input for each phase. Direction can be determined by establishing the phase angle between the measured voltage and the fault current. A directional element is available for all of the phase overcurrent stages in this device. These are found in the direction setting cells for the relevant stage (e.g. I>1 Direction, I>2 Direction). They can be set to nondirectional, directional forward, or directional reverse. Under system fault conditions, the fault current vector will lag its nominal phase voltage by an angle dependent upon the system X/R ratio. Therefore the device must operate with maximum sensitivity for currents lying in this region. This is achieved by means of the characteristic angle (RCA) setting, which defines the angle by which the applied current must be displaced from the applied voltage in order to obtain maximum sensitivity. This is set in cell I>Char Angle. You can set characteristic angles anywhere in the range from –95° to +95°.
3.5.1
SYNCHRONOUS POLARISATION
For a close up three-phase fault, all three voltages will collapse to zero and no healthy phase voltages will be present. For this reason, the device includes a synchronous polarisation feature that stores the pre-fault voltage information and continues to apply this to the directional overcurrent elements for a time period of a
P14D-B/G/L/Z-TM-EN-1
93
Chapter 5 - Current Protection Functions
P14D
few seconds. This ensures that either instantaneous or time-delayed directional overcurrent elements will be allowed to operate, even with a three-phase voltage collapse.
3.5.2
DIRECTIONAL OVERCURRENT LOGIC I>(n) Start A
IA IDMT/DT
I> Threshold IA2H Start I> Blocking 2H Blocks I>(n)
&
&
I>(n) Trip A
&
2H 1PH Block
Timer Settings
A LoadBlinder I> Blocking 2 Blinder Blk I>(n)
&
Blinder Function 1Ph(based on Z)
I2H Any Start I> Blocking 2H Blocks I>(n)
&
2H 1PH Block
Z1 LoadBlinder Blinder Function 3Ph(based on Z1)
&
Key:
I> Blocking 2
Energising Quanitity
Blinder Blk I>(n)
External DDB Signal
IA VAB I>(n) Direction
Setting cell Setting value
Non-Directional
Directional check
Directional FWD Directional REV
VTS Slow Block I> Blocking
Derived setting Internal Function
&
VTS Blocks I>(n)
AND gate
I>(n) Timer Block
OR gate
1
Timer
AR Blk Main Prot *3 I>Blocking
&
&
Comparator for detecting overvalues
AR Blocks I>(n)
V00602
Figure 20: Directional Overcurrent Logic Diagram The directional logic overcurrent logic works the same way as non-directional logic (on page 90) except that there is a Directional Check function, based on the following criteria: ● Directional forward: -90° < (angle(I) - angle(V) - RCA) < 90° ● Directional reverse: -90° > (angle(I) - angle(V) - RCA) > 90° The polarising voltages for each phase are as follows: Operate Current
Phase of Protection
Polarising Voltage
A Phase
IA
VBC
B Phase
IB
VCA
94
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Phase of Protection C Phase
Operate Current
Polarising Voltage
IC
VAB
When the element is selected as directional, blocking of the Voltage Transformer Supervision (VTS Block) is available (I>Blocking cell). When the relevant bit is set to 1, operation of the VTS will block the stage if directionalised. When set to 0, the stage will revert to non-directional upon operation of the VTS. This is shown in the G14 Data Type table in the non-directional logic (on page 90) section.
3.6 Ordinal
OVERCURRENT DDB SIGNALS Signal Name
Source
Type
Response
Description 203
I>1 Timer Block
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal blocks the first stage overcurrent time delay 204
I>2 Timer Block
Programmable Scheme Logic
This DDB signal blocks the second stage overcurrent time delay 205
I>3 Timer Block
Programmable Scheme Logic
This DDB signal blocks the third stage overcurrent time delay 206
I>4 Timer Block
Programmable Scheme Logic
This DDB signal blocks the fourth stage overcurrent time delay 243
I>1 Trip
Software
This DDB signal is the first stage any-phase Phase Overcurrent trip signal 244
I>1 Trip A
Software
This DDB signal is the first stage A-phase Phase Overcurrent trip signal 245
I>1 Trip B
Software
This DDB signal is the first stage B-phase Phase Overcurrent trip signal 246
I>1 Trip C
Software
This DDB signal is the first stage C-phase Phase Overcurrent trip signal 247
I>2 Trip
Software
This DDB signal is the second stage any-phase Phase Overcurrent trip signal 248
I>2 Trip A
Software
This DDB signal is the second stage A-phase Phase Overcurrent trip signal 249
I>2 Trip B
Software
This DDB signal is the second stage B-phase Phase Overcurrent trip signal 250
I>2 Trip C
Software
This DDB signal is the second stage C-phase Phase Overcurrent trip signal 251
I>3 Trip
Software
This DDB signal is the third stage any-phase Phase Overcurrent trip signal 252
I>3 Trip A
Software
This DDB signal is the third stage A-phase Phase Overcurrent trip signal 253
I>3 Trip B
Software
This DDB signal is the third stage B-phase Phase Overcurrent trip signal 254
I>3 Trip C
Software
This DDB signal is the third stage C-phase Phase Overcurrent trip signal 255
I>4 Trip
P14D-B/G/L/Z-TM-EN-1
Software
95
Chapter 5 - Current Protection Functions
Ordinal
Signal Name
P14D
Source
Type
Response
Description This DDB signal is the fourth stage any-phase Phase Overcurrent trip signal 256
I>4 Trip A
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
No response
This DDB signal is the fourth stage A-phase Phase Overcurrent trip signal 257
I>4 Trip B
Software
This DDB signal is the fourth stage B-phase Phase Overcurrent trip signal 258
I>4 Trip C
Software
This DDB signal is the fourth stage C-phase Phase Overcurrent trip signal 295
I>1 Start
Software
This DDB signal is the first stage any-phase Overcurrent start signal 296
I>1 Start A
Software
This DDB signal is the first stage A-phase Overcurrent start signal 297
I>1 Start B
Software
This DDB signal is the first stage B-phase Overcurrent start signal 298
I>1 Start C
Software
This DDB signal is the first stage C-phase Overcurrent start signal 299
I>2 Start
Software
This DDB signal is the second stage any-phase Overcurrent start signal 300
I>2 Start A
Software
This DDB signal is the second stage A-phase Overcurrent start signal 301
I>2 Start B
Software
This DDB signal is the second stage B-phase Overcurrent start signal 302
I>2 Start C
Software
This DDB signal is the second stage C-phase Overcurrent start signal 303
I>3 Start
Software
This DDB signal is the third stage any-phase Overcurrent start signal 304
I>3 Start A
Software
This DDB signal is the third stage A-phase Overcurrent start signal 305
I>3 Start B
Software
This DDB signal is the third stage B-phase Overcurrent start signal 306
I>3 Start C
Software
This DDB signal is the third stage C-phase Overcurrent start signal 307
I>4 Start
Software
This DDB signal is the fourth stage any-phase Overcurrent start signal 308
I>4 Start A
Software
This DDB signal is the fourth stage A-phase Overcurrent start signal 309
I>4 Start B
Software
This DDB signal is the fourth stage B-phase Overcurrent start signal 310
I>4 Start C
Software
This DDB signal is the fourth stage C-phase Overcurrent start signal 351
VTS Slow Block
Software
This DDB signal is a purposely delayed output from the VTS which can block other functions 358
96
AR Blk Main Prot
Software
PSL Input
Protection event
P14D-B/G/L/Z-TM-EN-1
P14D
Ordinal
Chapter 5 - Current Protection Functions
Signal Name
Source
Type
Response
Description This DDB signal, generated by the Autoreclose function, blocks the Main Protection elements (POC, EF1, EF2, NPSOC) 567
I>5 Timer Block
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal blocks the fifth stage overcurrent time delay 568
I>6 Timer Block
Programmable Scheme Logic
This DDB signal blocks the sixth stage overcurrent time delay 570
I>5 Trip
Software
This DDB signal is the fifth stage three-phase Phase Overcurrent trip signal 571
I>5 Trip A
Software
This DDB signal is the fifth stage A-phase Phase Overcurrent trip signal 572
I>5 Trip B
Software
This DDB signal is the fifth stage B-phase Phase Overcurrent trip signal 573
I>5 Trip C
Software
This DDB signal is the fifth stage C-phase Phase Overcurrent trip signal 574
I>6 Trip
Software
This DDB signal is the sixth stage three-phase Phase Overcurrent trip signal 575
I>6 Trip A
Software
This DDB signal is the sixth stage A-phase Phase Overcurrent trip signal 576
I>6 Trip B
Software
This DDB signal is the sixth stage B-phase Phase Overcurrent trip signal 577
I>6 Trip C
Software
This DDB signal is the sixth stage C-phase Phase Overcurrent trip signal 579
I>5 Start
Software
This DDB signal is the fifth stage three-phase Phase Overcurrent start signal 580
I>5 Start A
Software
This DDB signal is the fifth stage A-phase Phase Overcurrent start signal 581
I>5 Start B
Software
This DDB signal is the fifth stage B-phase Phase Overcurrent start signal 582
I>5 Start C
Software
This DDB signal is the fifth stage C-phase Phase Overcurrent start signal 583
I>6 Start
Software
This DDB signal is the sixth stage three-phase Phase Overcurrent start signal 584
I>6 Start A
Software
This DDB signal is the sixth stage A-phase Phase Overcurrent start signal 585
I>6 Start B
Software
This DDB signal is the sixth stage B-phase Phase Overcurrent start signal 586
I>6 Start C
Software
This DDB signal is the sixth stage C-phase Phase Overcurrent start signal 538
IA2H Start
Software
This DDB signal is the A-phase 2nd Harmonic start signal 539
IB2H Start
Software
This DDB signal is the B-phase 2nd Harmonic start signal 540
IC2H Start
P14D-B/G/L/Z-TM-EN-1
Software
97
Chapter 5 - Current Protection Functions
Ordinal
Signal Name
P14D
Source
Type
Response
Description This DDB signal is the C-phase 2nd Harmonic start signal 541
I2H Any Start
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the 2nd Harmonic start signal for any phase 630
A LoadBlinder
Software
This DDB signal is the Phase A Load Blinder signal, either direction 633
B LoadBlinder
Software
This DDB signal is the Phase B Load Blinder signal, either direction 636
C LoadBlinder
Software
This DDB signal is the Phase C Load Blinder signal, either direction 639
Z1 LoadBlinder
Software
This DDB signal is the 3-phase Load Blinder signal, either direction
3.7
OVERCURRENT SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 OVERCURRENT
35
00
This column contains settings for Overcurrent
I>1 Function
35
23
IEC S Inverse
0=Disabled 1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=UK Rectifier 7=RI 8=IEEE M Inverse 9=IEEE V Inverse 10=IEEE E Inverse 11=US Inverse 12=US ST Inverse 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the first stage overcurrent element. I>1 Direction
35
24
Non-Directional
0 = Non-Directional 1 = Directional Fwd 2 = Directional Rev
This setting determines the direction of measurement for the first stage overcurrent element. I>1 Current Set
35
27
1
From 0.05*In to 4.0*In step 0.01In
This setting sets the pick-up threshold for the first stage overcurrent element. I>1 Time Delay
35
29
1
From 0s to 100s step 0.01s
This setting sets the DT time delay for the first stage overcurrent element. I>1 TMS
35
2A
1
From 0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. I>1 Time Dial
98
35
2B
1
From 0.01 to 100 step 0.01
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. I>1 k (RI)
35
2C
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. I>1 DT Adder
35
2D
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. I>1 Reset Char
35
2E
DT
0=DT 1=Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. I>1 tRESET
35
2F
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
I>1 Usr RstChar
35
30
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves.
I>2 Function
35
32
Disabled
0=Disabled 1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=UK Rectifier 7=RI 8=IEEE M Inverse 9=IEEE V Inverse 10=IEEE E Inverse 11=US Inverse 12=US ST Inverse 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the second stage overcurrent element. I>2 Direction
35
33
Non-Directional
0 = Non-Directional 1 = Directional Fwd 2 = Directional Rev
This setting determines the direction of measurement for the second stage overcurrent element. I>2 Current Set
35
36
1
From 0.05*In to 4.0*In step 0.01In
This setting sets the pick-up threshold for the second stage overcurrent element. I>2 Time Delay
35
38
1
From 0s to 100s step 0.01s
This setting sets the DT time delay for the second stage element. I>2 TMS
35
39
1
From 0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. I>2 Time Dial
35
3A
1
From 0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. I>2 k (RI)
35
3B
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. I>2 DT Adder
35
P14D-B/G/L/Z-TM-EN-1
3C
0
From 0s to 100s step 0.01s
99
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting adds an additional fixed time delay to the IDMT Operate characteristic. I>2 Reset Char
35
3D
DT
0=DT 1=Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. I>2 tRESET
35
3E
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
I>2 Usr RstChar
35
3F
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves. I>3 Status
35
40
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the third stage overcurrent element. There is no choice of curves because this stage is DT only. I>3 Direction
35
41
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the third stage overcurrent element. I>3 Current Set
35
44
20
From 0.05*In to 32.0*In step 0.01In
This setting sets the pick-up threshold for the third stage overcurrent element. I>3 Time Delay
35
45
0
From 0s to 100s step 0.01s
This setting sets the DT time delay for the third stage overcurrent element. I>4 Status
35
47
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the fourth stage overcurrent element. There is no choice of curves because this stage is DT only. I>4 Direction
35
48
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the third stage overcurrent element. I>4 Current Set
35
4B
20
From 0.05*In to 32.0*In step 0.01In
This setting sets the pick-up threshold for the fourth stage overcurrent element. I>4 Time Delay
35
4C
0
From 0s to 100s step 0.01s
This setting sets the DT time delay for the fourth stage overcurrent element.
I> Blocking
100
35
4E
0x003F
Bit 0=VTS Blocks I>1 Bit 1=VTS Blocks I>2 Bit 2=VTS Blocks I>3 Bit 3=VTS Blocks I>4 Bit 4=VTS Blocks I>5 Bit 5=VTS Blocks I>6 Bit 6=AR Blocks I>3 Bit 7=AR Blocks I>4 Bit 8=AR Blocks I>6 Bit 9=2H Blocks I>1 Bit 10=2H Blocks I>2 Bit 11=2H Blocks I>3 Bit 12=2H Blocks I>4 Bit 13=2H Blocks I>5 Bit 14=2H Blocks I>6 Bit 15=2H 1PH Block
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description This setting cell contains a binary string where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models with Autoreclose, VTS and second harmonic blocking
I> Blocking
35
4E
0x003F
Bit 0=VTS Blocks I>1 Bit 1=VTS Blocks I>2 Bit 2=VTS Blocks I>3 Bit 3=VTS Blocks I>4 Bit 4=VTS Blocks I>5 Bit 5=VTS Blocks I>6 Bit 6=Unused Bit 7=Unused Bit 8=Unused Bit 9=2H Blocks I>1 Bit 10=2H Blocks I>2 Bit 11=2H Blocks I>3 Bit 12=2H Blocks I>4 Bit 13=2H Blocks I>5 Bit 14=2H Blocks I>6 Bit 15=2H 1PH Block
This setting cell contains a binary string where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models with VTS and second harmonic blocking. I> Char Angle
35
4F
45
From -95 to 95 step 1
This setting defines the characteristic angle for the directional element. This setting is aplicable to all overcurrent stages. I> Blocking 2
35
50
0x0
Bit 0=Blinder Blk I>1 Bit 1=Blinder Blk I>2 Bit 2=Blinder Blk I>5 Bit 3=unused
This setting cell contains a binary string (data type G406), where you can define which Load Blinder blocking signals block which stage.
I>5 Function
35
63
Disabled
0=Disabled 1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=UK Rectifier 7=RI 8=IEEE M Inverse 9=IEEE V Inverse 10=IEEE E Inverse 11=US Inverse 12=US ST Inverse 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the fifth stage overcurrent element. I>5 Direction
35
64
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the fifth stage overcurrent element. I>5 Current Set
35
67
1
From 0.05*In to 4.0*In step 0.01In
This setting sets the pick-up threshold for the fifth stage overcurrent element. I>5 Time Delay
35
P14D-B/G/L/Z-TM-EN-1
69
1
From 0s to 100s step 0.01s
101
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting sets the DT time delay for the fifth stage overcurrent element. I>5 TMS
35
6A
1
From 0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. I>5 Time Dial
35
6B
1
From 0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. I>5 k (RI)
35
6C
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. I>5 DT Adder
35
6D
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. I>5 Reset Char
35
6E
DT
0=DT 1=Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. I>5 tRESET
35
6F
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
I>5 Usr RstChar
35
70
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves. I>6 Status
35
71
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the sixth stage overcurrent element. There is no choice of curves because this stage is DT only. I>6 Direction
35
72
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the sixth stage overcurrent element. I>6 Current Set
35
75
20
From 0.05*In to 32.0*In step 0.01In
This setting sets the pick-up threshold for the sixth stage overcurrent element. I>6 Time Delay
35
76
0
From 0s to 100s step 0.01s
This setting sets the DT time delay for the sixth stage overcurrent element. V DEPENDANT O/C
35
81
The settings under this sub-heading relate to
V Dep OC Status
35
82
Disabled
0=Disabled 1=VCO I>1 2=VCO I>2 3=VCO I>1 & I>2 4=VCO I>5 5=VCO I>1&I>2&I>5 6=VCO I>1 & I>5 7=VCO I>2 & I>5 8=VRO I>1 9=VRO I>2 10=VRO I>5 11=VRO I>1 & I>2 12=VRO I>1 & I>5 13=VRO I>2 & I>5 14=VRO I>1&I>2&I>5
This setting cell contains a binary string (data type G100), where you can define which stages are influenced by the Voltage Controlled Overcurrent (VCO) and Voltage Restrained Overcurrent (VRO) functions. Note: Some models do not provide VRO.
102
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description
V Dep OC Status
35
82
Disabled
0=Disabled 1=VCO I>1 2=VCO I>2 3=VCO I>1 & I>2 4=VCO I>5 5=VCO I>1&I>2&I>5 6=VCO I>1 & I>5 7=VCO I>2 & I>5
Allows selection of whether voltage control should be applied to each of the first or second stage overcurrent elements. V Dep OC V<1 Set
35
83
80
From 10 to 120 step 1
This setting sets the voltage V1 threshold at which the current setting of the overcurrent stages becomes reduced. This is on a per phase basis. V Dep OC k Set
35
84
0.25
From 0.1 to 1 step 0.05
This setting determines the Overcurrent multiplier factor used to reduce the pick-up overcurrent setting. V Dep OC V<2 Set
35
85
60
From 10 to 120 step 1
This setting sets the voltage V2 threshold at which the current setting of the overcurrent stages becomes reduced. This is on a per phase basis. LOAD BLINDER
35
90
The settings under this sub-heading relate to the Load Blinder function Blinder Status
35
91
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the Load Blinder blocking function. Blinder Status
35
91
Disabled
0 = Disabled
This setting disables the Load Blinder blocking function for models B and G Blinder Function
35
92
3Ph(based on Z1)
0=3Ph(based on Z1) 1=1Ph(based on Z)
This setting sets the Load Blinder to three-phase or single-phase blocking. Blinder Mode
35
93
Both
0=Reverse 1=Forward 2=Both
This setting sets the Load Blinder direction measurement. FWD Z Impedance
35
94
15
From 0.1 to 500 step 0.01
This setting sets the Forward Impedance (in ohms) for the Load Blinder function. FWD Z Angle
35
95
30
From 5 to 85 step 1
This setting sets the Forward Angle (in degrees) for the Load Blinder function. RVS Z Impedance
35
97
15
From 0.1 to 500 step 0.01
This setting sets the Reverse Impedance (in ohms) for the Load Blinder function. RVS Z Angle
35
98
30
From 5 to 85 step 1
This setting sets the Reverse Angle (in degrees) for the Looad Blinder function. Blinder V< Block
35
9A
15
From 10 to 120 step 1
This setting sets the undervoltage threshold for the Load Blinder function. Blinder I2>Block
35
9B
0.2
From 0.08*I1 to 4*I1 step 0.01*I1
This setting sets the Negative Phase Sequence current threshold for the Load Blinder function. PU Cycles
35
9C
1
From 0 to 50 step 0.5
This setting sets the pick-up count threshold for the Load Blinder function. DO Cycles
35
9D
1
From 0 to 50 step 0.5
This setting sets the drop-off count threshold for the Load Blinder function.
P14D-B/G/L/Z-TM-EN-1
103
Chapter 5 - Current Protection Functions
3.8
APPLICATION NOTES
3.8.1
PARALLEL FEEDERS
P14D
E00603
Figure 21: Typical distribution system using parallel transformers In the application shown in the diagram, a fault at ‘F’ could result in the operation of both R3 and R4 resulting in the loss of supply to the 11 kV busbar. Hence, with this system configuration, it is necessary to apply directional protection devices at these locations set to 'look into' their respective transformers. These devices should co-ordinate with the non-directional devices, R1 and R2, to ensure discriminative operation during such fault conditions. In such an application, R3 and R4 may commonly require non-directional overcurrent protection elements to provide protection to the 11 kV busbar, in addition to providing a back-up function to the overcurrent devices on the outgoing feeders (R5). For this application, stage 1 of the R3 and R4 overcurrent protection would be set to non-directional and time graded with R5, using an appropriate time delay characteristic. Stage 2 could then be set to directional (looking back into the transformer) and also have a characteristic which provides correct co-ordination with R1 and R2. Directionality for each of the applicable overcurrent stages can be set in the cell I>Direction. Note: The principles outlined for the parallel transformer application are equally applicable for plain feeders that are operating in parallel.
104
P14D-B/G/L/Z-TM-EN-1
P14D
3.8.2
Chapter 5 - Current Protection Functions
RING MAIN ARRANGEMENTS
E00604
Figure 22: Typical ring main with associated overcurrent protection Current may flow in either direction through the various device locations, therefore directional overcurrent devices are needed to achieve correct discrimination. The normal grading procedure for overcurrent devices protecting a ring main circuit is to open the ring at the supply point and to grade the devices first clockwise and then anti-clockwise. The arrows shown at the various device locations depict the direction for forward operation of the respective devices (i.e. the directional devices are set to look into the feeder that they are protecting). The diagram shows typical time settings (assuming definite time co-ordination is used), from which it can be seen that any faults on the interconnections between stations are cleared discriminatively by the devices at each end of the feeder. Any of the overcurrent stages may be configured to be directional and co-ordinated, but bear in mind that IDMT characteristics are not selectable on all the stages.
3.8.3
SETTING GUIDELINES
Standard principles should be applied in calculating the necessary current and time settings. The example detailed below shows a typical setting calculation and describes how the settings are applied. This example is for a device feeding a LV switchboard and makes the following assumptions: ● CT Ratio = 500/1 ● Full load current of circuit = 450A ● Slowest downstream protection = 100A Fuse
P14D-B/G/L/Z-TM-EN-1
105
Chapter 5 - Current Protection Functions
P14D
The current setting on the device must for both the maximum load current and the reset ratio, therefore: I> must be greater than: 450/0.95 = 474A. The device allows the current settings to be applied in either primary or secondary quantities. This is done by setting the Setting Values cell of the CONFIGURATION column. When this cell is set to primary, all phase overcurrent setting values are scaled by the programmed CT ratio, which is found in the TRANS. RATIOS column [0A]. In this example, assuming primary currents are to be used, the ratio should be programmed as 500/1. The required setting is therefore 0.95A in of secondary current or 475A in of primary. A suitable time delayed characteristic will now need to be chosen. When co-ordinating with downstream fuses, the applied characteristic should be closely matched to the fuse characteristic. Therefore, assuming IDMT co-ordination is to be used, an Extremely Inverse (EI) characteristic would normally be chosen. This is found under the I>1 Function cell as 'IEC E Inverse'. Finally, a suitable time multiplier setting (TMS) must be calculated and entered in cell I>1 TMS.
3.8.4
SETTING GUIDELINES (DIRECTIONAL ELEMENT)
The applied current settings for directional overcurrent devices are dependent upon the application in question. In a parallel feeder arrangement, load current is always flowing in the non-operate direction. Hence, the current setting may be less than the full load rating of the circuit; typically 50% of In. Note: The minimum setting that may be applied has to take into the IEDs thermal rating. Some electro-mechanical directional overcurrent devices have continuous withstand ratings of only twice the applied current setting and hence 50% of rating was the minimum setting that could be applied. With the Px4x devices, the continuous current rating is 4 times rated current and so it is possible to apply much more sensitive settings if required.
You need to observe some setting constraints when applying directional overcurrent protection at the receiving-end of parallel feeders. These minimum safe settings are designed to ensure that there is no possibility of undesired tripping during clearance of a source fault. For a linear system load, these settings are as follows: ● Parallel plain feeders: Set to 50% pre-fault load current ● Parallel transformer feeders: Set to 87% pre-fault load current When the above setting constraints are infringed, independent-time protection is more likely to issue an unwanted trip than time-dependent protection, during clearance of a source fault. Where the above setting constraints are unavoidably infringed, secure phase fault protection can be provided with devices having '2out-of-3 directional protection' tripping logic. In a ring main application, it is possible for load current to flow in either direction through the relaying point. Therefore, the current setting must be above the maximum load current, as in a standard non-directional application. The required characteristic angle settings for directional devices will differ depending on the exact application in which they are used. Recommended characteristic angle settings are as follows: ● Plain feeders, or applications with an earthing point (zero sequence source) behind the device location, should use a +30° RCA setting ● Transformer feeders, or applications with a zero sequence source in front of the device location, should use a +45° RCA setting
106
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Whilst it is possible to set the RCA to exactly match the system fault angle, we recommend that you adhere to the above guidelines, as these settings provide satisfactory performance and stability under a wide range of system conditions.
P14D-B/G/L/Z-TM-EN-1
107
Chapter 5 - Current Protection Functions
4
P14D
VOLTAGE DEPENDENT OVERCURRENT ELEMENT
Overcurrent IEDs are co-ordinated throughout a system such that a cascaded operation is achieved. This means that the failure of a downstream circuit breaker to trip for a fault condition, whether due to the failure of a protection device, or of the breaker itself, should result in the tripping of the next upstream circuit breaker. However, where long feeders are protected by overcurrent IEDs, the detection of remote phase-to-phase faults may prove difficult due to the fact that the current pick-up of phase overcurrent elements must be set above the maximum load current, thereby limiting the element's minimum sensitivity. If the current seen by a local device for a remote fault condition is below its overcurrent setting, a voltage dependent element may be used to increase the sensitivity to such faults. As a reduction in system voltage will occur during overcurrent conditions, this may be used to enhance the sensitivity of the overcurrent protection by reducing the pick up level. Voltage dependent overcurrent devices are often applied in generator protection applications in order to give adequate sensitivity for close up fault conditions. The fault characteristic of this protection must then coordinate with any of the downstream overcurrent devices that are responsive to the current decrement condition. It therefore follows that if the device is to be applied to an outgoing feeder from a generator station, the use of voltage dependent overcurrent protection in the feeder device may allow better coordination with the Voltage Dependent device on the generator.
4.1
VOLTAGE DEPENDENT OVERCURRENT PROTECTION IMPLEMENTATION
Voltage Dependent Overcurrent Protection (VDep OC) is implemented in the OVERCURRENT column of the relevant settings group, under the sub-heading V DEPENDANT O/C. The function is available for stages 1,2 and 5 of the main overcurrent element. When VDep OC is enabled, the overcurrent threshold setting is modified when the voltage falls below a set threshold. If voltage dependant overcurrent operation is selected, the element can be set in one of two modes, voltage controlled overcurrent or voltage restrained overcurrent. The mode of operation is set in the V Dep OC Status cell according to the data type G100 as follows: The G100 Data type is an indexed string and is used for the V Dep OC Status setting: String number
V Dep OC Options
0
Disabled
1
VCO I>1
2
VCO I>2
3
VCO I>1 & I>2
4
VCO I>5
5
VCO I>1&I>2&I>5
6
VCO I>1 & I>5
7
VCO I>2 & I>5
8
VRO I>1
9
VRO I>2
10
VRO I>5
11
VRO I>1 & I>2
12
VRO I>1 & I>5
13
VRO I>2 & I>5
14
VRO I>1&I>2&I>5
108
P14D-B/G/L/Z-TM-EN-1
P14D
4.1.1
Chapter 5 - Current Protection Functions
VOLTAGE CONTROLLED OVERCURRENT PROTECTION
In Voltage Controlled Operation (VCO) mode of operation, the under voltage detector is used to produce a step change in the relay current setting, when the voltage falls below the voltage setting V Dep OC V<1 Set. The operating characteristic of the current setting when voltage controlled mode is selected is as follows:
E00642
Figure 23: Modification of current pickup level for voltage controlled overcurrent protection
4.1.2
VOLTAGE RESTRAINED OVERCURRENT PROTECTION
In Voltage Restrained Operation (VRO) mode the effective operating current of the protection element is continuously variable as the applied voltage varies between two voltage thresholds. This protection mode is considered to be better suited to applications where the generator is connected to the system via a generator transformer. With indirect connection of the generator, a solid phase-phase fault on the local busbar will result in only a partial phase-phase voltage collapse at the generator terminals. The voltage-restrained current setting is related to measured voltage as follows: ● If V is greater than V<1, the current setting (Ιs) = Ι> ● If V is greater than V<2 but less than V<1, the current setting (Ιs) =
KI > + ( I > − KI )
V −V < 2 V < 1−V < 2
● If V is less than V<2, the current setting (Ιs) = K.Ι> where: ● ● ● ● ●
Ι> = Over current stage setting Ιs = Current setting at voltage V V = Voltage applied to relay element V<1 = V Dep OC V<1 Set V<2 = V Dep OC V<2 Set
P14D-B/G/L/Z-TM-EN-1
109
Chapter 5 - Current Protection Functions
P14D
E00643
Figure 24: Modification of current pickup level for voltage restrained overcurrent protection
110
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
4.2
VOLTAGE DEPENDENT OVERCURRENT LOGIC V Dep OC Status VCO I>(n)
&
VRO I>(n)
1
Vdep OC Start AB
VAB V Dep OC V<1 Set I>(n) Current Set
X
I> Threshold
V Dep OC k Set
1
VAB
&
V Dep OC V<1 Set
Key:
I> (n)Current Set
Energising Quanitity
VAB
External DDB Signal
&
Setting cell
V Dep OC V<2 Set
Setting value I> (n)Current Set
Function
X V Dep OC k Set
Derived Setting
I> Threshold
VAB &
V Dep OC V<2 Set
AND gate
&
OR gate
Multiplier
X
Switch
1
&
VAB V Dep OC V<1 Set
Comparator for overvalues
V Dep OC k Set I>(n) Current Set
Functional Operator
VAB
Comparator for undervalues
V00644
Figure 25: Voltage dependant overcurrent logic (Phase A to phase B) The current threshold setting for the Overcurrent function is determined by the voltage. If the voltage is greater than V<1 Set, the normal overcurrent setting I>(n) current set is used. this applies to both VCO and VRO modes. If the voltage is less than V<1 Set AND it is in VCO mode, the overcurrent setting I>(n) current set is multiplied by the factor set by V Dep OC k set. If the voltage is less than V<2 Set AND it is in VRO mode, the overcurrent setting I>(n) current set is multiplied by the factor set by V Dep OC k set. If the voltage is between V<1 Set and V<2 Set AND it is in VRO mode, the overcurrent setting is multiplied by a functional operator to determine the setting.
P14D-B/G/L/Z-TM-EN-1
111
Chapter 5 - Current Protection Functions
4.3
P14D
VOLTAGE DEPENDENT OVERCURRENT DDB SIGNALS
Ordinal
English Text
Source
Type
Response Function
Description 311
VDep OC Start AB
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the Voltage Dependent Overcurrent start signal for phase A-B 312
VDep OC Start BC
Software
This DDB signal is the Voltage Dependent Overcurrent start signal for phase B-C 313
VDep OC Start CA
Software
This DDB signal is the Voltage Dependent Overcurrent start signal for phase C-A
4.4
VOLTAGE DEPENDENT OVERCURRENT SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description V DEPENDANT O/C
35
81
The settings under this sub-heading relate to
V Dep OC Status
35
82
Disabled
0=Disabled 1=VCO I>1 2=VCO I>2 3=VCO I>1 & I>2 4=VCO I>5 5=VCO I>1&I>2&I>5 6=VCO I>1 & I>5 7=VCO I>2 & I>5 8=VRO I>1 9=VRO I>2 10=VRO I>5 11=VRO I>1 & I>2 12=VRO I>1 & I>5 13=VRO I>2 & I>5 14=VRO I>1&I>2&I>5
This setting cell contains a binary string (data type G100), where you can define which stages are influenced by the Voltage Controlled Overcurrent (VCO) and Voltage Restrained Overcurrent (VRO) functions. Note: Some models do not provide VRO.
V Dep OC Status
35
82
Disabled
0=Disabled 1=VCO I>1 2=VCO I>2 3=VCO I>1 & I>2 4=VCO I>5 5=VCO I>1&I>2&I>5 6=VCO I>1 & I>5 7=VCO I>2 & I>5
Allows selection of whether voltage control should be applied to each of the first or second stage overcurrent elements. V Dep OC V<1 Set
35
83
80
From 10 to 120 step 1
This setting sets the voltage V1 threshold at which the current setting of the overcurrent stages becomes reduced. This is on a per phase basis. V Dep OC k Set
35
84
0.25
From 0.1 to 1 step 0.05
This setting determines the Overcurrent multiplier factor used to reduce the pick-up overcurrent setting. V Dep OC V<2 Set
35
85
60
From 10 to 120 step 1
This setting sets the voltage V2 threshold at which the current setting of the overcurrent stages becomes reduced. This is on a per phase basis.
112
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
4.5
APPLICATION NOTES
4.5.1
SETTING GUIDELINES
The V Dep OC k setting should be set low enough to allow operation for remote phase-to-phase faults, typically:
k=
IF 1.2 I >
where: ● IF = Minimum fault current expected for the remote fault ● I> = Phase current setting for the element to have VCO control Example If the overcurrent device has a setting of 160% In, but the minimum fault current for the remote fault condition is only 80% In, then the required k factor is given by:
k=
0.8 = 0.42 1.6 ×1.2
The voltage threshold, Vdep OC V< setting would be set below the lowest system voltage that may occur under normal system operating conditions, whilst ensuring correct detection of the remote fault.
P14D-B/G/L/Z-TM-EN-1
113
Chapter 5 - Current Protection Functions
5
P14D
COLD LOAD PICKUP
When a feeder circuit breaker is closed in order to energise a load, the current levels that flow for a period of time following energisation may be far greater than the normal load levels. Consequently, overcurrent settings that have been applied to provide overcurrent protection may not be suitable during this period of energization (cold load), as they may initiate undesired tripping of the circuit breaker. This scenario can be prevented with Cold Load Pickup (CLP) functionality. The Cold Load Pick-Up (CLP) logic works by either: ● Inhibiting one or more stages of the overcurrent protection for a set duration ● Raising the overcurrent settings of selected stages, for the cold loading period. The CLP logic therefore provides stability, whilst maintaining protection during the start-up.
5.1
COLD LOAD PICKUP
Cold Load Pickup Protection is implemented in the COLD LOAD PICKUP column of the relevant settings group. This function acts upon the following protection functions: ● All overcurrent stages (both non-directional and directional if applicable) ● The first stage of Earth Fault 1 (both non-directional and directional if applicable) ● The first stage of Earth Fault 2 (both non-directional and directional if applicable) The principle of operation is identical for the 3-phase overcurrent protection and the first stages of Earth Fault overcurrent protection for both EF1 and EF2. CLP operation occurs when the circuit breaker remains open for a time greater than tcold and is subsequently closed. CLP operation is applied after tcold and remains for a set time delay of tclp following closure of the circuit breaker. The status of the circuit breaker is provided either by means of the CB auxiliary s or by means of an external device via logic inputs. Whilst CLP operation is in force, the CLP settings are enabled After the time delay tclp has elapsed, the normal overcurrent settings are applied and the CLP settings are disabled. If desired, instead of applying different current setting thresholds for the cold load time, it is also possible to completely block the overcurrrent operation during this time, for any of the overcurrent stages. Voltage-dependent operation can also affect the overcurrent settings. If a Voltage Dependent condition arises, this takes precedence over the CLP. If the CLP condition prevails and the Voltage Dependent function resets, the device will operate using the CLP settings. Time-delayed elements are reset to zero if they are disabled during the transitions between normal settings and CLP settings. Note: In the event of a conflict between Selective Logic and CLP, Selective Logic takes precedence.
114
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
5.2
CLP LOGIC CLP Initiate
1
&
CB Open 3ph
tcold
S
CLP Operation
Q R
1
&
CB Closed 3ph
tclp
1
Cold Load Pickup Enabled
COLD LOAD PICKUP I>(n) Current Set
I> Threshold
COLD LOAD PICKUP <Timer settings>
Timer settings
Key: External DDB Signal
AND gate
Setting cell Setting value
&
OR gate SR Latch
Timer
1 S Q R
Function Switch
Derived setting
V00635
Figure 26: Cold Load Pickup logic The CLP Operation signal indicates that CLP logic is in operation. This only happens when CLP is enabled AND CLP is initiated either externally or from a CB Open condition after the tcold period has elapsed. The CLP Operation indicator goes low when CLP is disabled or when the external CLP trigger is removed or when there is a CB closed condition. tcold and tclp are initiated via the CB open and CB closed signals generated within the device. These signals are produced by connecting auxiliary s from the circuit breaker or starting device to the IED's opto-inputs If dual CB s are not available (one for Open (52a) and for Close (52b)) you can configure the device to be driven from a single (either 52a or 52b). The device would then simply invert one signal to provide the other. This option is available using the CB status input cell in the CB CONTROL column. The setting can be set to 'None', '52a', '52b' or '52a and 52b'.
5.3 Ordinal
CLP DDB SIGNALS Signal Name
Source
Type
Response
Description 226
CLP Initiate
Programmable Scheme PSL Output Logic
No response
This DDB signal initiates the CLP operation 347
CLP Operation
Software
PSL Input
Protection event
This DDB signal indicates that the CLP is operating and informs the Overcurrent protection to use the CLP settings 378
CB Open 3 ph
Software
PSL Input
Protection event
This DDB signal indicates that the CB is open on all 3 phases 379
CB Closed 3 ph
Software
PSL Input
Protection event
This DDB signal indicates that the CB is closed on all 3 phases
P14D-B/G/L/Z-TM-EN-1
115
Chapter 5 - Current Protection Functions
5.4
P14D
CLP SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 COLD LOAD PICKUP
3E
00
This column contains settings for Cold Load Pickup tcold Time Delay
3E
01
7200
From 0s to 14400s step 1s
This setting determines the time the load needs to be de-energised (dead time) before the new settings are applied. tclp Time Delay
3E
02
7200
From 0s to 14400s step 1s
This setting controls the period of time for which the relevant overcurrent and earth fault settings are altered or inhibited following circuit breaker closure. OVERCURRENT
3E
20
The settings under this sub-heading relate to the Phase Overcurrent elements I>1 Status
3E
21
Enable
0=Block 1=Enable
Selecting 'Enable' means that the current and time settings in these cells will be used during the "tclp" time. Selecting 'Block' simply blocks the protection stage during the "tclp" time. I>1 Current Set
3E
22
1.5
0.05*In to 4*In step 0.01In
This setting determines the new pick-up setting for the first stage Overcurrent element during the tclp time delay. I>1 Time Delay
3E
24
1
From 0s to 100s step 0.01s
This setting sets the new operate DT time delay for the first stage Overcurrent element during the tclp time. I>1 TMS
3E
25
1
From 0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. I>1 Time Dial
3E
26
1
From 0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEE/US IDMT curves. I>1 k (RI)
3E
27
1
From 0.1 to 10 step 0.05
This setting sets the new time multiplier setting to adjust the operate time of the RI curve during the tclp time. I>2 Status
3E
29
Enable
0=Block 1=Enable
Selecting 'Enable' means that the current and time settings in these cells will be used during the "tclp" time. Selecting 'Block' simply blocks the protection stage during the "tclp" time. I>2 Current Set
3E
2A
1.5
0.05*In to 4*In step 0.01In
This setting determines the new pick-up setting for the second stage Overcurrent element during the tclp time delay. I>2 Time Delay
3E
2C
1
From 0s to 100s step 0.01s
This setting sets the new operate DT time delay for the second stage Overcurrent element during the tclp time. I>2 TMS
3E
2D
1
From 0.025 to 1.2 step 0.005
This setting sets the new time multiplier setting for the second stage Overcurrent element to adjust the operate time of the IEC IDMT characteristic during the tclp time. I>2 Time Dial
3E
2E
1
From 0.01 to 100 step 0.01
This setting sets the new time multiplier setting to adjust the operate time of the IEEE/US IDMT curves during the tclp time. I>2 k (RI)
3E
2F
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. I>3 Status
3E
31
Block
0=Block 1=Enable
Selecting 'Enable' means that the current and time settings in these cells will be used during the "tclp" time. Selecting 'Block' simply blocks the protection stage during the "tclp" time.
116
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 5 - Current Protection Functions
Col
Row
Default Setting
Available Options
Description I>3 Current Set
3E
32
25
0.05*In to 32*In step 0.01In
This setting sets the new pick-up setting for the third stage Overcurrent element during the tclp time delay. I>3 Time Delay
3E
33
0
From 0s to 100s step 0.01s
This setting sets the new operate DT time delay for the first stage Overcurrent element during the tclp time. I>4 Status
3E
35
Block
From 0 to 1 step 1
Selecting 'Enable' means that the current and time settings in these cells will be used during the "tclp" time. Selecting 'Block' simply blocks the protection stage during the "tclp" time. I>4 Current Set
3E
36
25
0.05*In to 32*In step 0.01In
This setting sets the new pick-up setting for the fourth stage Overcurrent element during the tclp time delay. I>4 Time Delay
3E
37
0
From 0s to 100s step 0.01s
Setting for the new operate time delay for the fourth stage definite time element during the tclp time. STAGE 1 E/F 1
3E
39
The settings under this sub-heading relate to measured Earth Fault protection (EF1) IN1>1 Status
3E
3A
Enable
0=Block 1=Enable
Selecting 'Enable' means that the current and time settings in these cells will be used during the "tclp" time. Selecting 'Block' simply blocks the protection stage during the "tclp" time. IN1>1 Current
3E
3B
0.2
0.05*In to 4*In step 0.01In
This setting sets the new pick-up setting for the measured Earth Fault element during the tclp time delay. IN1>1 IDG Is
3E
3C
1.5
From 1 to 4 step 0.1
This setting defines the new TMS of the IDG curve during the tclp time. IN1>1 Time Delay
3E
3E
1
From 0s to 200s step 0.01s
This setting sets the new operate DT time delay for the measured Earth Fault element during the tclp time. IN1>1 TMS
3E
3F
1
From 0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. IN1>1 Time Dial
3E
40
1
From 0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/IDMT curves. IN1>1 k (RI)
3E
41
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. STAGE 1 E/F 2
3E
43
The settings under this sub-heading relate to derived Earth Fault protection (EF2) IN2>1 Status
3E
44
Enable
0=Block 1=Enable
Selecting 'Enable' means that the current and time settings in these cells will be used during the "tclp" time. Selecting 'Block' simply blocks the protection stage during the "tclp" time. IN2>1 Current
3E
45
0.2
0.05*In to 4*In step 0.01In
This setting sets the new pick-up setting for the derived Earth Fault element during the tclp time delay. IN2>1 IDG Is
3E
46
1.5
From 1 to 4 step 0.1
This setting defines the new TMS of the IDG curve during the tclp time. IN2>1 Time Delay
3E
48
1
From 0s to 200s step 0.01s
This setting sets the new operate DT time delay for the derived Earth Fault element during the tclp time. IN2>1 TMS
3E
49
1
From 0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. IN2>1 Time Dial
P14D-B/G/L/Z-TM-EN-1
3E
4A
1
From 0.01 to 100 step 0.01
117
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This is the Time Multiplier Setting to adjust the operate time of IEEE/IDMT curves. IN2>1 k (RI)
3E
4B
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. OVERCURRENT
3E
4F
The settings under this sub-heading relate to the Phase Overcurrent elements I>5 Status
3E
50
Enable
0=Block 1=Enable
Selecting 'Enable' means that the current and time settings in these cells will be used during the "tclp" time. Selecting 'Block' simply blocks the protection stage during the "tclp" time. I>5 Current Set
3E
51
1.5
0.05*In to 4*In step 0.01In
This setting sets the new pick-up setting for the fifth stage Overcurrent element during the tclp time delay. I>5 Time Delay
3E
53
1
From 0s to 100s step 0.01s
This setting sets the new operate DT time delay for the fifth stage Overcurrent element during the tclp time. I>5 TMS
3E
54
1
From 0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. I>5 Time Dial
3E
55
1
From 0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEE/US IDMT curves. I>5 k (RI)
3E
56
1
From 0.1 to 10 step 0.05
This setting sets the new time multiplier setting to adjust the operate time of the RI curve during the tclp time. I>6 Status
3E
58
Block
From 0 to 1 step 1
Selecting 'Enable' means that the current and time settings in these cells will be used during the "tclp" time. Selecting 'Block' simply blocks the protection stage during the "tclp" time. I>6 Current Set
3E
59
25
0.05*In to 32*In step 0.01In
This setting sets the new pick-up setting for the sixth stage Overcurrent element during the tclp time delay. I>6 Time Delay
3E
5A
0
From 0s to 100s step 0.01s
This setting sets the new operate DT time delay for the sixth stage Overcurrent element during the tclp time.
5.5
APPLICATION NOTES
5.5.1
CLP FOR RESISTIVE LOADS
A typical example of where CLP logic may be used is for resistive heating loads such as such as air conditioning systems. Resistive loads typically offer less resistance when cold than when warm, hence the start-up current will be higher. To set up the CLP, you need to select 'Enable' from the I> status option to enable the settings of the temporary current and time settings. These settings should be chosen in accordance with the expected load profile. Where it is not necessary to alter the setting of a particular stage, the CLP settings should be set to the same level as the standard overcurrent settings. It may not be necessary to alter the protection settings following a short supply interruption. In this case a suitable tcold timer setting can be used.
5.5.2
CLP FOR MOTOR FEEDERS
In general, a dedicated motor protection device would protect feeders supplying motor loads. However, if CLP logic is available in a feeder device, this may be used to modify the overcurrent settings during start-up.
118
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Depending on the magnitude and duration of the motor starting current, it may be sufficient to simply block operation of instantaneous elements. If the start duration is long, the time-delayed protection settings may also need to be raised. A combination of both blocking and raising of the overcurrent settings may be adopted. The CLP overcurrent settings in this case must be chosen with regard to the motor starting characteristic. This may be useful where instantaneous earth fault protection needs to be applied to the motor. During motor start-up conditions, it is likely that incorrect operation of the earth fault element would occur due to asymmetric CT saturation. This is due to the high level of starting current causing saturation of one or more of the line CTs feeding the overcurrent/earth fault protection. The resultant transient imbalance in the secondary line current quantities is thus detected by the residually connected earth fault element. For this reason, it is normal to either apply a nominal time delay to the element, or to use a series stabilising resistor. The CLP logic may be used to allow reduced operating times or current settings to be applied to the earth fault element under normal running conditions. These settings could then be raised prior to motor starting, by means of the logic.
5.5.3
CLP FOR SWITCH ONTO FAULT CONDITIONS
In some feeder applications, fast tripping may be required if a fault is already present on the feeder when it is energised. Such faults may be due to a fault condition not having been removed from the feeder, or due to earthing clamps having been left on following maintenance. In either case, it is desirable to clear the fault condition quickly, rather than waiting for the time delay imposed by IDMT overcurrent protection. The CLP logic can cater for this situation. Selected overcurrent/earth fault stages could be set to instantaneous operation for a defined period following circuit breaker closure (typically 200 ms). Therefore, instantaneous fault clearance would be achieved for a switch onto fault (SOTF) condition.
P14D-B/G/L/Z-TM-EN-1
119
Chapter 5 - Current Protection Functions
6
P14D
SELECTIVE OVERCURRENT LOGIC
With Selective Overcurrent Logic you can use the Start s to control the time delays of upstream IEDs, as an alternative to simply blocking them. This provides an alternative approach to achieving non-cascading types of overcurrent scheme, which may be more familiar to some utilities than blocked overcurrent schemes.
6.1
SELECTIVE LOGIC IMPLEMENTATION
Selective Overcurrent Logic is implemented in the SELECTIVE LOGIC column of the relevant settings group. The Selective Logic function works by temporarily increasing the time delay settings of the chosen overcurrent elements. This logic is initiated by energising the relevant opto-input on the upstream IED. This function acts upon the following protection functions: ● ● ● ●
Non-Directional/Directional phase overcurrent (3rd, 4th and 6th stages) Non-Directional/Directional earth fault – 1 (3rd, 4th and 6th stages) Non-Directional/Directional earth fault – 2 (3rd, 4th and 6th stages) Non-Directional/Directional sensitive earth fault (3rd, 4th and 6th stages)
6.2
SELECTIVE OVERCURRENT LOGIC DIAGRAM SELECTIVE LOGIC <Timer settings>
Timer settings
Selective Logic Enabled
&
I>(n) Timer Block I>(n) Start A Key:
AR Blk Main Prot *3 I>Blocking
&
Setting cell
Derived setting
AR Blocks I>(n)
V00647
Setting value
Switch
Figure 27: Selective Overcurrent Logic The logic diagram is shown for overcurrent phase A, but is valid for all three phases for each of the stages 3,4 and 6. the principle of operation is also identical for EF1, EF2 and SEF. When the selective logic function is enabled, the action of the blocking input is as follows: No block applied In the event of a fault condition that continuously asserts the start output, the function will assert a trip signal after the normal time delay has elapsed. Logic input block applied In the event of a fault condition that continuously asserts the start output, the function will assert a trip signal after the selective logic time delay has elapsed.
120
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Auto-reclose input block applied In the event of a fault condition that continuously asserts the start output, when an auto-reclose block is applied the function will not trip. The auto-reclose block also overrides the logic input block and will block the selective logic timer. Noted that the Auto-reclose function outputs two signals that block protection, namely; AR Blk Main Prot and AR Blk SEF Prot. AR Blk Main Prot is common to Phase Overcurrent, Earth Fault 1 and Earth Fault 2, whereas AR Blk SEF Prot is used for SEF protection.
6.3
SELECTIVE OVERCURRENT LOGIC SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 SELECTIVE LOGIC
3F
00
This column contains settings for selective logic OVERCURRENT
3F
01
The settings under this sub-heading relate to Phase Overcurrent Protection (POC). Selective Logic is only available for stages 3 and 4 and 6. I>3 Time Delay
3F
02
1
From 0s to 100s step 0.01s
This setting sets the new operate DT time delay for the third stage Overcurrent element when the Selective Logic function is active. I>4 Time Delay
3F
03
1
From 0s to 100s step 0.01s
This setting sets the new operate DT time delay for the fourth stage Overcurrent element when the Selective Logic function is active. I>6 Time Delay
3F
0D
1
From 0s to 100s step 0.01s
This setting sets the new operate DT time delay for the sixth stage Overcurrent element when the Selective Logic function is active. EARTH FAULT 1
3F
14
The settings under this sub-heading relate to measured Earth Fault Protection (EF1). Selective Logic is only available for stages 3 and 4. IN1>3 Time Delay
3F
15
2
From 0s to 200s step 0.01s
Setting for the third stage definite time earth fault (measured) element operate time when the selective logic is active. IN1>4 Time Delay
3F
16
2
From 0s to 200s step 0.01s
Setting for the fourth stage definite time earth fault (measured) element operate time when the selective logic is active. EARTH FAULT 2
3F
17
The settings under this sub-heading relate to derived Earth Fault Protection (EF1). Selective Logic is only available for stages 3 and 4. IN2>3 Time Delay
3F
18
2
From 0s to 200s step 0.01s
Setting for the third stage definite time earth fault (derived) element operate time when the selective logic is active. IN2>4 Time Delay
3F
19
2
From 0s to 200s step 0.01s
Setting for the fourth stage definite time earth fault (derived) element operate time when the selective logic is active. SENSITIVE E/F
3F
1A
The settings under this sub-heading relate to Sensitive Earth Fault Protection (EF1). Selective Logic is only available for stages 3 and 4. ISEF>3 Delay
3F
1B
1
From 0s to 200s step 0.01s
Setting for the third stage definite time sensitive earth fault element operate time when the selective logic is active. ISEF>4 Delay
3F
1C
0.5
From 0s to 200s step 0.01s
Setting for the fourth stage definite time sensitive earth fault element operate time when the selective logic is active.
P14D-B/G/L/Z-TM-EN-1
121
Chapter 5 - Current Protection Functions
7
P14D
NEGATIVE SEQUENCE OVERCURRENT PROTECTION
When applying standard phase overcurrent protection, the overcurrent elements must be set significantly higher than the maximum load current, thereby limiting the element’s sensitivity. Most protection schemes also use an earth fault element operating from residual current, which improves sensitivity for earth faults. However, certain faults may arise which can remain undetected by such schemes. Negative Sequence Overcurrent elements can be used in such cases. Any unbalanced fault condition will produce a negative sequence current component. Therefore, a negative phase sequence overcurrent element can be used for both phase-to-phase and phase-to-earth faults. Negative Sequence Overcurrent protection offers the following advantages: ● Negative phase sequence overcurrent elements are more sensitive to resistive phase-to-phase faults, where phase overcurrent elements may not operate. ● In certain applications, residual current may not be detected by an earth fault element due to the system configuration. For example, an earth fault element applied on the delta side of a delta-star transformer is unable to detect earth faults on the star side. However, negative sequence current will be present on both sides of the transformer for any fault condition, irrespective of the transformer configuration. Therefore, a negative phase sequence overcurrent element may be used to provide time-delayed back-up protection for any uncleared asymmetrical faults downstream. ● Where rotating machines are protected by fuses, loss of a fuse produces a large amount of negative sequence current. This is a dangerous condition for the machine due to the heating effect of negative phase sequence current. An upstream negative phase sequence overcurrent element could therefore be applied to provide back-up protection for dedicated motor protection relays. ● It may be sufficient to simply trigger an alarm to indicate the presence of negative phase sequence currents on the system. Operators may then investigate the cause of the imbalance.
7.1
NEGATIVE SEQUENCE OVERCURRENT PROTECTION IMPLEMENTATION
Negative Sequence Overcurrent Protection is implemented in the NEG SEQ O/C column of the relevant settings group. The product provides four stages of negative sequence overcurrent protection with independent time delay characteristics. Stages 1, 2 provide a choice of operate and reset characteristics, where you can select between: ● A range of standard IDMT (Inverse Definite Minimum Time) curves ● A range of -defined curves ● DT (Definite Time) This is achieved using the cells ● I2>(n) Function for the overcurrent operate characteristic ● I2>(n) Reset Char for the overcurrent reset characteristic ● I2>(n) Usr RstChar for the reset characteristic for -defined curves where (n) is the number of the stage. The IDMT-capable stages, (1 and 2) also provide a Timer Hold facility (on page 88). This is configured using the cells I2>(n) tReset, where (n) is the number of the stage. This is not applicable for curves based on the IEEE standard. Stages 3 and 4 can have definite time characteristics only.
122
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
7.2
NON-DIRECTIONAL NEGATIVE SEQUENCE OVERCURRENT LOGIC I2>(n) Start
I2 IDMT/DT
I2>1 Current Set
&
&
I2>(n) Trip
CTS Block Key:
I2> Inhibit I2H Any Start I2> Blocking 2H Blocks I2>(n)
Energising Quanitity External DDB Signal
&
Internal function Setting cell Setting value
I2>(n) Tmr Blk
AND gate
&
OR gate
1
Timer Comparator for detecting overvalues V00607
Figure 28: Negative Sequence Overcurrent logic - non-directional operation For Negative Phase Sequence Overcurrent Protection, the energising quanitity I2> is compared with the threshold voltage I2>1 Current Set. If the value exceeds this setting a Start signal (I2>(n) Start) is generated, provided there are no blocks. 5% hysteresis is built into the comparator such that the drop-off value is 0.95 x of the current set threshold. The function can be blocked by an Inhibit signal, CTS, or second harmonic blocking. The I2>Start signal is fed into a timer to produce the I2> trip signal. The timer can be blocked by the timer block signal I2> (n) Tmr Blk. This diagram and description applies to each stage.
7.3
DIRECTIONAL ELEMENT
Where negative phase sequence current may flow in either direction through an IED location, such as parallel lines or ring main systems, directional control should be used. Directionality is achieved by comparing the angle between the negative phase sequence voltage and the negative phase sequence current. A directional element is available for all of the negative sequence overcurrent stages. This is found in the I2> Direction cell for the relevant stage. It can be set to nondirectional, directional forward, or directional reverse. A suitable characteristic angle setting (I2> Char Angle) is chosen to provide optimum performance. This setting should be set equal to the phase angle of the negative sequence current with respect to the inverted negative sequence voltage (–V2), in order to be at the centre of the directional characteristic.
P14D-B/G/L/Z-TM-EN-1
123
Chapter 5 - Current Protection Functions
7.3.1
P14D
DIRECTIONAL NEGATIVE SEQUENCE OVERCURRENT LOGIC I2>(n) Start I2 IDMT/DT
I2>1 Current Set
&
&
&
I2>(n) Trip
CTS Block I2> Inhibit I2H Any Start I2> Blocking
Key: &
Energising Quanitity
2H Blocks I2>(n)
External DDB Signal I2>1 Direction
Internal function
V2
Setting cell
VTS Slow Block I2> Blocking
Setting value
Directional check
I2> V2pol Set
AND gate
&
OR gate
1
& Timer
VTS Blocks I2>(n)
I2>(n) Tmr Blk
Comparator for detecting overvalues
V00608
Figure 29: Negative Sequence Overcurrent logic - directional operation Directionality is achieved by comparing the angle between the negative phase sequence voltage and the negative phase sequence current. The element may be selected to operate in either the forward or reverse direction. A suitable characteristic angle setting (I2>Char Angle) is chosen to provide optimum performance. This setting should be set equal to the phase angle of the negative sequence current with respect to the inverted negative sequence voltage (–V2), in order to be at the centre of the directional characteristic. For the negative phase sequence directional elements to operate, the device must detect a polarising voltage above a minimum threshold, I2>V2pol Set. This must be set in excess of any steady state negative phase sequence voltage. This may be determined during the commissioning stage by viewing the negative phase sequence measurements in the device. When the element is selected as directional (directional devices only), a VTS Block option is available. When the relevant bit is set to 1, operation of the Voltage Transformer Supervision (VTS) will block the stage. When set to 0, the stage will revert to non-directional.
7.4 Ordinal
NPS OVERCURRENT DDB SIGNALS English Text
Source
Type
Response Function
Description 351
VTS Slow Block
Software
PSL Input
No response
This DDB signal is a purposely delayed output from the VTS which can block other functions 352
CTS Block
Software
PSL Input
No response
This DDB signal is an instantaneously blocking output from the CTS which can block other functions 504
I2> Inhibit
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
This DDB signal inhibits the Negative Phase Overcurrent protection 505
I2>1 Tmr Blk
Programmable Scheme Logic
This DDB signal blocks the first stage Negative Phase Overcurrent timer
124
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Ordinal
English Text
Source
Type
Response Function
Description 506
I2>2 Tmr Blk
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal blocks the second stage Negative Phase Overcurrent timer 507
I2>3 Tmr Blk
Programmable Scheme Logic
This DDB signal blocks the third stage Negative Phase Overcurrent timer 508
I2>4 Tmr Blk
Programmable Scheme Logic
This DDB signal blocks the fourth stage Negative Phase Overcurrent timer 509
I2>1 Start
Software
This DDB signal is the first stage NPSOC start signal 510
I2>2 Start
Software
This DDB signal is the second stage NPSOC start signal 511
I2>3 Start
Software
This DDB signal is the third stage NPSOC start signal 512
I2>4 Start
Software
This DDB signal is the fourth stage NPSOC start signal 513
I2>1 Trip
Software
This DDB signal is the first stage NPSOC trip signal 514
I2>2 Trip
Software
This DDB signal is the second stage NPSOC trip signal 515
I2>3 Trip
Software
This DDB signal is the third stage NPSOC trip signal 516
I2>4 Trip
Software
This DDB signal is the fourth stage NPSOC trip signal 541
I2H Any Start
Software
This DDB signal is the 2nd Harmonic start signal for any phase
7.5
NEGATIVE SEQUENCE OVERCURRENT SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 NEG SEQ O/C
36
00
This column contains settings for Negative Sequence overcurrent I2>1 Status
36
10
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the first stage NPSOC element.
P14D-B/G/L/Z-TM-EN-1
125
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description
I2>1 Function
36
11
DT
0=DT 1=IEC S Inverse 2=IEC V Inverse 3=IEC E Inverse 4=UK LT Inverse 5=IEEE M Inverse 6=IEEE V Inverse 7=IEEE E Inverse 8=US Inverse 9=US ST Inverse 10= Curve 1 11= Curve 2 12= Curve 3 13= Curve 4
This setting determines the tripping characteristic for the first stage NPSOC element. I2>1 Direction
36
12
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the first stage NPSOC element. I2>1 Current Set
36
15
0.2
0.08*In to 4*In step 0.01In
This setting sets the pick-up threshold for the first stage NPSOC element. I2>1 Time Delay
36
17
10
From 0s to 100s step 0.01s
This setting sets the DT time delay for the first stage NPSOC element. I2>1 TMS
36
18
1
0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. I2>1 Time Dial
36
19
1
0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. I2>1 DT Adder
36
1B
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. I2>1 Reset Char
36
1C
DT
0 = DT or 1 = Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. I2>1 tRESET
36
1D
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
I2>1 Usr RstChar
36
1E
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves. I2>2 Status
36
20
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage NPSOC element.
126
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 5 - Current Protection Functions
Col
Row
Default Setting
Available Options
Description
I2>2 Function
36
21
DT
0=DT 1=IEC S Inverse 2=IEC V Inverse 3=IEC E Inverse 4=UK LT Inverse 5=IEEE M Inverse 6=IEEE V Inverse 7=IEEE E Inverse 8=US Inverse 9=US ST Inverse 10= Curve 1 11= Curve 2 12= Curve 3 13= Curve 4
This setting determines the tripping characteristic for the second stage overcurrent element. I2>2 Direction
36
22
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the second stage NPSOC element. I2>2 Current Set
36
25
0.2
0.08*In to 4*In step 0.01In
This setting sets the pick-up threshold for the second stage NPSOC element. I2>2 Time Delay
36
27
10
From 0s to 100s step 0.01s
This setting sets the DT time delay for the second stage NPSOC element. I2>2 TMS
36
28
1
0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. I2>2 Time Dial
36
29
1
0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. I2>2 DT Adder
36
2B
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. I2>2 Reset Char
36
2C
DT
0 = DT or 1 = Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. I2>2 tRESET
36
2D
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
I2>2 Usr RstChar
36
2E
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves. I2>3 Status
36
30
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the third stage NPSOC element. There is no choice of curves because this stage is DT only. I2>3 Direction
36
32
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the third stage NPSOC element. I2>3 Current Set
36
35
0.2
0.08*In to 32*In step 0.01In
This setting sets the pick-up threshold for the third stage NPSOC element. I2>3 Time Delay
36
37
10
From 0s to 100s step 0.01s
This setting sets the DT time delay for the third stage NPSOC element. I2>4 Status
36
P14D-B/G/L/Z-TM-EN-1
40
Disabled
0 = Disabled or 1 = Enabled
127
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting enables or disables the fourth stage NPSOC element. There is no choice of curves because this stage is DT only. I2>4 Direction
36
42
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the fourth stage NPSOC element. I2>4 Current Set
36
45
0.2
0.08*In to 32*In step 0.01In
This setting sets the pick-up threshold for the fourth stage NPSOC element. I2>4 Time Delay
36
47
10
From 0s to 100s step 0.01s
This setting sets the DT time delay for the fourth stage NPSOC element.
I2> Blocking
36
50
0x0F
Bit 0=VTS Blocks I2>1 Bit 1=VTS Blocks I2>2 Bit 2=VTS Blocks I2>3 Bit 3=VTS Blocks I2>4 Bit 4=2H Blocks I2>1 Bit 5=2H Blocks I2>2 Bit 6=2H Blocks I2>3 Bit 7=2H Blocks I2>4
This setting cell contains a binary string (data type G158), where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models with VTS blocking and second harmonic blocking. I2> Char Angle
36
51
-60
From -95 to 95 step 1
This setting defines the characteristic angle for the directional element. This setting is aplicable to all NPSOC stages. I2> V2pol Set
36
52
5
From 0.5*V1 to 25*V1 step 0.5*V1
This setting determines the minimum negative sequence voltage threshold that must be present to determine directionality.
7.6
APPLICATION NOTES
7.6.1
SETTING GUIDELINES (CURRENT THRESHOLD)
The current pick-up threshold must be set higher than the negative phase sequence current due to the maximum normal load imbalance. This can be set practically at the commissioning stage, making use of the measurement function to display the standing negative phase sequence current. The setting should be at least 20% above this figure. Where the negative phase sequence element needs to operate for specific uncleared asymmetric faults, a precise threshold setting would have to be based on an individual fault analysis for that particular system due to the complexities involved. However, to ensure operation of the protection, the current pick-up setting must be set approximately 20% below the lowest calculated negative phase sequence fault current contribution to a specific remote fault condition.
7.6.2
SETTING GUIDELINES (TIME DELAY)
Correct setting of the time delay for this function is vital. You should also be very aware that this element is applied primarily to provide back-up protection to other protection devices or to provide an alarm. It would therefore normally have a long time delay. The time delay set must be greater than the operating time of any other protection device (at minimum fault level) that may respond to unbalanced faults, such as: ● ● ● ●
128
Phase overcurrent elements Earth fault elements Broken conductor elements Negative phase sequence influenced thermal elements
P14D-B/G/L/Z-TM-EN-1
P14D
7.6.3
Chapter 5 - Current Protection Functions
SETTING GUIDELINES (DIRECTIONAL ELEMENT)
Where negative phase sequence current may flow in either direction through an IED location, such as parallel lines or ring main systems, directional control of the element should be employed. Directionality is achieved by comparing the angle between the negative phase sequence voltage and the negative phase sequence current and the element may be selected to operate in either the forward or reverse direction. A suitable characteristic angle setting (I2> Char Angle) is chosen to provide optimum performance. This setting should be set equal to the phase angle of the negative sequence current with respect to the inverted negative sequence voltage (–V2), in order to be at the centre of the directional characteristic. The angle that occurs between V2 and I2 under fault conditions is directly dependent upon the negative sequence source impedance of the system. However, typical settings for the element are as follows: ● For a transmission system the RCA should be set equal to –60° ● For a distribution system the RCA should be set equal to –45° For the negative phase sequence directional elements to operate, the device must detect a polarizing voltage above a minimum threshold, I2>V2pol Set. This must be set in excess of any steady state negative phase sequence voltage. This may be determined during the commissioning stage by viewing the negative phase sequence measurements in the device.
P14D-B/G/L/Z-TM-EN-1
129
Chapter 5 - Current Protection Functions
8
P14D
EARTH FAULT PROTECTION
Earth faults are simply overcurrent faults where the fault current flows to earth (as opposed to between phases). They are the most common type of fault. There are a few different kinds of earth fault, but the most common is the single phase-to-earth fault. Consequently this is the first and foremost type of fault that protection devices must cover. Typical settings for earth fault IEDs are around 30-40% of the full load current. If greater sensitivity is required, then Sensitive Earth Fault should be used. Earth faults can be measured directly from the system by means of: ● A separate CT located in a power system earth connection ● A separate Core Balance CT (CBCT) ● A residual connection of the three line CTs, whereby the Earth faults can be derived mathematically by summing the three measured phase currents. Depending on the device model, it will provide one or more of the above means for Earth fault protection.
8.1
EARTH FAULT PROTECTION ELEMENTS
Earth fault protection is implemented in the columns EARTH FAULT 1 and EARTH FAULT 2 of the relevant settings group. Each column contains an identical set of elements, whereby the EARTH FAULT 1 (EF1) column is used for earth fault current that is measured directly from the system, whilst the EARTH FAULT 2 (EF2) column contains cells, which operate from a residual current quantity that is derived internally from the summation of the three-phase currents. The product provides four stages of Earth Fault protection with independent time delay characteristics, for each EARTH FAULT column. Stages 1 and 2 provide a choice of operate and reset characteristics, where you can select between: ● A range of standard IDMT (Inverse Definite Minimum Time) curves ● A range of -defined curves ● DT (Definite Time) For the EF1 column, this is achieved using the cells: ● IN1>(n) Function for the overcurrent operate characteristics ● IN1>(n) Reset Char for the overcurrent reset characteristic ● IN1>(n) Usr RstChar for the reset characteristic for -defined curves For the EF2 column, this is achieved using the cells: ● IN2>(n) Function for the overcurrent operate characteristics ● IN2>(n) Reset Char for the overcurrent reset characteristic ● IN2>(n) Usr RstChar for the reset characteristic for -defined curves where (n) is the number of the stage. Stages 1 and 2 provide a Timer Hold facility (on page 88). This is configured using the cells IN1>(n) tReset for EF1 and IN2>(n) tReset for EF2. Stages 3 and 4 can have definite time characteristics only. The fact that both EF1 and EF2 elements may be enabled at the same time leads to a number of applications advantages. For example, some applications may require directional earth fault protection for
130
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
upstream equipment and backup earth fault protection for downstream equipment. This can be achieved with a single IED, rather than two.
8.2
NON-DIRECTIONAL EARTH FAULT LOGIC IN1>(n) Start IN1 IDMT/DT
IN1>(n) Current*1
&
&
IN1>(n) Trip
CTS Block IN1> Inhibit I2H Any Start IN1> Blocking
Key:
Energising Quanitity External DDB Signal
&
2H Blocks IN(n)
Internal function Setting cell Setting value
AR Blk Main Prot*2 IN1>Blocking
&
AND gate
&
OR gate
1
AR Blocks IN(n)
IN1>(n) Timer Blk
Timer Comparator for detecting overvalues
V00610
Note: *1 If a CLP condition exists, the I>(n) Current Set threshold is taken from the COLD LOAD PICKUP column *2 Autoreclose blocking is only available for stages 3,4 and 6 and on selected models
Figure 30: Non-directional EF logic (single stage) The Earth Fault current is compared with a set threshold (IN1>(n) Current) for each stage. If it exceeds this threshold, a Start signal is triggered, providing it is not blocked. This can be blocked by the second harmonic blocking function, or an Inhibit Earth Fault DDB signal. The autoreclose logic can be set to block the Earth Fault trip after a prescribed number of shots (set in AUTORECLOSE column). This is achieved using the AR Blk Main Prot setting. this can also be blocked by the relevant timer block signal IN1>(n)TimerBlk DDB signal. Earth Fault protection can follow the same IDMT characteristics as described in the Overcurrent Protection Principles section. Please refer to this section for details of IDMT characteristics. The diagram and description also applies to the Earth Fault 2 element (IN2).
IDG CURVE
8.3
The IDG curve is commonly used for time delayed earth fault protection in the Swedish market. This curve is available in stage 1 of the Earth Fault protection. The IDG curve is represented by the following equation:
I top = 5.8 − 1.35 log e IN > Setting where:
P14D-B/G/L/Z-TM-EN-1
131
Chapter 5 - Current Protection Functions
P14D
top is the operating time I is the measured current IN> Setting is an adjustable setting, which defines the start point of the characteristic Note: Although the start point of the characteristic is defined by the "ΙN>" setting, the actual current threshold is a different setting called "IDG Ιs". The "IDG Ιs" setting is set as a multiple of "ΙN>".
Note: When using an IDG Operate characteristic, DT is always used with a value of zero for the Rest characteristic.
An additional setting "IDG Time" is also used to set the minimum operating time at high levels of fault current. 10 9 IDG Is Setting Range
Operating time (seconds)
8 7 6 5 4 3
IDG Time Setting Range
2 1 0 1
10
100
I/IN>
V00611
Figure 31: IDG Characteristic
8.4
DIRECTIONAL ELEMENT
If Earth fault current can flow in both directions through a protected location, you will need to use a directional overcurrent element to determine the direction of the fault. Typical systems that require such protection are parallel feeders (both plain and transformer) and ring main systems, each of which are relatively common in distribution networks. A directional element is available for all of the Earth Fault stages for both Earth fault columns. These are found in the direction setting cells for the relevant stage (e.g. IN1>1 Direction, IN2>2 Direction). They can be set to non-directional, directional forward, or directional reverse. For standard earth fault protection, two options are available for polarisation; Residual Voltage or Negative Sequence.
8.4.1
RESIDUAL VOLTAGE POLARISATION
With earth fault protection, the polarising signal needs to be representative of the earth fault condition. As residual voltage is generated during earth fault conditions, this quantity is commonly used to polarise
132
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
directional earth fault elements. This is known as Residual Voltage polarisation or Neutral Displacement Voltage (NVD) polarisation. Some of the models derive this voltage internally, from the 3-phase voltage input supplied from either a 5limb or three single-phase VTs. With some models (those with no Check Synchronism function) the voltage transformer may be used to measure the Residual Voltage VN. This gives a more accurate result than with derived voltage. Small levels of residual voltage could be present under normal system conditions due to system imbalances, VT inaccuracies, device tolerances etc. for this reason, the device includes a settable threshold (IN>VNPol set), which must be exceeded in order for the DEF function to become operational. The residual voltage measurement provided in the MEASUREMENTS 1 column of the menu may assist in determining the required threshold setting during the commissioning stage, as this will indicate the level of standing residual voltage present. Note: Residual voltage is nominally 180° out of phase with residual current. Consequently, the DEF elements are polarized from the "-Vres" quantity. This 180° phase shift is automatically introduced within the device.
8.4.1.1
DIRECTIONAL EARTH FAULT LOGIC WITH RESIDUAL VOLTAGE POLARISATION IN1>(n) Start IN1 IDMT/DT
IN1>(n) Current*1
&
&
&
IN1>(n) Trip
CTS Block IN1> Inhibit I2H Any Start IN1> Blocking
&
2H Blocks IN1>(n)
IN1> Direction Key:
VN
Energising Quanitity IN1> VNpol Set
External DDB Signal Directional check
IN1 Low Current VTS Slow Block IN1> Blocking
Internal function Setting cell Setting value
&
Hardcoded setting
VTS Blocks IN1>(n)
AND gate AR Blk Main Prot*2 IN1>Blocking AR Blocks IN1>(n)
IN1>(n) Timer Blk
&
&
OR gate
1
Timer Comparator for detecting overvalues
V00612
Note: *1 If a CLP condition exists, the I>(n) Current Set threshold is taken from the COLD LOAD PICKUP column *2 Autoreclose blocking is only available for stages 3,4 and 6 and on selected models
Figure 32: Directional EF logic with neutral voltage polarization (single stage)
P14D-B/G/L/Z-TM-EN-1
133
Chapter 5 - Current Protection Functions
P14D
Voltage Transformer Supervision (VTS) selectively blocks the directional protection or causes it to revert to non-directional operation. When selected to block the directional protection, VTS blocking is applied to the directional checking which effectively blocks the Start outputs as well.
8.4.2
NEGATIVE SEQUENCE POLARISATION
In some applications, the use of residual voltage polarization may be not possible to achieve, or at the very least, problematic. For example, a suitable type of VT may be unavailable, or an HV/EHV parallel line application may present problems with zero sequence mutual coupling. In such situations, the problem may be solved by using Negative Phase Sequence (NPS) quantities for polarization. This method determines the fault direction by comparing the NPS voltage with the NPS current. The operate quantity, however, is still residual current. This can be used for both the derived and measured standard earth fault elements (EF1 and EF2) but not on the SEF protection. It requires a suitable voltage and current threshold to be set in cells IN>V2pol set and IN>I2pol set respectively. Negative sequence polarising is not recommended for impedance earthed systems regardless of the type of VT feeding the relay. This is due to the reduced earth fault current limiting the voltage drop across the negative sequence source impedance to negligible levels. If this voltage is less than 0.5 volts the device will stop providing DEF.
134
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
8.4.2.1
DIRECTIONAL EARTH FAULT LOGIC WITH NPS POLARISATION IN1>(n) Start IN1 IDMT/DT
IN1>(n) Current
&
&
&
IN1>(n) Trip
CTS Block IN1> Inhibit I2H Any Start IN1> Blocking
&
2H Blocks IN1>(n)
IN1> Direction V2 IN1> V2pol Set Key:
I2
Directional check
Energising Quanitity
IN1> I2pol Set VTS Slow Block IN1> Blocking
External DDB Signal Internal function &
Setting cell
VTS Blocks IN1>(n)
AR Blk Main Prot IN1>Blocking
Setting value AND gate
&
OR gate
1
&
AR Blocks IN1>(n)
Timer
IN1>(n) Timer Blk
Comparator for detecting overvalues
V00613
Note: *1 If a CLP condition exists, the I>(n) Current Set threshold is taken from the COLD LOAD PICKUP column *2 Autoreclose blocking is only available for stages 3,4 and 6 and on selected models
Figure 33: Directional Earth Fault logic with negative sequence polarisation (single stage) Voltage Transformer Supervision (VTS) selectively blocks the directional protection or causes it to revert to non-directional operation. When selected to block the directional protection, VTS blocking is applied to the directional checking which effectively blocks the Start outputs as well. The directional criteria with negative sequence polarisation is given below: ● Directional forward: -90° < (angle(I2) - angle(V2 + 180°) - RCA) < 90° ● Directional reverse : -90° > (angle(I2) - angle(V2 + 180°) - RCA) > 90°
8.5 Ordinal
MEASURED AND DERIVED EARTH FAULT DDB SIGNALS English Text
Source
Type
Response Function
Description 208
IN1>1 Timer Blk
Programmable Scheme Logic
PSL Output
No response
This DDB signal blocks the first stage measured Earth Fault time delay
P14D-B/G/L/Z-TM-EN-1
135
Chapter 5 - Current Protection Functions
Ordinal
English Text
P14D
Source
Type
Response Function
Description 209
IN1>2 Timer Blk
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Input
No response
This DDB signal blocks the second stage measured Earth Fault time delay 210
IN1>3 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the third stage measured Earth Fault time delay 211
IN1>4 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the fourth stage measured Earth Fault time delay 212
IN2>1 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the first stage derived Earth Fault time delay 213
IN2>2 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the second stage derived Earth Fault time delay 214
IN2>3 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the third stage derived Earth Fault time delay 215
IN2>4 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the fourth stage derived Earth Fault time delay 351
VTS Slow Block
Software
This DDB signal is a purposely delayed output from the VTS which can block other functions 352
CTS Block
Software
PSL Input
No response
This DDB signal is an instantaneously blocking output from the CTS which can block other functions 358
AR Blk Main Prot
Software
PSL Input
Protection event
This DDB signal, generated by the Autoreclose function, blocks the Main Protection elements (POC, EF1, EF2, NPSOC) 528
IN1> Inhibit
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Input
Protection event
This DDB signal inhibits the measured Earth Fault protection 529
IN2> Inhibit
Programmable Scheme Logic
This DDB signal inhibits the derived Earth Fault protection 541
I2H Any Start
Software
This DDB signal is the 2nd Harmonic start signal for any phase
8.6
EARTH FAULT PROTECTION 1 SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 EARTH FAULT 1
38
00
This column contains settings for Measured Earth Fault protection (EF1) IN1> Input
38
01
Measured
Not Settable
This cell displays the input type. For EF1 it is always 'Measured'
136
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 5 - Current Protection Functions
Col
Row
Default Setting
Available Options
Description
IN1>1 Function
38
25
IEC S Inverse
0=Disabled 1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=RI 7=IEEE M Inverse 8=IEEE V Inverse 9=IEEE E Inverse 10=US Inverse 11=US ST Inverse 12=IDG 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the first stage EF1 element. IN1>1 Direction
38
26
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the first stage EF1 element. IN1>1 Current
38
29
0.2
0.08*In to 4*In step 0.01In
This setting sets the pick-up threshold for the first stage EF1 element. IN1>1 IDG Is
38
2A
1.5
1 to 4 step 0.1
This setting is set as a multiple of the Earth Fault overcurent setting IN> for the IDG curve. It determines the actual current threshold at which the element starts. IN1>1 Time Delay
38
2C
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the first stage EF1 element. IN1>1 TMS
38
2D
1
0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. IN1>1 Time Dial
38
2E
1
0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. IN1>1 k (RI)
38
2F
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. IN1>1 IDG Time
38
30
1.2
From 1s to 2s step 0.01s
This setting sets the minimum operate time at high levels of fault current for IDG curves. IN1>1 DT Adder
38
31
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. IN1>1 Reset Char
38
32
DT
0 = DT or 1 = Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. IN1>1 tRESET
38
33
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
IN1>1 Usr RstChr
38
34
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves.
P14D-B/G/L/Z-TM-EN-1
137
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description
IN1>2 Function
38
36
Disabled
0=Disabled 1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=RI 7=IEEE M Inverse 8=IEEE V Inverse 9=IEEE E Inverse 10=US Inverse 11=US ST Inverse 12=IDG 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the second stage EF1 element. IN1>2 Direction
38
37
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the second stage EF1 element. IN1>2 Current
38
3A
0.2
0.08*In to 4*In step 0.01In
This setting sets the pick-up threshold for the second stage EF1 element. IN1>2 IDG Is
38
3B
1.5
1 to 4 step 0.1
This setting is set as a multiple of the Earth Fault overcurent setting IN> for the IDG curve. It determines the actual current threshold at which the element starts. IN1>2 Time Delay
38
3D
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the second stage EF1 element. IN1>2 TMS
38
3E
1
0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. IN1>2 Time Dial
38
3F
1
0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. IN1>2 k (RI)
38
40
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. IN1>2 IDG Time
38
41
1.2
From 1s to 2s step 0.01s
This setting sets the minimum operate time at high levels of fault current for IDG curves. IN1>2 DT Adder
38
42
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. IN1>2 Reset Char
38
43
DT
0 = DT or 1 = Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. IN1>2 tRESET
38
44
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
IN2>1 Usr RstChr
38
45
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves. IN1>3 Status
138
38
46
Disabled
0 = Disabled, 1 = Enabled
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 5 - Current Protection Functions
Col
Row
Default Setting
Available Options
Description This setting enables or disables the third stage EF1 element. There is no choice of curves because this stage is DT only. IN1>3 Direction
38
47
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the third stage EF1 element. IN1>3 Current
38
4A
0.2
0.08*In to 32*In step 0.01In
This setting sets the pick-up threshold for the third stage EF1 element. IN1>3 Time Delay
38
4B
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the third stage EF1 element. IN1>4 Status
38
4D
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the fourth stage EF1 element. There is no choice of curves because this stage is DT only. IN1>4 Direction
38
4E
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the fourth stage EF1 element. IN1>4 Current
38
51
0.2
0.08*In to 32*In step 0.01In
This setting sets the pick-up threshold for the fourth stage EF1 element. IN1>4 Time Delay
38
52
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the fourth stage EF1 element.
IN1> Blocking
38
54
0x00F
Bit 0=VTS Blocks IN>1 Bit 1=VTS Blocks IN>2 Bit 2=VTS Blocks IN>3 Bit 3=VTS Blocks IN>4 Bit 4=AR Blocks IN>3 Bit 5=AR Blocks IN>4 Bit 6=2H Blocks IN>1 Bit 7=2H Blocks IN>2 Bit 8=2H Blocks IN>3 Bit 9=2H Blocks IN>4
This setting cell contains a binary string (data type G63), where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models with Autoreclose.
IN1> Blocking
38
54
0x00F
Bit 0=VTS Blocks IN>1 Bit 1=VTS Blocks IN>2 Bit 2=VTS Blocks IN>3 Bit 3=VTS Blocks IN>4 Bit 4=Not Used Bit 5=Not Used Bit 6=2H Blocks IN>1 Bit 7=2H Blocks IN>2 Bit 8=2H Blocks IN>3 Bit 9=2H Blocks IN>4
This setting cell contains a binary string (data type G63A), where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models without Autoreclose. IN1> POL
38
55
The settings under this sub-heading relate to the polarisation for directional control for EF1 (measured) IN1> Char Angle
38
56
-45
-95 to 95 step 1
This setting defines the characteristic angle used for the directional decision. IN1> Pol
38
57
Zero Sequence
0=Zero Sequence 1=Neg Sequence
This setting determines whether the directional function uses zero sequence or negative sequence voltage polarisation.
P14D-B/G/L/Z-TM-EN-1
139
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description IN1> VNpol Set
38
59
5 20
0.5V to 80V step 0.5V
This setting sets the minimum zero sequence voltage polarising quantity required for a directional decision. IN1> VNpol Set
38
59
5 20
0.5V to 80V step 0.5V
This setting sets the minimum zero sequence voltage polarising quantity required for a directional decision. IN1> V2pol Set
38
5A
5
0.5V to 80V step 0.5V
This setting sets the minimum zero sequence voltage polarising quantity required for a directional decision. Derived IN1> I2pol Set
38
5B
0.08
0.08*In to 1*In step 0.01In
This setting sets the minimum negative sequence current polarising quantity for directional decision.
8.7
EARTH FAULT PROTECTION 2 SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 EARTH FAULT 2
39
00
This column contains settings for Derived Earth Fault IN2> Input
39
01
Derived
Not Settable
This cell displays the input type. For EF2 it is always 'Derived'
IN2>1 Function
39
25
IEC S Inverse
0=Disabled 1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=RI 7=IEEE M Inverse 8=IEEE V Inverse 9=IEEE E Inverse 10=US Inverse 11=US ST Inverse 12=IDG 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the first stage EF2 element. IN2>1 Direction
39
26
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the first stage EF2 element. IN2>1 Current
39
29
0.2
0.08*In to 4*In step 0.01In
This setting sets the pick-up threshold for the first stage EF2 element. IN2>1 IDG Is
39
2A
1.5
1 to 4 step 0.1
This setting is set as a multiple of the Earth Fault overcurent setting IN> for the IDG curve. It determines the actual current threshold at which the element starts. IN2>1 Time Delay
39
2C
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the first stage EF2 element.
140
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 5 - Current Protection Functions
Col
Row
Default Setting
Available Options
Description IN2>1 TMS
39
2D
1
0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. IN2>1 Time Dial
39
2E
1
0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. IN2>1 k (RI)
39
2F
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. IN2>1 IDG Time
39
30
1.2
1s to 2s step 0.01s
This setting sets the minimum operate time at high levels of fault current for IDG curves. IN2>1 DT Adder
39
31
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. IN2>1 Reset Char
39
32
DT
0 = DT or 1 = Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. IN2>1 tRESET
39
33
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
IN2>1 Usr RstChr
39
34
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves.
IN2>2 Function
39
36
Disabled
0=Disabled 1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=RI 7=IEEE M Inverse 8=IEEE V Inverse 9=IEEE E Inverse 10=US Inverse 11=US ST Inverse 12=IDG 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the second stage EF2 element. IN2>2 Direction
39
37
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the second stage EF2 element. IN2>2 Current
39
3A
0.2
0.08*In to 4*In step 0.01In
This setting sets the pick-up threshold for the second stage EF2 element. IN2>2 IDG Is
39
3B
1.5
1 to 4 step 0.1
This setting is set as a multiple of the Earth Fault overcurent setting IN> for the IDG curve. It determines the actual current threshold at which the element starts. IN2>2 Time Delay
39
3D
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the second stage EF2 element. IN2>2 TMS
39
P14D-B/G/L/Z-TM-EN-1
3E
1
0.025 to 1.2 step 0.005
141
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. IN2>2 Time Dial
39
3F
1
0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. IN2>2 k (RI)
39
40
1
From 0.1 to 10 step 0.05
This setting defines the TMS constant to adjust the operate time of the RI curve. IN2>2 IDG Time
39
41
1.2
From 1s to 2s step 0.01s
This setting sets the minimum operate time at high levels of fault current for IDG curves. IN2>2 DT Adder
39
42
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. IN2>2 Reset Char
39
43
DT
0 = DT or 1 = Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. IN2>2 tRESET
39
44
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
IN2>2 Usr RstChr
39
45
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves. IN2>3 Status
39
46
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the third stage EF2 element. There is no choice of curves because this stage is DT only. IN2>3 Direction
39
47
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the third stage EF2 element. IN2>3 Current
39
4A
0.2
0.08*In to 32*In step 0.01In
This setting sets the pick-up threshold for the third stage EF2 element. IN2>3 Time Delay
39
4B
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the third stage EF2 element. IN2>4 Status
39
4D
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the fourth stage EF2 element. There is no choice of curves because this stage is DT only. IN2>4 Direction
39
4E
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the fourth stage EF2 element. IN2>4 Current
39
51
0.2
0.08*In to 32*In step 0.01In
This setting sets the pick-up threshold for the fourth stage EF2 element. IN2>4 Time Delay
39
52
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the fourth stage EF2 element.
IN2> Blocking
142
39
54
0x00F
Bit 0=VTS Blocks IN>1 Bit 1=VTS Blocks IN>2 Bit 2=VTS Blocks IN>3 Bit 3=VTS Blocks IN>4 Bit 4=AR Blocks IN>3 Bit 5=AR Blocks IN>4 Bit 6=2H Blocks IN>1 Bit 7=2H Blocks IN>2 Bit 8=2H Blocks IN>3 Bit 9=2H Blocks IN>4
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description This setting cell contains a binary string (data type G63), where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models with Autoreclose.
IN2> Blocking
39
54
0x00F
Bit 0=VTS Blocks IN>1 Bit 1=VTS Blocks IN>2 Bit 2=VTS Blocks IN>3 Bit 3=VTS Blocks IN>4 Bit 4=Not Used Bit 5=Not Used Bit 6=2H Blocks IN>1 Bit 7=2H Blocks IN>2 Bit 8=2H Blocks IN>3 Bit 9=2H Blocks IN>4
This setting cell contains a binary string (data type G63A), where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models without Autoreclose. IN2> POL
39
55
The settings under this sub-heading relate to the polarisation for directional control for EF2 derived IN2> Char Angle
39
56
-45
-95 to 95 step 1
This setting defines the characteristic angle used for the directional decision. IN2> Pol
39
57
Zero Sequence
0=Zero Sequence 1=Neg Sequence
This setting determines whether the directional function uses zero sequence or negative sequence voltage polarisation. IN2> VNpol Set
39
59
5 20
0.5V to 80V step 0.5V
This setting sets the minimum zero sequence voltage polarising quantity required for a directional decision. Derived IN2> VNpol Set
39
59
5 20
0.5V to 80V step 0.5V
This setting sets the minimum zero sequence voltage polarising quantity required for a directional decision. Measured IN2> V2pol Set
39
5A
5
0.5V to 80V step 0.5V
This setting sets the minimum zero sequence voltage polarising quantity required for a directional decision. Derived IN2> I2pol Set
39
5B
0.08
0.08*In to 1*In step 0.01In
This setting sets the minimum negative sequence current polarising quantity for directional decision.
8.8
APPLICATION NOTES
8.8.1
SETTING GUIDELINES (DIRECTIONAL ELEMENT)
With directional earth faults, the residual current under fault conditions lies at an angle lagging the polarizing voltage. Hence, negative RCA settings are required for DEF applications. This is set in the cell I>Char Angle in the relevant earth fault menu. We recommend the following RCA settings: ● Resistance earthed systems: 0° ● Distribution systems (solidly earthed): -45° ● Transmission systems (solidly earthed): -60°
8.8.2
PETERSON COIL EARTHED SYSTEMS
Power systems are usually earthed to limit transient overvoltages during arcing faults and also to assist with detection and clearance of earth faults. Impedance earthing has the advantage of limiting damage incurred by plant during earth fault conditions and also limits the risk of explosive failure of switchgear, which is a
P14D-B/G/L/Z-TM-EN-1
143
Chapter 5 - Current Protection Functions
P14D
danger to personnel. In addition, it limits touch and step potentials at a substation or in the vicinity of an earth fault. If a high impedance device is used for earthing the system, the earth fault current will be reduced but the steady state and transient overvoltages on the sound phases can be very high. Consequently, high impedance earthing is generally only used in distribution voltage networks, where it is not expensive to provide the necessary insulation against such overvoltages. One way of providing high impedance earthing is where the inductive earthing reactance is made equal to the total system capacitive reactance to earth at system frequency. This practice is known as Petersen Coil Earthing, or Resonant Coil Earthing. With a correctly tuned system, the steady state earth fault current is zero, so that arcing earth faults become self-extinguishing. Such a system can be run with one phase earthed for a long period until the cause of the fault is identified and rectified. The figure below shows a source earthed through a Petersen Coil, with an earth fault applied on the A Phase. Under this situation, the A phase shunt capacitance becomes short-circuited by the fault. Consequently, the calculations show that if the reactance of the earthing coil is set correctly, the resulting steady state earth fault current is zero.
E00631
Figure 34: Current distribution in Petersen Coil earthed system The figure below shows a three-feeder radial distribution system with a source that is earthed via a Petersen Coil, where a phase-to-earth fault is present on the C-phase.
144
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
E00632
Figure 35: Distribution of currents during a C phase to earth fault The associated vector diagrams shown below assume that it is fully compensated (i.e. coil reactance fully tuned to system capacitance), and that the resistance in the earthing coil and in the feeder cables is negligible.
E00633
Figure 36: Theoretical case - no resistance present in XL or XC
P14D-B/G/L/Z-TM-EN-1
145
Chapter 5 - Current Protection Functions
P14D
In figure (a), the C phase to earth fault causes the voltages on the healthy phases to rise by a factor of √3. The A phase charging currents (Ia1, Ia2 and Ia3), then lead the resultant A phase voltage by 90°; likewise for the B phase charging currents with respect to the resultant Vb. The imbalance detected by a core balanced current transformer on the healthy feeders is a simple vector addition of Ia1 and Ib1, giving a residual current which lies at exactly 90° lagging the residual voltage (figure (b)). As the healthy phase voltages have risen by a factor of √3, the charging currents on these phases are also √3 times larger than their steady state values. Therefore the magnitude of residual current IR1 is equal to 3 times the steady state per phase charging current. The actual residual voltage used as a reference signal for directional earth fault IEDs is phase shifted by 180° and is therefore shown as –3Vo in the vector diagrams. This phase shift is automatically introduced within the IEDs. On the faulted feeder, the residual current is the addition of the charging current on the healthy phases (IH3) plus the fault current (IF). The net imbalance is therefore equal to IL-IH1-IH2, as shown below.
E00640
Figure 37: Zero sequence network showing residual currents When comparing the residual currents occurring on the healthy and faulted feeders, using the above analysis, it can be seen that the currents would be similar in both magnitude and phase; hence it would not be possible to apply an IED, which could provide discrimination. However, the scenario of negligible resistance being present in the coil or feeder cables is purely theoretical. Therefore further consideration needs to be given to a practical application in which the resistive component is no longer ignored. This situation may be more readily explained by considering the zero sequence network for this fault condition.
146
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
E00641
Figure 38: Practical case - resistance present in XL and Xc Due to the presence of resistance in the feeders, the healthy phase charging currents are now leading their respective phase voltages by less than 90°. In a similar manner, the resistance present in the earthing coil has the effect of shifting the current IL to an angle less than 90° lagging. The residual current now appears at an angle in excess of 90° from the polarising voltage for the healthy feeder and less than 90° on the faulted feeder. Therefore, a directional IED having a characteristic angle setting of 0° (with respect to the polarising signal of -3Vo) could be applied to provide discrimination. The healthy feeder residual current would appear within the restrain section of the characteristic but the residual current on the faulted feeder would lie within the operate region. In practical systems, it may be found that a value of resistance is purposely inserted in parallel with the earthing coil. This serves two purposes; firstly to increase the earth fault current to a more practically detectable level and secondly to increase the angular difference between the residual signals in order to facilitate discriminating protection.
8.8.3
SETTING GUIDELINES (COMPENSATED NETWORKS)
The directional setting should be such that the forward direction is looking down into the protected feeder (away from the busbar), with a 0° RCA setting. For a fully compensated system, the residual current detected by the relay on the faulted feeder is equal to the coil current minus the sum of the charging currents flowing from the rest of the system. Further, the addition of the two healthy phase charging currents on each feeder gives a total charging current which has a magnitude of three times the steady state per phase value. Therefore, for a fully compensated system, the detected unbalanced current is equal to three times the per phase charging current of the faulted circuit. A typical setting may therefore be in the order of 30% of this value, i.e. equal to the per phase charging current of the faulted circuit. In practise, the exact settings may well be determined on site, where system faults can be applied and suitable settings can be adopted based on practically obtained results.
P14D-B/G/L/Z-TM-EN-1
147
Chapter 5 - Current Protection Functions
P14D
In most situations, the system will not be fully compensated and consequently a small level of steady state fault current will be allowed to flow. The residual current seen by the IED on the faulted feeder may therefore be a larger value, which further emphasises the fact that the IED settings should be based upon practical current levels, wherever possible. The above also holds true for the RCA setting. As has been shown, a nominal RCA setting of 0º is required. However, fine-tuning of this setting on-site may be necessary in order to obtain the optimum setting in accordance with the levels of coil and feeder resistances present. The loading and performance of the CT will also have an effect in this regard. The effect of CT magnetising current will be to create phase lead of current. Whilst this would assist with operation of faulted feeder IEDs, it would reduce the stability margin of healthy feeder IEDs. A compromise can therefore be reached through fine adjustment of the RCA. This is adjustable in 1° steps.
148
P14D-B/G/L/Z-TM-EN-1
P14D
9
Chapter 5 - Current Protection Functions
SENSITIVE EARTH FAULT PROTECTION
With some earth faults, the fault current flowing to earth is limited by either intentional resistance (as is the case with some HV systems) or unintentional resistance (e.g. in very dry conditions and where the substrate is high resistance, such as sand or rock). To provide protection in such cases, it is necessary to provide an earth fault protection system with a setting that is considerably lower than for normal line protection. Such sensitivity cannot be provided with conventional CTs, therefore SEF would normally be fed from a core balance current transformer (CBCT) mounted around the three phases of the feeder cable. Also a special measurement class SEF transformer should be used in the IED. With SEF protection, settings as low as 10% can be used
9.1
SEF PROTECTION IMPLEMENTATION
Sensitive Earth Fault protection is implemented in the SEF PROTECTION column of the relevant settings group. The product provides four stages of SEF protection with independent time delay characteristics. Stages 1, 2 provide a choice of operate and reset characteristics, where you can select between: ● A range of standard IDMT (Inverse Definite Minimum Time) curves ● A range of -defined curves ● DT (Definite Time) This is achieved using the cells ● ISEF>(n) Function for the overcurrent operate characteristic ● ISEF>(n) Reset Char for the overcurrent reset characteristic ● ISEF>(n) Usr RstChar for the reset characteristic for -defined curves where (n) is the number of the stage. Stages 1 and 2 also provide a Timer Hold facility (on page 88). This is configured using the cells ISEF>(n) tReset. Stages 3 and 4 can have definite time characteristics only.
P14D-B/G/L/Z-TM-EN-1
149
Chapter 5 - Current Protection Functions
9.2
P14D
NON-DIRECTIONAL SEF LOGIC ISEF(n) Start ISEF IDMT/DT
ISEF>(n) Current
&
&
ISEF>(n) Trip
ISEF>(n) Direction Non-directional
Timer settings
Inhibit SEF I2H Any Start ISEF> Blocking
&
2H Blocks ISEF>(n)
Key:
Energising Quanitity External DDB Signal
AR Blk Main Prot ISEF>Blocking
&
Internal function Setting cell
AR Blocks ISEF>(n)
Setting value
ISEF>(n) Timer Blk
AND gate
&
OR gate
1
Timer Comparator for detecting overvalues V00615
Figure 39: Non-directional SEF logic The SEF current is compared with a set threshold (ISEF>(n) Current) for each stage. If it exceeds this threshold, a Start signal is triggered, providing it is not blocked. This can be blocked by the second harmonic blocking function, or an Inhibit SEF DDB signal. The autoreclose logic can be set to block the SEF trip after a prescribed number of shots (set in AUTORECLOSE column). This is achieved using the AR Blk Main Prot setting. this can also be blocked by the relevant timer block signal ISEF>(n)TimerBlk DDB signal. SEF protection can follow the same IDMT characteristics as described in the Overcurrent Protection Principles section. Please refer to this section for details of IDMT characteristics.
EPATR B CURVE
9.3
The EPATR B curve is commonly used for time-delayed Sensitive Earth Fault protection in certain markets. This curve is only available in the Sensitive Earth Fault protection stages 1 and 2. It is based on primary current settings, employing a SEF CT ratio of 100:1 A. The EPATR_B curve has 3 separate segments defined in of the primary current. It is defined as follows: Segment
Primary Current Range Based on 100A:1A CT Ratio
Current/Time Characteristic
1
ISEF = 0.5A to 6.0A
t = 432 x TMS/ISEF 0.655 secs
2
ISEF = 6.0A to 200A
t = 800 x TMS/ISEF secs
3
ISEF above 200A
t = 4 x TMS secs
where TMS (time multiplier setting) is 0.025 - 1.2 in steps of 0.025.
150
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
EPATR Curve 1000
Time in Secs
100
10
1 0.1
1
10
100
1000
Current in Primary A (CT Ratio 100A/1A) V00616
Figure 40: EPATR B characteristic shown for TMS = 1.0
9.4
DIRECTIONAL ELEMENT
Where SEF current may flow in either direction through an IED location, directional control should be used. A directional element is available for all of the SEF overcurrent stages. This is found in the ISEF>(n) Direction cell for the relevant stage. It can be set to non-directional, directional forward, or directional reverse. Directionality is achieved by using different techniques depending on the application and design philosophy. With reference to the figure below, you can see that directional SEF can be used for: ● ● ● ●
Solidly earthed systems Unearthed systems (insulated systems) Compensated systems Resistance earthed systems
The diagram shows which type of directional control can be used for which systems
P14D-B/G/L/Z-TM-EN-1
151
Chapter 5 - Current Protection Functions
Solidly Earthed Systems
Directional SEF
P14D
Unearthed Systems (insulated systems)
Directional SEF
Core-balanced CT Directional Earth Fault
Compensated Systems (Peterson coil)
Directional SEF
Resistance-earthed Systems
Directional SEF
INsin(ÈÈ characteristic
INcos(ÈÈ characteristic
INcos(ÈÈ characteristic
Wattmetric VN x IN sin(ÈÈ (reactive power)
Wattmetric VN x IN cos(ÈÈ (active power)
Core-balanced CT
High Impedance Fault (HIF)
Core-balanced CT
V00655
Directional Earth Fault High Impedance Fault (HIF)
Figure 41: Types of directional control The device s standard core-balanced directional control as well as Isin(phi), Icos(phi) and Wattmetric characteristics.
9.4.1
WATTMETRIC CHARACTERISTIC
Analysis has shown that a small angular difference exists between the spill current on healthy and faulted feeders for earth faults on compensated networks. This angular difference gives rise to active components of current which are in anti-phase to one another.
E00617
Figure 42: Resistive components of spill current Consequently, the active components of zero sequence power will also lie in similar planes, meaning an IED capable of detecting active power can make discriminatory decisions. If the Wattmetric component of zero sequence power is detected in the forward direction, then this would indicate fault on that feeder. If power is detected in the reverse direction, then the fault must be present on an adjacent feeder or at the source.
152
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
For operation of the directional earth fault element, all three of the settable thresholds must be exceeded; namely the current ISEF>, the voltage ISEF>VNpol Set and the power PN> Setting. The power setting is called PN> and is therefore calculated using residual rather than zero sequence quantities. Residual quantities are three times their respective zero sequence values and so the complete formula for operation is as shown below: The PN> setting corresponds to:
VresIrescos(f - fc) = 9VoIocos(f - fc) where: ● f = Angle between the Polarising Voltage (-Vres) and the Residual Current ● fc = Relay Characteristic Angle (RCA) Setting (ISEF> Char. Angle) ● Vres = Residual Voltage ● Ires = Residual Current ● Vo = Zero Sequence Voltage ● Io = Zero Sequence Current The action of setting the PN> threshold to zero would effectively disable the wattmetric function and the device would operate as a basic, sensitive directional earth fault element. However, if this is required, then the SEF option can be selected from the SEF/REF Options cell in the menu. Note: The residual power setting, PN>, is scaled by the programmed Transformer ratios.
A further point to note is that when a power threshold other than zero is selected, a slight alteration is made to the angular boundaries of the directional characteristic. Rather than being ±90° from the RCA, they are made slightly narrower at ±85°. The directional check criteria is as follows: Directional forward: -85° < (angle(IN) - angle(VN + 180°) - RCA) < 85° Directional reverse: -85° > (angle(IN) - angle(VN + 180°) - RCA) > 85°
9.4.2
ICOS PHI / ISIN PHI CHARACTERISTIC
In some applications, the residual current on the healthy feeder can lie just inside the operating boundary following a fault condition. The residual current for the faulted feeder lies close to the operating boundary.
P14D-B/G/L/Z-TM-EN-1
153
Chapter 5 - Current Protection Functions
P14D
E00618
Figure 43: Operating characteristic for Icos The diagram illustrates the method of discrimination when the real (cosf ) component is considered. Faults close to the polarising voltage will have a higher magnitude than those close to the operating boundary. In the diagram, we assume that the current magnitude I is in both the faulted and non-faulted feeders. ● For the active component Icos, the criterion for operation is: Icosf > Isef ● For the reactive component Isin, the criterion for operation is: Isinf > Isef Where Isef is the sensitive earth fault current setting for the stage in question If any stage is set to non-directional, the element reverts back to normal operation based on current magnitude I with no directional decision. In this case, correct discrimination is achieved by means of an Icos characteristic as the faulted feeder will have a large active component of residual current, whilst the healthy feeder will have a small value. For insulated earth applications, it is common to use the Isin characteristic. All of the relevant settings can be found under the SEF column.
154
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
9.4.3
DIRECTIONAL SEF LOGIC SEF Options SEF Wattmetric SEFsin(phi)
ISEF>(n) Start
SEFcos(phi)
ISEF ISEFsin(phi) ISEFcos(phi) IDMT/DT
ISEF>(n) Current
&
&
&
ISEF>(n) Trip
Inhibit SEF I2H Any Start ISEF> Blocking
&
Timer settings
2H Blocks ISEF>(n)
ISEF>(n) Direction Directional FWD Directional REV
VN.ISEF.cos phi &
PN> Setting SEF Options Wattmetric
Directional check
VN
&
ISEF> VNpol Set
Key:
VTS Slow Block ISEF> Blocking
External DDB Signal
Energising Quanitity &
Internal function
VTS Blocks SEF>(n)
ISEF>Char Angle AR Blk Main Prot ISEF>Blocking
Setting cell Setting value &
AR Blocks ISEF>(n)
ISEF>(n) Timer Blk
AND gate
&
OR gate
1
Timer Comparator for detecting overvalues
V00619
Figure 44: Directional SEF with VN polarisation (single stage) The sensitive earth fault protection can be set IN/OUT of service using the appropriate DDB inhibit signal, which can be operated from an opto-input or control command. VT Supervision (VTS) selectively blocks the directional protection or causes it to revert to non-directional operation. When selected to block the directional protection, VTS blocking is applied to the directional checking which effectively blocks the start outputs as well. The directional check criteria are given below for the standard directional sensitive earth fault element: ● Directional forward: -90° < (angle(IN) - angle(VN + 180°) - RCA) < 90° ● Directional reverse: -90° > (angle(IN) - angle(VN + 180°) - RCA) > 90°
P14D-B/G/L/Z-TM-EN-1
155
Chapter 5 - Current Protection Functions
P14D
Three possibilities exist for the type of protection element that you can use for sensitive earth fault detection: ● A suitably sensitive directional earth fault IED having a characteristic angle setting (RCA) of zero degrees, with the possibility of fine adjustment about this threshold. ● A sensitive directional zero sequence wattmetric IED having a characteristic angle setting (RCA) of zero degrees, with the possibility of fine adjustment about this threshold. ● A sensitive directional earth IED having Icosf and Isinf characteristics. All stages of the sensitive earth fault element can be set down to 0.5% of rated current and would therefore fulfil the requirements of the first method listed above. These could therefore be applied successfully if desired. However, many utilities (particularly in central Europe) have standardised on the wattmetric method for sensitive earth fault detection.
9.5 Ordinal
SEF DDB SIGNALS English Text
Source
Type
Response Function
Description 216
ISEF>1 Timer Blk
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal blocks the first stage Sensitive Earth Fault time delay 217
ISEF>2 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the second stage Sensitive Earth Fault time delay 218
ISEF>3 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the third stage Sensitive Earth Fault time delay 219
ISEF>4 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the fourth stage Sensitive Earth Fault time delay 216
ISEF>1 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the first stage Sensitive Earth Fault time delay 217
ISEF>2 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the second stage Sensitive Earth Fault time delay 218
ISEF>3 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the third stage Sensitive Earth Fault time delay 219
ISEF>4 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the fourth stage Sensitive Earth Fault time delay 269
ISEF>1 Trip
Software
This DDB signal is the first stage Sensitive Earth Fault trip signal 270
ISEF>2 Trip
Software
This DDB signal is the second stage Sensitive Earth Fault trip signal 271
ISEF>3 Trip
Software
This DDB signal is the third stage Sensitive Earth Fault trip signal 272
ISEF>4 Trip
Software
This DDB signal is the fourth stage Sensitive Earth Fault trip signal 323
ISEF>1 Start
Software
This DDB signal is the first stage Sensitive Earth Fault start signal 324
ISEF>2 Start
Software
This DDB signal is the second stage Sensitive Earth Fault start signal 325
ISEF>3 Start
Software
This DDB signal is the third stage Sensitive Earth Fault start signal
156
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Ordinal
English Text
Source
Type
Response Function
Description 326
ISEF>4 Start
Software
PSL Input
Protection event
PSL Input
No response
This DDB signal is the fourth stage Sensitive Earth Fault start signal 351
VTS Slow Block
Software
This DDB signal is a purposely delayed output from the VTS which can block other functions 352
CTS Block
Software
PSL Input
No response
This DDB signal is an instantaneously blocking output from the CTS which can block other functions 358
AR Blk Main Prot
Software
PSL Input
Protection event
This DDB signal, generated by the Autoreclose function, blocks the Main Protection elements (POC, EF1, EF2, NPSOC) 442
Inhibit SEF
Programmable Scheme Logic
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
This DDB signal inhibits Sensitive Earth Fault protection 541
I2H Any Start
Software
This DDB signal is the 2nd Harmonic start signal for any phase 626
ISEF> Any Start
Fixed Scheme Logic
This DDB signal is the any-phase start signal for SEF
9.6
SEF SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 SEF PROTECTION
3A
00
This column contains settings for Sensitive Earth Fault protection SEF Options
3A
01
SEF
0=SEF, 1=SEF cos(PHI), 2=SEF sin(PHI), 3=Wattmetric
This setting selects the type of sensitive earth fault protection function.
ISEF>1 Function
3A
2A
DT
0=Disabled1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=IEEE M Inverse 7=IEEE V Inverse 8=IEEE E Inverse 9=US Inverse 10=US ST Inverse 11=IDG 12=EPATR B 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the first stage SEF element. ISEF>1 Direction
3A
2B
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the first stage SEF element. ISEF>1 Current
3A
2E
0.05
0.001*In to 0.1*In step 0.00025In
This setting sets the pick-up threshold for the first stage SEF element. ISEF>1 IDG Is
3A
P14D-B/G/L/Z-TM-EN-1
2F
1.5
1 to 4 step 0.1
157
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting is set as a multiple of ISEF> setting for the IDG curve (Scandinavian) and determines the actual IED current threshold at which the element starts. ISEF>1 Delay
3A
31
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the first stage SEF element. ISEF>1 TMS
3A
32
1
0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. ISEF>1 Time Dial
3A
33
1
0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. ISEF>1 IDG Time
3A
34
1.2
From 1s to 2s step 0.01s
This setting sets the minimum operate time at high levels of fault current for IDG curves. ISEF>1 DT Adder
3A
35
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. ISEF>1 Reset Chr
3A
36
DT
0 = DT or 1 = Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. ISEF>1 tRESET
3A
37
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
ISEF>1 Usr RstChr
3A
38
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves.
ISEF>2 Function
3A
3A
Disabled
0=Disabled1=DT 2=IEC S Inverse 3=IEC V Inverse 4=IEC E Inverse 5=UK LT Inverse 6=IEEE M Inverse 7=IEEE V Inverse 8=IEEE E Inverse 9=US Inverse 10=US ST Inverse 11=IDG 12=EPATR B 13= curve 1 14= curve 2 15= curve 3 16= curve 4
This setting determines the tripping characteristic for the first stage SEF element. ISEF>2 Direction
3A
3B
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the first stage SEF element. ISEF>2 Current
3A
3E
0.05
0.005*In to 0.1*In step 0.00025In
This setting sets the pick-up threshold for the first stage SEF element. ISEF>2 IDG Is
3A
3F
1.5
1 to 4 step 0.1
This setting is set as a multiple of ISEF> setting for the IDG curve (Scandinavian) and determines the actual IED current threshold at which the element starts. ISEF>2 Delay
3A
41
1
From 0s to 200s step 0.01s
This setting sets the DT time delay for the first stage SEF element.
158
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description ISEF>2 TMS
3A
42
1
0.025 to 1.2 step 0.005
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. ISEF>2 Time Dial
3A
43
1
0.01 to 100 step 0.01
This is the Time Multiplier Setting to adjust the operate time of IEEE/US IDMT curves. ISEF>2 IDG Time
3A
44
1.2
From 1s to 2s step 0.01s
This setting sets the minimum operate time at high levels of fault current for IDG curves. ISEF>2 DT Adder
3A
45
0
From 0s to 100s step 0.01s
This setting adds an additional fixed time delay to the IDMT Operate characteristic. ISEF>2 Reset Chr
3A
46
DT
0 = DT or 1 = Inverse
This setting determines the type of Reset characteristic used for the IEEE/US curves. ISEF>2 tRESET
3A
47
0
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
ISEF>2 Usr RstChr
3A
48
DT
0 = DT 1= Curve 1 2= Curve 2 3= Curve 3 4= Curve 4
This setting determines the type of Reset characteristic used for the defined curves. ISEF>3 Status
3A
49
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the third stage SEF element. There is no choice of curves because this stage is DT only. ISEF>3 Direction
3A
4A
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the third stage SEF element. ISEF>3 Current
3A
4D
0.4
0.08*In to 32*In step 0.01In
This setting sets the pick-up threshold for the third stage SEF element. ISEF>3 Delay
3A
4E
0.5
From 0s to 200s step 0.01s
This setting sets the DT time delay for the third stage SEF element. ISEF>4 Status
3A
50
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the fourth stage SEF element. There is no choice of curves because this stage is DT only. ISEF>4 Direction
3A
51
Non-Directional
0 = Non-Directional, 1 = Directional Fwd, 2 = Directional Rev
This setting determines the direction of measurement for the fourth stage SEF element. ISEF>4 Current
3A
54
0.6
0.08*In to 32*In step 0.01In
This setting sets the pick-up threshold for the fourth stage SEF element. ISEF>4 Delay
3A
55
0.25
From 0s to 200s step 0.01s
This setting sets the DT time delay for the fourth stage SEF element.
P14D-B/G/L/Z-TM-EN-1
159
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description
ISEF> Blocking
3A
57
0x00F
Bit 0=VTS Blks ISEF>1, Bit 1=VTS Blks ISEF>2, Bit 2=VTS Blks ISEF>3, Bit 3=VTS Blks ISEF>4, Bit 4=AR Blks ISEF>3, Bit 5=AR Blks ISEF>4, Bit 6=2H Blocks ISEF>1, Bit 7=2H Blocks ISEF>2, Bit 8=2H Blocks ISEF>3, Bit 9=2H Blocks ISEF>4, Bit 10=Not Used Bit 11=Not Used
This setting cell contains a binary string (data type G64), where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models with Autoreclose.
ISEF> Blocking
3A
57
0x00F
Bit 0=VTS Blks ISEF>1, Bit 1=VTS Blks ISEF>2, Bit 2=VTS Blks ISEF>3, Bit 3=VTS Blks ISEF>4, Bit 4=Not Used, Bit 5=Not Used, Bit 6=2H Blocks ISEF>1, Bit 7=2H Blocks ISEF>2, Bit 8=2H Blocks ISEF>3, Bit 9=2H Blocks ISEF>4, Bit 10=Not Used Bit 11=Not Used
This setting cell contains a binary string (data type G64A), where you can define which blocking signals block which stage. The available settings depend on the model chosen. This description is for models without Autoreclose. ISEF POL
3A
58
ISEF> Char Angle
3A
59
90
From -95 to 95 step 1
This setting defines the characteristic angle used for the directional decision. ISEF> VNpol Set
3A
5B
5
0.5V to 80V step 0.5V
This setting sets the minimum zero sequence voltage polarising quantity required for a directional decision. ISEF> VNpol Set
3A
5B
5
0.5V to 80V step 0.5V
This setting sets the minimum zero sequence voltage polarising quantity required for a directional decision. WATTMETRIC SEF
3A
5D
The settings under this sub-heading relate to Wattmetric directional control for SEF PN> Setting
3A
5E
9
0.0 to 20 step 0.05
This setting sets the threshold for the wattmetric component of zero sequence power. PN> Setting
3A
5E
9
0.0 to 20 step 0.05
This setting sets the threshold for the wattmetric component of zero sequence power.
9.7
APPLICATION NOTES
9.7.1
INSULATED SYSTEMS
When insulated systems are used, it is not possible to detect faults using standard earth fault protection. It is possible to use a residual overvoltage device to achieve this, but even with this method full discrimination is not possible. Fully discriminative earth fault protection on this type of system can only be achieved by using a SEF (Sensitive Earth Fault) element. This type of protection detects the resultant imbalance in the system
160
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
charging currents that occurs under earth fault conditions. A core balanced CT must be used for this application. This eliminates the possibility of spill current that may arise from slight mismatches between residually connected line CTs. It also enables a much lower CT ratio to be applied, thereby allowing the required protection sensitivity to be more easily achieved. The following diagram shows an insulated system with a C-phase fault.
E00627
Figure 45: EL00627 Current distribution in an insulated system with C phase fault The IEDs on the healthy feeders see the charging current imbalance for their own feeder. The IED on the faulted feeder, however, sees the charging current from the rest of the system (IH1 and IH2 in this case). Its own feeder's charging current (IH3) is cancelled out. With reference to the associated vector diagram, it can be seen that the C-phase to earth fault causes the voltages on the healthy phases to rise by a factor of √3. The A-phase charging current (Ia1), leads the resultant A phase voltage by 90°. Likewise, the B-phase charging current leads the resultant Vb by 90°.
P14D-B/G/L/Z-TM-EN-1
161
Chapter 5 - Current Protection Functions
P14D
E00628
Figure 46: EL00628 Phasor diagrams for insulated system with C phase fault The current imbalance detected by a core balanced current transformer on the healthy feeders is the vector addition of Ia1 and Ib1. This gives a residual current which lags the polariing voltage (–3Vo) by 90°. As the healthy phase voltages have risen by a factor of Ö3, the charging currents on these phases are also Ö3 times larger than their steady state values. Therefore, the magnitude of the residual current IR1, is equal to 3 times the steady state per phase charging current. The phasor diagrams indicate that the residual currents on the healthy and faulted feeders (IR1 and IR3 respectively) are in anti-phase. A directional element could therefore be used to provide discriminative earth fault protection. If the polarising is shifted through +90°, the residual current seen by the relay on the faulted feeder will lie within the operate region of the directional characteristic and the current on the healthy feeders will fall within the restrain region. We have said that the required characteristic angle setting for the SEF element when applied to insulated systems, is +90°. This is for the case when the IED is connected such that its direction of current flow for operation is from the source busbar towards the feeder. If the forward direction for operation were set such that it is from the feeder into the busbar, (which some utilities may standardise on), then a –90° RCA would be required. Note: Discrimination can be provided without the need for directional control. This can only be achieved, however, if it is possible to set the IED in excess of the charging current of the protected feeder and below the charging current for the rest of the system.
9.7.2
SETTING GUIDELINES (INSULATED SYSTEMS)
The residual current on the faulted feeder is equal to the sum of the charging currents flowing from the rest of the system. Further, the addition of the two healthy phase charging currents on each feeder gives a total charging current which has a magnitude of three times the per phase value. Therefore, the total imbalance current is equal to three times the per phase charging current of the rest of the system. A typical setting may therefore be in the order of 30% of this value, i.e. equal to the per phase charging current of the remaining system. Practically though, the required setting may well be determined on site, where suitable settings can be adopted based on practically obtained results.
162
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
When using a core-balanced transformer, care must be taken in the positioning of the CT with respect to the earthing of the cable sheath:
E00614
Figure 47: Positioning of core balance current transformers If the cable sheath is terminated at the cable gland and directly earthed at that point, a cable fault (from phase to sheath) will not result in any unbalanced current in the core balance CT. Therefore, prior to earthing, the connection must be brought back through the CBCT and earthed on the feeder side. This then ensures correct relay operation during earth fault conditions.
P14D-B/G/L/Z-TM-EN-1
163
Chapter 5 - Current Protection Functions
10
P14D
RESTRICTED EARTH FAULT PROTECTION
Winding-to-core faults in a transformer are quite common due to insulation breakdown. Such faults can have very low fault currents, but they are faults nevertheless and have to be picked up, as they can still severely damage expensive equipment. Often the fault currents are even lower than the nominal load current. Clearly, neither overcurrent nor percentage differential protection is sufficiently sensitive in this case. We therefore require a different type of protection arrangement. Not only should the protection arrangement be sensitive, but it must create a protection zone, which is limited to the transformer windings. Restricted Earth Fault (REF) protection satisfies these conditions. The first figure shows an REF protection arrangement for the delta side of a delta-star transformer. The current transformers measuring the currents in each phase are connected in parallel. A fault outside the protection zone (i.e. outside the delta winding) will not result in a spill current, as the fault current would simply circulate in the delta windings. However, if any of the three delta windings were to develop a fault, the impedance of the faulty winding would change and that would result in a mismatch between the phase currents, resulting in a spill current, sufficient to trigger a trip command.
Load
IED
REF protection zone
V00620
Figure 48: REF protection for delta side The second figure shows an REF protection arrangement for the star side of a delta-star transformer. Here we have a similar arrangement of current transformers connected in parallel. The only difference is that we need to measure the zero sequence current in the neutral line as well. We know that an external unbalanced fault causes zero sequence current to flow through the neutral line, resulting in uneven currents in the phases, which would cause the IED to maloperate. By measuring this zero sequence current and placing the current transformer in parallel with the other three, the currents are balanced up resulting in stable operation. Now only a fault inside the star winding can create an imbalance sufficient to cause the IED to issue a trip command. REF protection zone
Load
IED
V00621
Figure 49: REF protection for star side Two methods of REF are commonly used; bias or high impedance. The biasing technique operates by measuring the level of through-current flowing and altering the protection device sensitivity accordingly. In a
164
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
biased differential IED, the through-current is measured and used to increase the setting of the differential element. For heavy through-faults, one CT in the scheme can be expected to become more saturated than the other and so differential current can be produced. However, biasing will increase the IED setting such that the resulting differential current is insufficient to cause the IED to operate, therefore ensuring the integrity of the tripping scheme. The high impedance technique ensures that the circuit is of sufficiently high impedance such that the differential voltage that may occur under external fault conditions is less than that required to drive setting current through the device.
10.1
RESTRICTED EARTH FAULT PROTECTION IMPLEMENTATION
Restricted Earth Fault Protection is implemented in the Restricted E/F column of the relevant settings group. It is here that the constants and bias currents are set. The REF protection may be configured to operate as either a high impedance or biased element.
10.2
REF SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 RESTRICTED E/F
43
00
This column contains settings for Restricted Earth Fault Protection REF Options
43
01
Lo Z REF
0=Hi Z REF or 1=Lo Z REF
This setting determines the Restricted Earth Fault mode of operation - high impedance or low impedance. IREF> k1
43
02
20
From 0 to 20 step 1
This setting sets the first slope constant of the low impedance biased characteristic. IREF> k2
43
03
150
From 0 to 150 step 1
This setting sets the second slope constant of the low impedance biased characteristic. IREF> Is1
43
04
0.2
From 0.08 to 1 step 0.01
This setting sets the bias current threshold for the first slope of the low impedance characteristic. IREF> Is2
43
05
1
From 0.1 to 1.5 step 0.01
This setting sets the bias current threshold for the second slope of the low impedance characteristic. IREF> Is
43
06
0.2
From 0.05 to 1 step 0.01
Setting that determines the minimum differential operate current for the hi-impedance element.
10.3
APPLICATION NOTES
10.3.1
BIASED DIFFERENTIAL PROTECTION
The three line CTs are connected to the three-phase CTs, and the neutral CT is connected to the EF1 CT input. These currents are then used internally to derive both a bias and a differential current quantity for use by the low impedance REF protection (Lo-Z). The advantage of this mode of connection is that the line and neutral CTs are not differentially connected, so the neutral CT can also be used to drive the EF1 protection to provide Standby Earth Fault Protection. Also, no external components such as stabilizing resistors or Metrosils are required.
P14D-B/G/L/Z-TM-EN-1
165
Chapter 5 - Current Protection Functions
P14D
IED
E00623
Figure 50: REF bias principle Where the neutral CT also drives the EF1 protection element to provide standby earth fault protection, you may require that the neutral CT has a lower ratio than the line CTs in order to provide better earth fault sensitivity. This must be ed for in the REF protection, otherwise the neutral current value used would be incorrect. For this reason, the device automatically scales the level of neutral current used in the bias calculation by a factor equal to the ratio of the neutral to line CT primary ratings. The use of this scaling factor is shown in the figure, where the formulae for bias and differential currents are given.
166
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
10.3.2
SETTING GUIDELINES FOR BIASED DIFFERENTIAL OPERATION
E00622
Figure 51: REF bias characteristic The formulae used by the device to calculate the required bias quantity is as follows:
IBIAS = {(Highest of Ia, Ib or Ic) + (Ineutral x Scaling Factor)}/2 For IBIAS < Is1: Operate when IDIFF > Is1 + K1(IBIAS) For IBIAS = Is2: Operate when IDIFF > Is1 + K1(Is2) For IBIAS > Is2: Operate when IDIFF > Is1 + K1(Is2) + K2(IBIAS-Is2) Two bias settings are provided in the REF characteristic. The K1 level of bias is applied up to through currents of Is2, which is normally set to the rated current of the transformer. K1 should normally be set to 0% to give optimum sensitivity for internal faults. However, if any CT mismatch is present under normal conditions, then K1 may be increased accordingly, to compensate. K2 bias is applied for through currents above Is2 and would typically be set to 150%.
10.3.3
HIGH IMPEDANCE REF
The high impedance principle is best explained by considering a differential scheme where one CT is saturated for an external fault, as shown below.
P14D-B/G/L/Z-TM-EN-1
167
Chapter 5 - Current Protection Functions
P14D
E00624
Figure 52: High Impedance principle If the IED circuit has a very high impedance, the secondary current produced by the healthy CT will flow through the saturated CT. If CT magnetising impedance of the saturated CT is considered to be negligible, the maximum voltage across the circuit will be equal to the secondary fault current multiplied by the connected impedance, (RL3 + RL4 + RCT2). The IED can be made stable for this maximum applied voltage by increasing the overall impedance of the circuit, such that the resulting current through it is less than its current setting. As the impedance of the IED input alone is relatively low, a series connected external resistor is required. The value of this resistor, RST, is calculated by the formula shown. An additional non-linear, Metrosil, may be required to limit the peak secondary circuit voltage during internal fault conditions. To ensure that the protection will operate quickly during an internal fault, the CTs used to operate the protection must have a knee-point voltage of at least 4 Vs. The necessary connections for high impedance REF are as follows:
168
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
EF1
E00625
Figure 53: High Impedance REF connectivity
10.3.4
SETTING GUIDELINES FOR HIGH IMPEDANCE OPERATION
First, go to the SEF PROT'N column and set the SEF/REF Options cell to 'Hi Z' to enable this protection. The only setting cell then visible in the RESTRICTED E/F column is IREF>Is, which may be programmed with the required differential current setting. This would typically be set to give a primary operating current of either 30% of the minimum earth fault level for a resistance earthed system or between 10 and 60% of rated current for a solidly earthed system. The primary operating current (Iop) will be a function of the current transformer ratio, the IED operating current (IREF>Is1), the number of current transformers in parallel with an IED element (n) and the magnetising current of each current transformer (Ie) at the stability voltage (Vs). This relationship can be expressed in three ways: 1) To determine the maximum current transformer magnetising current to achieve a specific primary operating current with a particular relay operating current:
Ie <
1 I op − I REF > I s n CT Ratio
2) To determine the minimum current setting to achieve a specific primary operating current with a given current transformer magnetising current:
I op I REF > I s < − nI e CT Ratio 3) To express the protection primary operating current with a particular level of magnetising current:
I OP = ( CT Ratio )( I REF ) > I s + nI c In order to achieve the required primary operating current with the current transformers that are used, a current setting (IREF>Is) must be selected for the high impedance element, as detailed in expression (ii) above. The setting of the stabilising resistor (RST) must be calculated in the following manner, where the setting is a function of the required stability voltage setting (Vs) and the relay current setting (IREF>Is).
P14D-B/G/L/Z-TM-EN-1
169
Chapter 5 - Current Protection Functions
Rst =
P14D
I ( R + 2 RL ) Vs = f CT I REF > I s I REF > I s
The stabilising resistor that can be supplied is continuously adjustable up to its maximum declared resistance. Note: The above formula assumes negligible relay burden.
170
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
11
THERMAL OVERLOAD PROTECTION
The heat generated within an item of plant, such as a cable or a transformer, is the resistive loss (I2Rt). The thermal time characteristic is therefore based on the square of the current integrated over time. The device automatically uses the largest phase current for input to the thermal model. Equipment is designed to operate continuously at a temperature corresponding to its full load rating, where the heat generated is balanced with heat dissipated. Over-temperature conditions occur when currents in excess of their maximum rating are allowed to flow for a period of time. It is known that temperature changes during heating follow exponential time constants. The device provides two characteristics that may be selected according to the application; single time constant characteristic and dual time constant characteristic.
11.1
SINGLE TIME CONSTANT CHARACTERISTIC
This characteristic is used to protect cables, dry type transformers (e.g. type AN), and capacitor banks. The single constant thermal characteristic is given by the equation:
I 2 − ( KI FLC )2 t = −τ log I 2 − I p2 e where: ● t = time to trip, following application of the overload current I ● t = heating and cooling time constant of the protected plant ● I = largest phase current ● IFLC full load current rating (the Thermal Trip setting) ● K = a constant with the value of 1.05 ● Ip = steady state pre-loading before application of the overload
DUAL TIME CONSTANT CHARACTERISTIC
11.2
This characteristic is used to protect oil-filled transformers with natural air cooling (e.g. type ONAN). The thermal model is similar to that with the single time constant, except that two timer constants must be set. For marginal overloading, heat will flow from the windings into the bulk of the insulating oil. Therefore, at low current, the replica curve is dominated by the long time constant for the oil. This provides protection against a general rise in oil temperature. For severe overloading, heat accumulates in the transformer windings, with little opportunity for dissipation into the surrounding insulating oil. Therefore at high current levels, the replica curve is dominated by the short time constant for the windings. This provides protection against hot spots developing within the transformer windings. Overall, the dual time constant characteristic serves to protect the winding insulation from ageing and to minimise gas production by overheated oil. Note however that the thermal model does not compensate for the effects of ambient temperature change. The dual time constant thermal characteristic is given by the equation:
0.4e
( − t / τ1 )
+ 0.6e
P14D-B/G/L/Z-TM-EN-1
( −t / τ 2 )
I 2 − ( KI FLC )2 = 2 2 I − I p
171
Chapter 5 - Current Protection Functions
P14D
where: ● t1 = heating and cooling time constant of the transformer windings ● t2 = heating and cooling time constant of the transformer windings
11.3
THERMAL OVERLOAD PROTECTION IMPLEMENTATION
The device incorporates a current-based thermal characteristic, using RMS load current to model heating and cooling of the protected plant. The element can be set with both alarm and trip stages. Thermal Overload Protection is implemented in the THERMAL OVERLOAD column of the relevant settings group. This column contains the settings for the characteristic type, the alarm and trip thresholds and the time constants.
11.4
THERMAL OVERLOAD PROTECTION LOGIC IA IB IC
Max
Thermal State
Thermal Trip Char
Thermal Calculation
Disabled Single
Thermal Trip
Thermal trip threshold
Dual
Time Constant 1 Time Constant 2
Reset Thermal Thermal Alarm Thermal Alarm
Key:
Energising Quanitity External DDB Signal
Comparator for detecting overvalues
Internal function
V00630
Setting cell
Measurement cell
Setting value
Hard-coded setting
Figure 54: Thermal overload protection logic diagram The magnitudes of the three phase input currents are compared and the largest magnitude is taken as the input to the thermal overload function. If this current exceeds the thermal trip threshold setting a start condition is asserted. The Start signal is applied to the chosen thermal characteristic module, which has three outputs signals; alarm trip and thermal state measurement. The thermal state measurement is made available in the MEASUREMENTS 3 column. The thermal state can be reset by either an opto-input (if assigned to this function using the programmable scheme logic) or the HMI menu. This reset command is also found in the MEASUREMENTS 3 column.
172
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
11.5
THERMAL OVERLOAD DDB SIGNALS
Ordinal
English Text
Source
Type
Response Function
Description 236
Reset Thermal
Programmable Scheme Logic
PSL Output
No response
Software
PSL Input
Protection event
PSL Input
Protection event
This DDB signal resets the Thermal State 329
Thermal Alarm
This DDB signal is the Thermal Overload start signal 276
Thermal Trip
Software
This DDB signal is the Thermal Overload trip signal
11.6
THERMAL OVERLOAD SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 THERMAL OVERLOAD
3C
00
This column contains settings for Thermal Overload Characteristic
3C
01
Single
0 = Disabled, 1 = Single, 2 = Dual
This setting determines the operate characteristic for the thermal overload element. Thermal Trip
3C
02
1
0.08*In to 4*In step 0.01In
This setting sets the pick-up threshold of the thermal characteristic. This would normally be the maximum full load current. Thermal Alarm
3C
03
70
50 to 100 step 1
This setting sets the thermal state threshold at which an alarm will be generated. This corresponds to a percentage of the trip threshold Time Constant 1
3C
04
10
1 to 200 step 1
This setting sets the thermal time constant for a single time constant characteristic. Time Constant 2
3C
05
5
1 to 200 step 1
This setting sets the thermal time constant for a dual time constant characteristic.
11.7
APPLICATION NOTES
11.7.1
SETTING GUIDELINES FOR DUAL TIME CONSTANT CHARACTERISTIC
The easiest way of solving the dual time constant thermal equation is to express the current in of time and to use a spreadsheet to calculate the current for a series of increasing operating times using the following equation, then plotting a graph.
I=
0.4 I p 2 .e( − t /τ 1) + 0.6 I p 2 .e( − t /τ 2) − k 2 .I FLC 2 0.4e( − t /
τ 1)
P14D-B/G/L/Z-TM-EN-1
+ 0.6e( − t /τ 2) − 1
173
Chapter 5 - Current Protection Functions
P14D
Operating Time (seconds)
100000
Time constant 1 = 5 mins
10000
Time constant 2 = 120 mins Pre-overload current = 0.9 pu Thermal setting = 1 Amp
1000
100
10
1 1
10
Current as a Multiple of Thermal Setting
V00629
Figure 55: Dual time constant thermal characteristic The current setting is calculated as: Thermal Trip = Permissible continuous loading of the transformer item/CT ratio. For an oil-filled transformer with rating 400 to 1600 kVA, the approximate time constants are: ● t1 = 5 minutes ● t2 = 120 minutes An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip threshold. A typical setting might be "Thermal Alarm" = 70% of thermal capacity. Note: The thermal time constants given in the above tables are typical only. Reference should always be made to the plant manufacturer for accurate information.
11.7.2
SETTING GUIDELINES FOR SINGLE TIME CONSTANT CHARACTERISTIC
The time to trip varies depending on the load current carried before application of the overload, i.e. whether the overload was applied from hot or cold. The thermal time constant characteristic may be rewritten as:
θ − θ p e( − t / τ ) = θ −1 e where: ● θ = thermal state = I2/K2IFLC2 ● θp = pre-fault thermal state = Ip2/K2IFLC2 Note: A current of 105%Is (KIFLC) has to be applied for several time constants to cause a thermal state measurement of 100% The current setting is calculated as:
174
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Thermal Trip = Permissible continuous loading of the plant item/CT ratio. The following tables show the approximate time constant in minutes, for different cable rated voltages with various conductor cross-sectional areas, and other plant equipment. Area mm2
6 - 11 kV
22 kV
33 kV
66 kV
25 – 50
10 minutes
15 minutes
40 minutes
–
70 – 120
15 minutes
25 minutes
40 minutes
60 minutes
150
25 minutes
40 minutes
40 minutes
60 minutes
185
25 minutes
40 minutes
60 minutes
60 minutes
240
40 minutes
40 minutes
60 minutes
60 minutes
300
40 minutes
60 minutes
60 minutes
90 minutes
Plant type
Time Constant (Minutes)
Dry-type transformer <400 kVA
40
Dry-type transformers 400 – 800 kVA
60 - 90
Air-core Reactors
40
Capacitor Banks
Overhead Lines with cross section > 100
10
mm2
10
Overhead Lines
10
Busbars
60
P14D-B/G/L/Z-TM-EN-1
175
Chapter 5 - Current Protection Functions
12
P14D
BROKEN CONDUCTOR PROTECTION
One type of unbalanced fault is the 'Series' or 'Open Circuit' fault. This type of fault can arise from, among other things, broken conductors. Series faults do not cause an increase in phase current and so cannot be detected by overcurrent IEDs. However, they do produce an imbalance, resulting in negative phase sequence current, which can be detected. It is possible to apply a negative phase sequence overcurrent element to detect broken conductors. However, on a lightly loaded line, the negative sequence current resulting from a series fault condition may be very close to, or less than, the full load steady state imbalance arising from CT errors and load imbalances, making it very difficult to distinguish. A regular negative sequence element would therefore not work at low load levels. To overcome this, the device incorporates a special Broken Conductor protection element. The Broken Conductor element measures the ratio of negative to positive phase sequence current (I2/I1). This ratio is approximately constant with variations in load current, therefore making it more sensitive to series faults than standard negative sequence protection.
12.1
BROKEN CONDUCTOR PROTECTION IMPLEMENTATION
Broken Conductor protection is implemented in the BROKEN CONDUCTOR column of the relevant settings group. This column contains the settings to enable the function, for the pickup threshold and the time delay.
BROKEN CONDUCTOR PROTECTION LOGIC
12.2
The ratio of I2/I1 is calculated and compared with the threshold. If the threshold is exceeded, the delay timer is initiated. The CTS block signal is used to block the operation of the delay timer. BrokenLine Start I2/I1 &
I2/I1 Setting
I2
Broken Line Trip
Key: Energising Quanitity
Low current
AND gate
&
External DDB Signal Timer
Internal function
CTS Block
Setting cell
Comparator for detecting overvalues
Hardcoded setting V00609
Figure 56: Broken conductor logic
12.3 Ordinal
BROKEN CONDUCTOR DDB SIGNALS English Text
Source
Type
Response Function
Description 260
Broken Line Trip
Software
PSL Input
Protection event
This DDB signal is the Broken Conductor trip signal
176
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Ordinal
English Text
Source
Type
Response Function
Description 352
CTS Block
Software
PSL Input
No response
This DDB signal is an instantaneously blocking output from the CTS which can block other functions 535
BrokenLine Start
Software
PSL Input
Protection event
This DDB signal is the Broken Conductor start signal
12.4
BROKEN CONDUCTOR SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 BROKEN CONDUCTOR
37
00
This column contains settings for Broken Conductor Broken Conductor
37
01
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Broken Conductor function. I2/I1 Setting
37
02
0.2
From 0.2 to 1 step 0.01
This setting determines the pick-up threshold of the negative to positive sequence current ratio. I2/I1 Time Delay
37
03
60
From 0s to 100s step 0.1s
This setting sets the time delay for the broken conductor element
12.5
APPLICATION NOTES
12.5.1
SETTING GUIDELINES
For a broken conductor affecting a single point earthed power system, there will be little zero sequence current flow and the ratio of I2/I1 that flows in the protected circuit will approach 100%. In the case of a multiple earthed power system (assuming equal impedance’s in each sequence network), the ratio I2/I1 will be 50%. In practise, the levels of standing negative phase sequence current present on the system govern this minimum setting. This can be determined from a system study, or by making use of the measurement facilities at the commissioning stage. If the latter method is adopted, it is important to take the measurements during maximum system load conditions, to ensure that all single-phase loads are ed for. Note: A minimum value of 8% negative phase sequence current is required for successful operation.
Since sensitive settings have been employed, we can expect that the element will operate for any unbalanced condition occurring on the system (for example, during a single pole autoreclose cycle). For this reason, a long time delay is necessary to ensure co-ordination with other protection devices. A 60 second time delay setting may be typical. The following example was recorded by an IED during commissioning:
Ifull load = 500A I2 = 50A therefore the quiescent I2/I1 ratio = 0.1 To allow for tolerances and load variations a setting of 20% of this value may be typical: Therefore set:
P14D-B/G/L/Z-TM-EN-1
177
Chapter 5 - Current Protection Functions
P14D
I2/I1 = 0.2 In a double circuit (parallel line) application, using a 40% setting will ensure that the broken conductor protection will operate only for the circuit that is affected. A setting of 0.4 results in no pick-up for the parallel healthy circuit. Set I2/I1 Time Delay = 60 s to allow adequate time for short circuit fault clearance by time delayed protections.
178
P14D-B/G/L/Z-TM-EN-1
P14D
13
Chapter 5 - Current Protection Functions
CIRCUIT BREAKER FAIL PROTECTION
When a fault occurs, one or more protection devices will operate and issue a trip command to the relevant circuit breakers. Operation of the circuit breaker is essential to isolate the fault and prevent, or at least limit, damage to the power system. For transmission and sub-transmission systems, slow fault clearance can also threaten system stability. For these reasons, it is common practise to install Circuit Breaker Failure protection (CBF). CBF protection monitors the circuit breaker and establishes whether it has opened within a reasonable time. If the fault current has not been interrupted following a set time delay from circuit breaker trip initiation, the CBF protection will operate, whereby the upstream circuit breakers are back-tripped to ensure that the fault is isolated. CBF operation can also reset all start output s, ensuring that any blocks asserted on upstream protection are removed.
13.1
CIRCIUIT BREAKER FAIL IMPLEMENTATION
Circuit Breaker Failure Protection is implemented in the CB FAIL & I< column of the relevant settings group. The circuit breaker failure protection incorporates two timers, CB Fail 1 Timer and CB Fail 2 Timer, allowing configuration for the following scenarios: ● Simple CBF, where only CB Fail 1 Timer is enabled. For any protection trip, the CB Fail 1 Timer is started, and normally reset when the circuit breaker opens to isolate the fault. If breaker opening is not detected, the CB Fail 1 Timer times out and closes an output assigned to breaker fail (using the programmable scheme logic). This is used to back-trip upstream switchgear, generally tripping all infeeds connected to the same busbar section. ● A re-tripping scheme, plus delayed back-tripping. Here, CB Fail 1 Timer is used to issue a trip command to a second trip circuit of the same circuit breaker. This requires the circuit breaker to have duplicate circuit breaker trip coils. This mechanism is known as re-tripping. Should re-tripping fail to open the circuit breaker, then a back-trip may be issued following an additional time delay. The backtrip uses CB Fail 2 Timer, which was also started at the instant of the initial protection element trip.
P14D-B/G/L/Z-TM-EN-1
179
Chapter 5 - Current Protection Functions
13.2
P14D
CIRCIUIT BREAKER FAIL LOGIC Ext. Trip 3ph
CB Fail 1 Status
S
1
Trip Command In
CBF3PhStart
Enabled
Q
Disabled
R
IA< Start IB< Start
&
IC< Start
1 1
ZCD IA<
1
&
1
&
1
&
1
Bfail1 Trip 3ph
ZCD B<
&
ZCD C< ZCD IN<
External Trip EF
S
IN< Start
R
Q
1
CB Fail 2 Status
1
Enabled
ZCD IN<
CB Fail Alarm
Disabled
External TripSEF
S
1
CBF SEF Trip
Q
1
&
1
&
1
&
R
ISEF< Start
1
ZCD ISEF<
1
Bfail2 Trip 3ph
S
CBF NonI Trip
Q
Volt Prot Reset
&
Prot Reset & I<
R
1
I
& All Poles Dead S
Ext. Trip 3ph
Q
Ext. Prot Reset
&
Prot Reset & I<
Note on SR Latches All latches are reset dominant and are triggered on the positive edge. If the edge occurs while the reset is active, the detection of the edge is delayed until the reset becomes non-active.
R
1
I
Key: External DDB Signal
CB Open & I<
& All Poles Dead
Hidden DDB Signal Setting cell
CBFExtPhAStart
Setting value
CBFExtPhBStart CBFExtPhCStart
AND gate SR Latch
V00634
& S Q
OR gate
1
Timer
R
Figure 57: Circuit Breaker Fail Logic - three phase start
180
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
CB Fail 1 Status Enabled Disabled
CBF3PhStart
CBFExtPhAStart External Trip A
S
IA< Start
R
Q
1
1
&
1
&
1
&
1
Bfail1 Trip 3ph
1
ZCD IA< S
External Trip A
Q
Ext. Prot Reset
&
Prot Reset & I<
R
1
CB Fail 2 Status
I
1
Enabled
CB Open & I<
&
CBFExtPhBStart
CB Fail Alarm
Disabled
Pole Dead A
External Trip B
S
IB< Start
R
1
&
1
&
1
&
Q
1
1
ZCD B< S
External Trip B
Q
Ext. Prot Reset
&
Prot Reset & I<
R
Note on SR Latches All latches are reset dominant and are triggered on the positive edge. If the edge occurs while the reset is active, the detection of the edge is delayed until the reset becomes non-active.
I
CBFExtPhCStart
& Pole Dead B
External Trip C
S
IC< Start
R
Key:
Q
1
External DDB Signal
ZCD C<
1 S
External Trip C
&
Hidden DDB Signal Setting cell
Q Prot Reset & I<
Bfail2 Trip 3ph
1
CB Open & I<
Ext. Prot Reset
1
R
Setting value
1
I
AND gate
&
OR gate
1
CB Open & I<
& Pole Dead C
SR Latch
S Q
Timer
R
V00657
Figure 58: Circuit Breaker Fail Logic - single phase start CBF elements CB Fail 1 Timer and CB Fail 2 Timer can be configured to operate for trips triggered by protection elements within the device or via an external protection trip. The latter is achieved by allocating one of the opto-isolated inputs to "External Trip" using the programmable scheme logic. It is possible to reset the CBF from a breaker open indication (from the Pole Dead logic) or from a protection reset. In these cases resetting is only allowed provided the undercurrent elements have also been reset. The resetting options are summarised in the following table: Initiation (Menu Selectable) Current based protection
P14D-B/G/L/Z-TM-EN-1
CB Fail Timer Reset Mechanism The resetting mechanism is fixed (e.g. 50/51/46/21/87) IA< operates AND IB< operates AND IC< operates AND IN< operates
181
Chapter 5 - Current Protection Functions
P14D
Initiation (Menu Selectable)
CB Fail Timer Reset Mechanism The resetting mechanism is fixed. ISEF< Operates
Sensitive Earth Fault element
Three options are available: All I< and IN< elements operate Non-current based protection (e.g. 27/59/81/32L) Protection element reset AND all I< and IN< elements operate CB open (all 3 poles) AND all I< and IN< elements operate Three options are available. All I< and IN< elements operate External trip reset AND all I< and IN< elements operate CB open (all 3 poles) AND all I< and IN< elements operate
External protection
The Remove I> Start and Remove IN> Start settings are used to remove starts issued from the overcurrent and earth elements respectively following a breaker fail time out. The start is removed when the cell is set to 'Enabled'.
13.3 Ordinal
CB FAIL DDB SIGNALS English Text
Source
Type
Response Function
Description 150
CB Fail Alarm
Software
PSL Input
Alarm latched event
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
No response
PSL Input
No response
PSL Input
No response
PSL Input
No response
PSL Input
No response
PSL Input
No response
PSL Input
No response
PSL Input
No response
PSL Input
No response
This DDB signal is an alarm indicating CB Failure 227
Ext. Trip 3ph
Programmable Scheme Logic
This DDB signal receives an external three-phase trip signal 353
Bfail1 Trip 3ph
Software
This DDB signal is the three-phase trip signal for the stage 1 CB Fail function 354
Bfail2 Trip 3ph
Software
This DDB signal is the three-phase trip signal for the stage 2 CB Fail function 373
IA< Start
Software
This DDB signal is the A-phase Phase Undercurrent start signal 374
IB< Start
Software
This DDB signal is the B-phase Phase Undercurrent start signal 375
IC< Start
Software
This DDB signal is the C-phase Phase Undercurrent start signal 376
IN< Start
Software
This DDB signal is the Earth Fault undercurrent start signal 377
ISEF< Start
Software
This DDB signal is the Sensitive Earth Fault undercurrent start signal 380
All Poles Dead
Software
This DDB signal indicates that all poles are dead 382
Pole Dead A
Software
This DDB signal indicates that the A-phase pole is dead. 383
Pole Dead B
Software
This DDB signal indicates that the B-phase pole is dead. 384
Pole Dead C
Software
This DDB signal indicates that the C-phase pole is dead.
182
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Ordinal
English Text
Source
Type
Response Function
Description 499
External Trip A
Programmable Scheme Logic
PSL Output
No response
This DDB signal is connected to an external A-Phase trip, which initiates a CB Fail condition 500
External Trip B
Programmable Scheme Logic
PSL Output
No response
This DDB signal is connected to an external B-Phase trip, which initiates a CB Fail condition 501
External Trip C
Programmable Scheme Logic
PSL Output
No response
This DDB signal is connected to an external C-Phase Trip, which initiates a CB Fail condition 502
External Trip EF
Programmable Scheme Logic
PSL Output
No response
This DDB signal is connected to an external Earth Fault trip, which initiates a CB Fail condition 503
External TripSEF
Programmable Scheme Logic
PSL Output
No response
This DDB signal is connected to an external Sensitive Earth Fault trip, which initiates a CB Fail condition 536
Trip Command In
Programmable Scheme Logic
PSL Output
Protection event
This DDB signal is the Trip Command In signal, which triggers the fixed trip LED and is mapped to the Trip Command Out signal in the FSL.
13.4
CB FAIL SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 CB FAIL & I<
45
00
This column contains settings for Circuit Fail and Under Current. BREAKER FAIL
45
01
The settings under this sub-heading relate to Circuit Breaker Fail (CB Fail) settings CB Fail 1 Status
45
02
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the first stage of the CB Fail protection. CB Fail 1 Timer
45
03
0.2
From 0s to 50s step 0.01s
This setting sets the first stage CB Fail timer in which the CB opening must be detected. CB Fail 2 Status
45
04
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage of the CB Fail protection. CB Fail 2 Timer
45
05
0.4
From 0s to 50s step 0.01s
This setting sets the second stage CB Fail timer in which the CB opening must be detected. Volt Prot Reset
45
06
CB Open & I<
0=I< Only 1=CB Open & I< 2=Prot Reset & I<
This setting determines the elements that will reset the CB fail timer for CB Failures, which were initiated by the voltage protection function. Ext Prot Reset
45
07
CB Open & I<
0=I< Only 1=CB Open & I< 2=Prot Reset & I<
This setting determines the elements that will reset the CB fail timer for CB Failures initiated by external protection functions. UNDER CURRENT
45
08
The settings under this sub-heading relate to Undercurrent settings I< Current Set
45
09
0.1
From 0.02*I1 to 3.2*I1 step 0.01*I1
This setting determines the current threshold, which will reset the CB Fail timer for Overcurrent-based protection IN< Current Set
45
0A
0.1
From 0.02*I2 to 3.2*I2 step 0.01*I2
This setting determines the current threshold, which will reset the CB Fail timer for Earth Fault-based protection
P14D-B/G/L/Z-TM-EN-1
183
Chapter 5 - Current Protection Functions
Menu Text
Col
P14D
Row
Default Setting
Available Options
Description ISEF< Current
45
0B
0.02
From 0.001*I3 to 0.8*I3 step 0.0005*I3
This setting determines the current threshold, which will reset the CB Fail timer for SEF-based protection BLOCKED O/C
45
0C
The settings under this sub-heading relate to Blocked Overcurrent settings Remove I> Start
45
0D
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Remove I>Start signal Remove IN> Start
45
0E
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Remove IN>Start signal
13.5
APPLICATION NOTES
13.5.1
RESET MECHANISMS FOR CB FAIL TIMERS
It is common practise to use low set undercurrent elements to indicate that circuit breaker poles have interrupted the fault or load current. This covers the following situations: ● Where circuit breaker auxiliary s are defective, or cannot be relied on to definitely indicate that the breaker has tripped ● Where a circuit breaker has started to open but has become jammed. This may result in continued arcing at the primary s, with an additional arcing resistance in the fault current path. Should this resistance severely limit fault current, the initiating protection element may reset. Therefore, reset of the element may not give a reliable indication that the circuit breaker has opened fully For any protection function requiring current to operate, the device uses operation of undercurrent elements to detect that the necessary circuit breaker poles have tripped and reset the CB fail timers. However, the undercurrent elements may not be reliable methods of resetting CBF in all applications. For example: ● Where non-current operated protection, such as under/overvoltage or under/overfrequency, derives measurements from a line connected voltage transformer. Here, I< only gives a reliable reset method if the protected circuit would always have load current flowing. In this case, detecting drop-off of the initiating protection element might be a more reliable method. ● Where non-current operated protection, such as under/overvoltage or under/overfrequency, derives measurements from a busbar connected voltage transformer. Again using I< would rely upon the feeder normally being loaded. Also, tripping the circuit breaker may not remove the initiating condition from the busbar, and hence drop-off of the protection element may not occur. In such cases, the position of the circuit breaker auxiliary s may give the best reset method.
13.5.2
SETTING GUIDELINES (CB FAIL TIMER)
The following examples consider direct tripping of a 2-cycle circuit breaker. Typical timer settings to use are as follows: CB Fail Reset Mechanism
tBF Time Delay
Typical Delay For 2 Cycle Circuit Breaker
Initiating element reset
CB interrupting time + element reset time (max.) + error in tBF timer + safety margin
50 + 50 + 10 + 50 = 160 ms
CB open
CB auxiliary s opening/ closing time (max.) + error in tBF timer + safety margin
50 + 10 + 50 = 110 ms
Undercurrent elements
CB interrupting time + undercurrent element (max.) + safety margin operating time
50 + 25 + 50 = 125 ms
184
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Note: All CB Fail resetting involves the operation of the undercurrent elements. Where element resetting or CB open resetting is used, the undercurrent time setting should still be used if this proves to be the worst case. Where auxiliary tripping relays are used, an additional 10-15ms must be added to allow for trip relay operation.
13.5.3
SETTING GUIDELINES (UNDERCURRENT)
The phase undercurrent settings (I<) must be set less than load current to ensure that I< operation correctly indicates that the circuit breaker pole is open. A typical setting for overhead line or cable circuits is 20%In. Settings of 5%In are common for generator circuit breaker CBF. The SEF protection and standard earth fault undercurrent elements must be set less than the respective trip setting, typically as follows:
ISEF< = (ISEF> trip)/2 IN< = (IN> trip)/2
P14D-B/G/L/Z-TM-EN-1
185
Chapter 5 - Current Protection Functions
14
P14D
BLOCKED OVERCURRENT PROTECTION
With Blocked Overcurrent schemes, you connect the start s from downstream IEDs to the timer blocking inputs of upstream IEDs. This allows identical current and time settings to be used on each of the IEDs in the scheme, as the device nearest to the fault does not receive a blocking signal and so trips discriminatively. This type of scheme therefore reduces the number of required grading stages, and consequently fault clearance times. The principle of Blocked Overcurrent protection may be extended by setting fast-acting overcurrent elements on the incoming feeders to a substation, which are then arranged to be blocked by start s from the devices protecting the outgoing feeders. The fast-acting element is thus allowed to trip for a fault condition on the busbar, but is stable for external feeder faults due to the blocking signal. This type of scheme provides much reduced fault clearance times for busbar faults than would be the case with conventional time-graded overcurrent protection. The availability of multiple overcurrent and earth fault stages in the Alstom Grid IEDs allows additional time-graded overcurrent protection for back-up purposes.
14.1
BLOCKED OVERCURRENT IMPLEMENTATION
Blocked Overcurrent schemes are implemented using the PSL. The start outputs, available from each stage of the overcurrent and earth fault elements (including the sensitive earth fault element) can be mapped to output relay s. These outputs can then be connected to the relevant timer block inputs of the upstream IEDs via opto-inputs.
BLOCKED OVERCURRENT LOGIC
14.2
To facilitate the implementation of blocked overcurrent schemes, the device provides the following logic to provide a Blocked Overcurrent Start signal I>BlockStart: CB Fail Alarm
&
Remove I> Start
1
Enabled Disabled
I> BlockStart
&
I>1 Start I>2 Start I>3 Start I>4 Start
Key: 1
I>5 Start I>6 Start
External DDB Signal Setting cell Setting value AND gate
&
OR gate
1
V00648
Figure 59: Blocked Overcurrent logic The I>BlockStart signal is derived from the logical OR of the phase overcurrent start outputs. This output is then gated with the CB Fail Alarm DDB signal and the setting Remove I> Start setting.
14.3
BLOCKED EARTH FAULT LOGIC
To facilitate the implementation of blocked overcurrent schemes, the device provides the following logic to provide the Blocked Earth Fault signal IN/ISEF Blk Start:
186
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
CB Fail Alarm
&
Remove IN> Start
1
Enabled Disabled
IN/SEF>Blk Start
&
IN1>1 Start IN1>2 Start IN1>3 Start IN1>4 Start IN2>1 Start IN2>1 Start IN2>3 Start
1
IN2>4 Start
Key:
ISEF>1 Start
External DDB Signal
INSEF>1 Start
Setting cell
INSEF>3 Start
Setting value
INSEF>4 Start
AND gate
&
OR gate
1
V00649
Figure 60: Blocked Earth Fault logic The IN/SEF Blk Start signal is derived from the logical OR of the phase overcurrent start outputs. This output is then gated with the CB Fail Alarm DDB signal and the Remove IN> Start setting.
14.4 Ordinal
BLOCKED OVERCURRENT DDB SIGNALS English Text
Source
Type
Response Function
Description 150
CB Fail Alarm
Software
PSL Input
Alarm latched event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is an alarm indicating CB Failure 295
I>1 Start
Software
This DDB signal is the first stage any-phase Overcurrent start signal 299
I>2 Start
Software
This DDB signal is the second stage any-phase Overcurrent start signal 303
I>3 Start
Software
This DDB signal is the third stage any-phase Overcurrent start signal 307
I>4 Start
Software
This DDB signal is the fourth stage any-phase Overcurrent start signal 315
IN1>1 Start
Software
This DDB signal is the first stage measured Earth Fault start signal 316
IN1>2 Start
Software
This DDB signal is the second stage measured Earth Fault start signal 317
IN1>3 Start
Software
This DDB signal is the third stage measured Earth Fault start signal 318
IN1>4 Start
Software
This DDB signal is the fourth stage measured Earth Fault start signal 319
IN2>1 Start
Software
This DDB signal is the first stage derived Earth Fault start signal
P14D-B/G/L/Z-TM-EN-1
187
Chapter 5 - Current Protection Functions
Ordinal
English Text
P14D
Source
Type
Response Function
Description 320
IN2>2 Start
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the second stage derived Earth Fault start signal 321
IN2>3 Start
Software
This DDB signal is the third stage derived Earth Fault start signal 322
IN2>4 Start
Software
This DDB signal is the fourth stage derived Earth Fault start signal 323
ISEF>1 Start
Software
This DDB signal is the first stage Sensitive Earth Fault start signal 324
ISEF>2 Start
Software
This DDB signal is the second stage Sensitive Earth Fault start signal 325
ISEF>3 Start
Software
This DDB signal is the third stage Sensitive Earth Fault start signal 326
ISEF>4 Start
Software
This DDB signal is the fourth stage Sensitive Earth Fault start signal 348
I> BlockStart
Software
This DDB signal is the start signl for Blocked Overcurrent functionality 349
IN/SEF>Blk Start
Software
This DDB signal is the start signal for Blocked Earth Fault functionality 579
I>5 Start
Software
This DDB signal is the fifth stage three-phase Phase Overcurrent start signal 583
I>6 Start
Software
This DDB signal is the sixth stage three-phase Phase Overcurrent start signal
14.5
BLOCKED OVERCURRENT SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description BLOCKED O/C
45
0C
The settings under this sub-heading relate to Blocked Overcurrent settings Remove I> Start
45
0D
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Remove I>Start signal Remove IN> Start
45
0E
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Remove IN>Start signal
188
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
14.6
APPLICATION NOTES
14.6.1
BUSBAR BLOCKING SCHEME
IED
IED
IED
IED
IED
E00636
Figure 61: Simple busbar blocking scheme
EL00637
Figure 62: Simple busbar blocking scheme characteristics
P14D-B/G/L/Z-TM-EN-1
189
Chapter 5 - Current Protection Functions
15
P14D
SECOND HARMONIC BLOCKING
When a transformer is initially connected to a source of AC voltage, there may be a substantial surge of current through the primary winding called inrush current. This is analogous to the inrush current exhibited by an electric motor that is started up by sudden connection to a power source, although transformer inrush is caused by a different phenomenon. In an ideal transformer, the magnetizing current would rise to approximately twice its normal peak value as well, generating the necessary MMF to create this higher-than-normal flux. However, most transformers are not designed with enough of a margin between normal flux peaks and the saturation limits to avoid saturating in a condition like this, and so the core will almost certainly saturate during this first half-cycle of voltage. During saturation, disproportionate amounts of MMF are needed to generate magnetic flux. This means that winding current, which creates the MMF to cause flux in the core, could rise to a value way in excess of its steady state peak value. Furthermore, if the transformer happens to have some residual magnetism in its core at the moment of connection to the source, the problem could be further exacerbated. We can see that inrush current is a regularly occurring phenomenon and should not be considered a fault, as we do not wish the protection device to issue a trip command whenever a transformer, or machine is switched on. This presents a problem to the protection device, because it should always trip on an internal fault. The problem is that typical internal transformer faults may produce overcurrents which are not necessarily greater than the inrush current. Furthermore faults tend to manifest themselves on switch on, due to the high inrush currents. For this reason, we need to find a mechanism that can distinguish between fault current and inrush current. Fortunately this is possible due to the different natures of the respective currents. An inrush current waveform is rich in harmonics, whereas an internal fault current consists only of the fundamental. We can thus develop a restraining method based on the harmonic content of the inrush current. The mechanism by which this is achieved is called second harmonic blocking.
15.1
SECOND HARMONIC BLOCKING IMPLEMENTATION
Second harmonic blocking can be applied to the following overcurrent protection types: ● ● ● ●
Phase Overcurrent protection (POC) Earth Fault protection (derived and measured) (EF1 and EF2) Sensitive Earth Fault protection (SEF) Negative Phase Sequence Overcurrent protection (NPSOC)
Second harmonic blocking is implemented in the GROUP (n) SYSTEM CONFIG column, where (n) is the number of the setting group. Second harmonic blocking It is applicable to all stages of each of the elements. For POC, 2nd harmonic blocking can be applied to each phase individually (phase segregated), or to all three phases at once (crossblock). The function works by identifying and measuring the inrush currents present at switch on. It does this by comparing the value of the second harmonic current components to the value of the fundamental component. If this ratio exceeds the set thresholds, then the blocking signal is generated. The threshold is defined by the 2ndHarm Thresh setting. We only want the function to block the protection if the fundamental current component is within the normal range. If this exceeds the normal range, then this is indicative of a fault, which must be protected. For this reason there is another settable trigger I> lift 2H, which when exceeded, stops the 2nd harmonic blocking function. Each overcurrent protection element has an I>Blocking setting with which the type of blocking is defined. It is with this setting that phase segregated or 3-phase blocking is chosen. The G14 Data type is used for the I>Blocking setting:
190
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Bit number
I> Blocking function
Bit 0
VTS Blocks I>1
Bit 1
VTS Blocks I>2
Bit 2
VTS Blocks I>3
Bit 3
VTS Blocks I>4
Bit 4
VTS Blocks I>5
Bit 5
VTS Blocks I>6
Bit 6
AR Blocks I>3
Bit 7
AR Blocks I>4
Bit 8
AR Blocks I>6
Bit 9
2H Blocks I>1
Bit 10
2H Blocks I>2
Bit 11
2H Blocks I>3
Bit 12
2H Blocks I>4
Bit 13
2H Blocks I>5
Bit 14
2H Blocks I>6
Bit 15
2H 1PH Block
P14D-B/G/L/Z-TM-EN-1
191
Chapter 5 - Current Protection Functions
15.2
P14D
SECOND HARMONIC BLOCKING LOGIC &
Select fundamental
IA
&
I>Lift 2H
I2H Any Start
1
& &
IA2H Start
Low current (hard-coded) IB2H Start Invert
X
Select 2nd harmonic
IA
IC2H Start
2nd Harm thresh Select fundamental
IB
I>Lift 2H
& Key:
&
Energising Quanitity
Low current (hard-coded)
External DDB Signal Invert
Setting cell
X
Select 2nd harmonic
IB
Function
2nd Harm thresh
Hard-coded setting
Select fundamental
IC
I>Lift 2H
AND gate
&
Multiplier
X
OR gate
1
& & Low current (hard-coded)
Comparator for overvalues
Invert 2nd
Select harmonic
IC
X Comparator for undervalues
2nd Harm thresh
V00626
Figure 63: 2nd Harmonic Blocking Logic
15.3 Ordinal
SECOND HARMONIC DDB SIGNALS English Text
Source
Type
Response Function
Description 538
IA2H Start
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the A-phase 2nd Harmonic start signal 539
IB2H Start
Software
This DDB signal is the B-phase 2nd Harmonic start signal 540
IC2H Start
Software
This DDB signal is the C-phase 2nd Harmonic start signal 541
I2H Any Start
Software
This DDB signal is the 2nd Harmonic start signal for any phase
192
P14D-B/G/L/Z-TM-EN-1
P14D
15.4
Chapter 5 - Current Protection Functions
SECOND HARMONIC SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 SYSTEM CONFIG
30
00
This column contains settings for setting the phase rotation and 2nd harmonic blocking Phase Sequence
30
02
Standard ABC
0=Standard ABC 1=Reverse ACB
This setting sets the phase rotation to standard (ABC) or reverse (ACB). Warning: This will affect the positve and negative sequence quantities calculated by the IED as well as other functions that are dependant on phase quantities. 2NDHARM BLOCKING
30
03
The settings under this sub-heading relate to 2nd harmonic blocking 2nd Harmonic
30
04
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the 2nd Harmonic blocking of the overcurrent protection. 2ndHarm Thresh
30
05
20
From 5% to 70% step 1
This setting sets the lower threshold for 2nd harmonic blocking in percent. If the 2nd harmonic component exceeds this threshold, the overcurrent protection will be blocked. I>lift 2H
30
06
10
From 4A to 32A step 0.01
This setting sets the upper threshold for 2nd harmonic blocking in amps If the 2nd harmonic exceeds this threshold, there wil be no blocking applied.
15.5
APPLICATION NOTES
15.5.1
SETTING GUIDELINES
During the energization period, the second harmonic component of the inrush current may be as high as 70%. The second harmonic level may be different for each phase, which is why phase segregated blocking is available. If the setting is too low, the 2nd harmonic blocking may prevent tripping during some internal transformer faults. If the setting is too high, the blocking may not operate for low levels of inrush current which could result in undesired tripping of the overcurrent element during the energization period. In general, a setting of 15% to 20% is suitable.
P14D-B/G/L/Z-TM-EN-1
193
Chapter 5 - Current Protection Functions
16
P14D
LOAD BLINDERS
Load blinding is a mechanism, whereby IEDs are prevented from tripping under heavy load, but healthy conditions. In the past this mechanism was mainly used for transmission systems and was rarely needed at distribution voltage levels. In the last few years, however, distribution networks have become more subject to periods of sustained heavy loads. This is due to a number of reasons, one of which is the increase of distributed generation. For this reason, it has become very desirable to equip overcurrent IEDs, normally targeted at distribution networks, with load blinding functionality. Load blinders work by measuring, not only the system current levels, but also the system voltage levels and making tripping decisions based on analysis of both of these measurements. This is known as Impedance measurement. When the measured current is higher than normal, this can be caused by one of two things; either a fault or a heavy load. If the cause is a fault, the system voltage level will reduce significantly. However, if the cause is a heavy, but healthy load, the voltage will not decrease significantly. Therefore, by measuring the both the system voltage and currents, the IED can make a decision not to trip under heavy load conditions. The principle of a load blinder is to configure a blinder envelope, which surrounds the expected worst case load limits, and to block tripping for any impedance measured within this blinder region. Only fault impedance outside the load area is allowed to cause a trip. It is possible to set the impedance and angle setting independently for the forward and reverse regions in the Z plane.
Figure 64: Load blinder and angle
16.1
LOAD BLINDER IMPLEMENTATION
The Load blinder function is implemented in the OVERCURRENT column of the relevant settings group, under the sub-heading LOAD BLINDER. The settings allow you to set the impedance and angle limits for both reverse and forward directions, the undervoltage and negative sequence current thresholds for blocking the function, and the operation mode. There are two modes of operation; single phase and three phase; The single phase mode uses the normal impedance (Z) of each phase. When single phase mode is selected, the overcurrent blocking is phase segregated and is dependant on the individual overcurrent settings per phase. In single phase mode, only the undervoltage threshold (Blinder V
194
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
The three phase mode uses positive sequence impedance (Z1). The three phase mode uses both the negative sequence overcurrent threshold (Blinder I2>Block) and the undervoltage threshold (Blinder V
16.2
LOAD BLINDER LOGIC Z1 Angle &
FWD Z Angle
Pick up Cycles
&
Z1 FWD Blinder Drop off Cycles
X
-1
Z1 Magnitude FWD Z Impedance
1
Z1 LoadBlinder
Blinder Mode Forward
1
Both
Z1 Angle REV Z Angle
&
-180°
Pick up Cycles
&
Z1 REV Blinder Drop off Cycles
+180°
Z1 Magnitude REV Z Impedance Blinder Mode Reverse Both
Key: 1
External DDB Signal Setting cell
V1 Blinder V
Blinder Function 3ph(based on Z1)
VTS Slow Block CTS Block V00650
Energising Quanitity
&
Setting value Internal function AND gate
A REV & Blinder OR gate
1
A LoadBlinder Timer Comparator for detecting overvalues A FWD Blinder Comparator for detecting undervalues
B FWD Blinder B REV Blinder B LoadBlinder C FWD Blinder C REV Blinder C LoadBlinder
Figure 65: Load Blinder logic 3phase For the forward direction, the positive sequence impedance magnitude is compared with a set value, and the positive sequence impedance angle is compared with two values, which define the angular range. If the criteria are satisfied and the Blinder mode is in the direction Forward or Both, the blinder signals Z1 FWD Blinder and Z1 LoadBlinder are produced. For the reverse direction, the positive sequence impedance magnitude is compared with a set value, and the positive sequence impedance angle is compared with two values, which define the angular range. If the
P14D-B/G/L/Z-TM-EN-1
195
Chapter 5 - Current Protection Functions
P14D
criteria are satisfied and the Blinder mode is in the direction Forward or Both, the blinder signals Z1 REV Blinder and Z1 LoadBlinder are produced.
Z Angle &
FWD Z Angle
Pick up Cycles
&
A FWD Blinder Drop off Cycles
X
-1
Z1 Magnitude FWD Z Impedance
1
A LoadBlinder
Blinder Mode Forward
1
Both
Z Angle REV Z Angle
&
-180°
Pick up Cycles
&
A REV Blinder Drop off Cycles
+180°
Z Magnitude REV Z Impedance Blinder Mode Reverse Both
Key: 1
External DDB Signal Setting cell
V1 Blinder V
Energising Quanitity
&
Setting value Internal function AND gate
Blinder Status Enabled
Blinder Function 1ph(based on Z)
VTS Slow Block CTS Block V00651
A REV & Blinder OR gate
1
A LoadBlinder Timer Comparator for detecting overvalues A FWD Blinder Comparator for detecting undervalues
B FWD Blinder B REV Blinder B LoadBlinder C FWD Blinder C REV Blinder C LoadBlinder
Figure 66: Load Blinder logic phase A The diagram shows the single-phase Load Blinder logic for phase A. The same principle applies to phases B and C. The single phase Load Blinder logic is very similar to the three-phase Load Blinder logic. The main differences are: The single-phase function does not use positive sequence impedance, it uses normal impedance measurment. It also does not use negative sequence overcurrent to block the function.
196
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
16.3
LOAD BLINDER DDB SIGNALS
Ordinal
English Text
Source
Type
Response Function
Description 351
VTS Slow Block
Software
PSL Input
No response
This DDB signal is a purposely delayed output from the VTS which can block other functions 352
CTS Block
Software
PSL Input
No response
This DDB signal is an instantaneously blocking output from the CTS which can block other functions 627
Blinder Inhibit
Programmable Scheme Logic
PSL Output
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal inhibits the Load Blinder function 628
A FWD Blinder
Software
This DDB signal is the Phase A Load Blinder signal for the forward direction 629
A REV Blinder
Software
This DDB signal is the Phase A Load Blinder signal for the reverse direction 630
A LoadBlinder
Software
This DDB signal is the Phase A Load Blinder signal, either direction 631
B FWD Blinder
Software
This DDB signal is the Phase B Load Blinder signal for the forward direction 632
B REV Blinder
Software
This DDB signal is the Phase B Load Blinder signal for the reverse direction 633
B LoadBlinder
Software
This DDB signal is the Phase B Load Blinder signal, either direction 634
C FWD Blinder
Software
This DDB signal is the Phase C Load Blinder signal for the forward direction 635
C REV Blinder
Software
This DDB signal is the Phase C Load Blinder signal for the reverse direction 636
C LoadBlinder
Software
This DDB signal is the Phase C Load Blinder signal, either direction 637
Z1 FWD Blinder
Software
This DDB signal is the 3-phase Load Blinder signal for the forward direction 638
Z1 REV Blinder
Software
This DDB signal is the 3-phase Load Blinder signal for the reverse direction 639
Z1 LoadBlinder
Software
This DDB signal is the 3-phase Load Blinder signal, either direction
16.4
LOAD BLINDER SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description LOAD BLINDER
35
90
The settings under this sub-heading relate to the Load Blinder function Blinder Status
35
91
Disabled
0 = Disabled, 1 = Enabled
This setting enables or disables the Load Blinder blocking function. Blinder Status
35
P14D-B/G/L/Z-TM-EN-1
91
Disabled
0 = Disabled
197
Chapter 5 - Current Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting disables the Load Blinder blocking function for models B and G Blinder Function
35
92
3Ph(based on Z1)
0=3Ph(based on Z1) 1=1Ph(based on Z)
This setting sets the Load Blinder to three-phase or single-phase blocking. Blinder Mode
35
93
Both
0=Reverse 1=Forward 2=Both
This setting sets the Load Blinder direction measurement. FWD Z Impedance
35
94
15
From 0.1 to 500 step 0.01
This setting sets the Forward Impedance (in ohms) for the Load Blinder function. FWD Z Angle
35
95
30
From 5 to 85 step 1
This setting sets the Forward Angle (in degrees) for the Looad Blinder function. RVS Z Impedance
35
97
15
From 0.1 to 500 step 0.01
This setting sets the Reverse Impedance (in ohms) for the Load Blinder function. RVS Z Angle
35
98
30
From 5 to 85 step 1
This setting sets the Reverse Angle (in degrees) for the Looad Blinder function. Blinder V< Block
35
9A
15
From 10 to 120 step 1
This setting sets the undervoltage threshold for the Load Blinder function. Blinder I2>Block
35
9B
0.2
From 0.08*I1 to 4*I1 step 0.01*I1
This setting sets the Negative Phase Sequence current threshold for the Load Blinder function. PU Cycles
35
9C
1
From 0 to 50 step 0.5
This setting sets the pick-up count threshold for the Load Blinder function. DO Cycles
35
9D
1
From 0 to 50 step 0.5
This setting sets the drop-off count threshold for the Load Blinder function.
198
P14D-B/G/L/Z-TM-EN-1
P14D
17
Chapter 5 - Current Protection Functions
HIGH IMPEDANCE FAULT DETECTION
A High Impedance Fault, also known as a Downed Conductor, happens when a primary conductor makes unwanted electrical with a road surface, pathway, tree etc., whereby due to the high impedance of the fault path, the fault current is restricted to a level below that which can be reliably detected by standard overcurrent devices. Even in cases where the instantaneous fault current may exceed the thresholds, the duration of this transient is usually so small that the standard overcurrent IED will not pick up. It is quite a challenging problem to detect such faults, and it requires a special method combining multiple techniques. Due to the high impedance and transient nature of such faults it is not possible to derive the fault calculation from short-circuit computing. HIF detection therefore relies on the detection of the fault current and voltage waveform signatures. These waveforms may be very different from fault to fault, but they often have commonalities typified by: ● Third harmonic content ● The transient bursting (intermittent change of amplitude) We can use these phenomena to detect the fault. We may need to establish the direction of the fault. For this, we can use instantaneous power measurement. Hence we can see there are three components necessary to provide a reliable HIF detection function: ● Component harmonic Analysis (CHA) ● Fundamental Analysis (FA) (with or without directional analysis (DIR)
17.1
HIGH IMPEDANCE FAULT PROTECTION IMPLEMENTATION
17.1.1
FUNDAMENTAL ANALYSIS
Fundamental Analysis (FA) captures the intermittent characteristics associated with a fault current. Generally, the system current is fairly stable and it tracks the load conditions. An average of this current is calculated by continually averaging the latest samples, and this value is stored in a buffer. This value is being continually compared with latest current value. If there is a sudden increase in current, its value will significantly exceed the average value. It is this increment that is used to start the fault evaluation process. The averaged current load tracks system load conditions using an averaging process. A discrepancy between the actual amplitude and the average amplitude starts the fault evaluation process. If the increment is greater than a start threshold, determined by the setting FA> Start Thresh, the FA will start fault evaluation. A Burst Valid (BV) threshold, determined by the setting FA> Burst Thresh, is used to judge whether the increment indicates conduction of fault current. By counting the changes of the BV states within a time window, an event is issued and it is possible to establish whether an intermittent fault has been detected. FA detection can be triggered by any sudden increase of the amplitude. However, only those sustained series of changes within a specified time-window can be evaluated as a High Impedance Fault (HIF). Fault classification criteria can be determined using timing and counting of these bursts. The following table shows the classification criteria. Counter Status
Timer Status
Result
BV state changes exceed count limit
Within time window of one FA section
HIF
BV stage changes do not exceed count limit, but are more than two
Within time window of one FA section
Transient Event
Less than two changes
While fundamental amplitude remains above BV threshold within time window
Steady Event
Others
P14D-B/G/L/Z-TM-EN-1
Noises
199
Chapter 5 - Current Protection Functions
17.1.2
P14D
COMPONENT HARMONIC ANALYSIS
The Component Harmonic Analysis (CHA) function monitors the measured SEF current, compares this with the average current value and uses the increment of the sampled value to extract the 3rd harmonic component. By evaluating the phase and amplitude differences between the fundamental and the third harmonic, it is possible to establish criteria, which can help determine the presence of a High Impedance Fault. Note: CHA is ONLY applicable in directly grounded or lower to medium resistance grounded systems.
An array of increment samples is obtained and used to calculate the fault characteristic. A so called Satisfied State (SS) is a value that meets the criteria to indicate HIF non-linearity. Fault evaluation and classification are mainly based on measuring the duration of the Satisfied State. The fault evaluation process can be triggered internally or externally. The criteria determining non-linearities characteristic of high impedance faults consists of the following: ● The fundamental amplitude is above a set threshold (setting CHA> Fund Thresh) ● The phase difference between 3rd harmonic and fundamental is within a range around 180° (settings CHA Del Ang180-x and CHA Del Ang180+x) ● The amplitude ratio between 3rd harmonic and fundamental is above a set threshold (setting CHA> 3rdharmThrsh) and not above 90% of the fundamental. ● The above requirements last for a significant time duration. The CHA function detects a fault by timing the duration of the Satisfied State (SS). If this time duration is longer than the HIF Setting time, a HIF event is reported. If the time duration is shorter, but still longer than a Transient Setting time, a Transient event is reported. Harmonic State
SS Timer Status
Result
Persisting Satisfied State
Lasts for HIF duration setting (CHA tDuration)
HIF established
Intermittent Satisfied State
Lasts for transient setting time (CHA tTransient)
Transient Event established
Others
Noises
Similar to Fundamental Analysis, a Transient Event needs further confirmation. Three individual timers are activated once the CHA function starts. ● A reset timer is used to reset all the procedures of CHA. ● A HIF duration timer is used to measure the duration of this Satisfied State to issue HIF. ● A Transient timer is used to detect any transient event: If the Satisfied State lasts for the entire time duration set by the HIF timer, an HIF is reported and all procedures are reset. If the Satisfied State lasts for less then the HIF duration but is still more than the Transient time duration, a Transient Suspicion event is reported and the detection process will evaluate another section. If any HIF requirement is satisfied within the reset time, a HIF is reported and the detection is reset. If there are more than three Transient Suspicion events reported within the reset time, a HIF is reported.
17.1.3
DIRECTIONAL ANALYSIS
The described FA algorithm has no capability of detecting direction. It can be used in a system with limited capacitance, or a system with directly grounded neutral point. In these cases, the fault current on healthy lines are limited. However, when a system is resistance-grounded with a relatively large distributed
200
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
capacitance, the fault-generated transient may be distributed along both healthy and faulted lines due to the large distributed capacitance. Therefore, a directional element is needed to enhance the FA performance. Transient directionality is obtained by using the instantaneous power direction of the fault component. The instantaneous power is calculated directly from the samples of the fault component. In Transient situations, this is a more accurate method than using phasor based power calculations . The fault component circuit is used for analysis. The source is the fault itself. The capacitive branch produces the reactive power while the inductance branch absorbs the reactive power. The resistance branch absorbs the active power. The active power is from the source. The reactive power from the source balances the total consumption of the reactive power by the other part of the circuit. Resistor in Neutral
Peterson Coil in Neutral
Isolated
Faulty Line
Healthy Line
Faulty Line
Healthy Line
Faulty Line
Healthy Line
P
Rev
Fwd
Rev
Fwd
Rev
Fwd
Q
Fwd
Rev
-
-
Fwd
Rev
Generally, the reactive power is more distinctive, since the distributed capacitance is often greater than the distributed conductance. Therefore, in resistance-grounded or isolated systems, the reactive power direction is used for transient direction detection. In Peterson coil grounded systems, the active power direction is used to detect the direction because the Peterson coil distorts the reactive power flow. The output of the direction detection function (DIR) are flags indicating the fault direction: FA DIR Forward and FA DIR Reverse. These flags are set if the algorithm is in the Start stage and the criteria have been met. The FA function uses the flag status to determine whether it is a forward fault or a reverse fault. An alarm can also be set to indicate the faulted line. When counting a spike into the FA function's counter, the FA first refers to the direction flag. Only spikes with forward direction (Forward transient) are counted for fault evaluation.
17.1.4
SUMMARY
The type of High Impedance Fault detection solution should be selected according to the different system grounding conditions. The solution consists of two major algorithms and a facility algorithm that forms a matrix to cover these different conditions. CHA detects situations where there is a continuous earth fault harmonic. CHA should only be used for directly grounded or low resistance grounded system. FA detects intermittent faults where the fault current is changing between conducting and non-conducting. This can be used in any system grounding conditions. However, a continuous fault will only be detected as a steady event. The solution matrix is as follows: Solid
Resistor
Peterson Coil
Isolated
FA+DIR(Active P)
Applicable
Applicable
Recommended
Applicable
FA+DIR(Reactive Q)
Applicable
Recommended
Not applicable
Recommended
FA (non DIR)
Recommended
Not applicable
Not applicable
Not applicable
CHA
Recommended
Recommended
Not applicable
Not applicable
Recommended Solution
CHA+FA
CHA+FA+DIR(Q)
FA+DIR(P)
FA+DIR(Q)
P14D-B/G/L/Z-TM-EN-1
201
Chapter 5 - Current Protection Functions
17.2
P14D
HIGH IMPEDANCE FAULT PROTECTION LOGIC VN (derived) Directionaliser ISEF Average Amplitude
FA Decision
Increment Amplitude
FA Analysis
Transient Fault
FA Transient
Steady Fault
FA Steady Fault
HIF
FA HIF
Average Sample Array
1
CHA Decision Increment Amplitude
HIF
CHA HIF
Transient Fault
CHA Transient
CHA Analysis
HIF tPREPARE
HIF Alarm
HIF SEF AnyStart FA Settings CHA Settings HIF Forced Reset
Reset buffers
HIF Function
Key: Energising Quanitity
OR gate
1
External DDB Signal Setting cell Internal function
V00653
Figure 67: HIF Protection Logic
17.3 Ordinal
HIGH IMPEDANCE PROTECTION DDB SIGNALS Signal Name
Source
Type
Response
Description 1209
HIF Alarm
Software
PSL Input
Alarm latched event
PSL Input
Protection event
This DDB signal indicates that the High Impedance Fault Alarm is active 1210
FA HIF
Software
This DDB signal indicates that Fundamental Analysis has detected a high impedance fault 1211
FA Transient
Software
PSL Input
Protection event
This DDB signal indicates that Fundamental Analysis has detected a Transient Event 1212
FA Steady Fault
Software
PSL Input
Protection event
This DDB signal indicates that Fundamental Analysis has detected a steady state Fault 1213
CHA HIF
Software
PSL Input
Protection event
This DDB signal indicates that Component Harmonic Analysis has detected a high impedance fault 1214
CHA Transient
Software
PSL Input
Protection event
This DDB signal indicates that Component Harmonic Analysis has detected a Transient Event
202
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Ordinal
Signal Name
Source
Type
Response
Description 1216
HIF Forced Reset
Programmable Scheme Logic
PSL Output
No response
This DDB signal forces a HIF Reset
17.4
HIGH IMPEDANCE PROTECTION SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 HIF DETECTION
4C
00
This column contains settings for High Impedance Fault Detection HIF SEF AnyStart
4C
01
Disabled
0 = Disabled or 1 = Enabled
2
From 0.03s to 30s step 0.01s
This setting allows the ISEF> Any Start DDB signal to trigger the HIF detection HIF tPREPARE
4C
02
This setting sets the preparation time required to produce the initial data, such as the average amplitude value. FUNDAMENT.ANALYS
4C
05
This sub-heading contains settings for the Fundamental Analysis (FA) algorithm. FA Status
4C
06
Enabled
0 = Disabled or 1 = Enabled
07
0.01
From 0.00025A to 2A step 0.00025A
This setting enables or disables Fundamental Analysis. FA> Start Thresh
4C
This setting defines the Fundamental Analysis increment Start threshold. The FA algorithm starts the evaluation process when the current increments exceeds this threshold. AdaptBurstThresh
4C
08
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Adaptive Burst Threshold setting. When enabled, the Burst Threshold is adapted automatically. FA> Burst Thresh
4C
09
0.05
From 0.00025A to 2A step 0.00025A
This setting defines the Burst Valid threshold. When the measured current amplitude exceeds this threshold, a valid burst is recognised. FA tAVERAGE
4C
0A
10
From 1s to 60s step 1s
2
From 0.5s to 5s step 0.5s
This setting defines the time duration window for calculating the average value. FA tINTERMITTENT
4C
0B
This setting defines the time duration in which the Burst Valid shots are counted for a HIF to be recognised. FA tRESET
4C
0C
10
From 10s to 60s step 5s
8
From 3 to 30 step 1
This setting defines the reset time for the FA evaluation process. FA> Burst Count
4C
0D
This setting sets the number of burst valid shots which is used to determine a HIF condition. FA Trans Sec Lmt
4C
0E
3
From 1 to 10 step 1
This setting sets the number of sections which are evaluated for determining a FA transient event. FA DIR Status
4C
10
Disabled
0 = Disabled or 1 = Enabled
11
Reactive Q
0=Active P 1=Reactive Q
This setting enables or disables FA Direction Detection. FA DIR P or Q
4C
This setting determines whether real power (P) or reactive power (Q) is to be used for detection. FA DIR>Power Fwd
4C
12
1
From 0.05 watts to 100 watts in steps of 0.05 watts
This setting defines the power value threshold for a forward event.
P14D-B/G/L/Z-TM-EN-1
203
Chapter 5 - Current Protection Functions
Menu Text
P14D
Col
Row
Default Setting
Available Options
Description FA DIR>Power Rev
4C
13
-1
From -100 watts to -0.05 watts in steps of 0.05 watts
Enabled
0 = Disabled or 1 = Enabled
This setting defines the power value threshold for a reverse event. FA DIR AutoThrsh
4C
14
This setting enables or disables the auto-adjust power threshold. COMP.HARM.ANALYS
4C
20
This sub-heading contains settings for the Component Harmonic Analysis (CHA) algorithm. CHA Status
4C
21
Enabled
0 = Disabled or 1 = Enabled
22
0.01
From 0.00025A to 2A step 0.00025A
23
2
From 0.5% to 70% step 0.5%
85
From 0deg to 90deg step 1deg
This setting enables or disables CHA. CHA> Fund Thresh
4C
This setting defines the CHA amplitude threshold. CHA>3rdHarmThrsh
4C
This setting defines the amplitude ratio (3Harmonic to fundamental). CHA Del Ang180-x
4C
24
This setting sets the lower angle boundary of the phase angle between third harmonic and fundamental. CHA Del Ang180+x
4C
25
0
From 0deg to 90deg step 1deg
This setting sets the upper angle boundary of the phase angle between third harmonic and fundamental. CHA tAVERAGE
4C
26
20
From 5s to 60s step 1s
0.2
From 0.04s to 1s step 0.02s
2
From 1s to 5s step 1s
10
From 10s to 30s step 5s
3
From 1 to 10 step 1
This setting defines the time duration window for calculating the average value. CHA tTRANSIENT
4C
27
This setting defines the time duration for determining a transient event CHA tDURATION
4C
28
This setting defines the time duration for determining a HIF condition. CHA tRESET
4C
29
This setting defines the reset time for the CHA evaluation process. CHA Trans SecLmt
4C
2A
This setting sets the number of sections which are evaluated for determining a CHA transient event.
204
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
18
CURRENT TRANSFORMER REQUIREMENTS
The current transformer requirements are based on a maximum fault current of 50 times the rated current (In) with the device having an instantaneous overcurrent setting of 25 times the rated current. The current transformer requirements are designed to provide operation of all protection elements. Where the criteria for a specific application are in excess of this, or the lead resistance exceeds the limiting lead resistance shown in the following table, the CT requirements may need to be modified according to the formulae in the subsequent sections: Nominal Output
Nominal Rating
Accuracy Class
Accuracy Limited Factor
Limiting Lead Resistance
1A
2.5VA
10P
20
1.3 ohms
5A
7.5VA
10P
20
0.11 ohms
The formula subscripts used in the subsequent sections are as follows: VK = Required CT knee-point voltage (volts) f = Maximum through-fault current level (amps) fn = Maximum prospective secondary earth fault current (amps) fp = Maximum prospective secondary phase fault current (amps) cn = Maximum prospective secondary earth fault current or 31 times > setting (whichever is lower) (amps) = Maximum prospective secondary phase fault current or 31 times > setting (whichever is lower) (amps) n = Rated secondary current (amps) sn = Stage 2 & 3 earth fault setting (amps) sp = Stage 2 and 3 setting (amps) RCT = Resistance of current transformer secondary winding (ohms) RL = Resistance of a single lead from relay to current transformer (ohms) Rp = Impedance of the phase current input at 30n (ohms) Rn = Impedance of the neutral current input at 30n (ohms) Rst = Value of stabilising resistor for REF applications (ohms) s = Current setting of REF elements (amps)
18.1
OVERCURRENT AND EARTH FAULT PROTECTION
18.1.1
DIRECTIONAL ELEMENTS
Time-delayed phase overcurrent elements
VK =
I 2
( RCT + RL + R p )
P14D-B/G/L/Z-TM-EN-1
205
Chapter 5 - Current Protection Functions
P14D
Instantaneous phase overcurrent elements
VK =
I
fp
2
( RCT + RL + R p )
Instantaneous earth fault overcurrent elements
VK = 18.1.2
I
fn
2
( RCT + 2 RL + R p + Rn)
NON-DIRECTIONAL ELEMENTS
Time-delayed phase overcurrent elements
VK =
I 2
( RCT + RL + R p )
Time-delayed earth fault overcurrent elements
VK =
I cn ( RCT + 2 RL + R p + Rn ) 2
Instantaneous phase overcurrent elements
VK = I sp ( RCT + RL + R p ) Instantaneous earth fault overcurrent elements
VK = I sn ( RCT + 2 RL + R p + Rn ) 18.2
SEF PROTECTION (RESIDUALLY CONNECTED)
18.2.1
DIRECTIONAL ELEMENTS
Time delayed SEF protection
VK ≥
I cn ( RCT + 2 RL + R p + Rn) 2
Instantaneous SEF protection
VK ≥ 18.2.2
I
fn
2
( RCT + 2 RL + R p + Rn)
NON-DIRECTIONAL ELEMENTS
Time delayed SEF protection
VK ≥
206
I cn ( RCT + 2 RL + R p + Rn) 2
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 5 - Current Protection Functions
Instantaneous SEF protection
VK ≥
I sn ( RCT + 2 RL + R p + Rn) 2
18.3
SEF PROTECTION (CORE-BALANCED CT)
18.3.1
DIRECTIONAL ELEMENTS
Instantaneous element
VK ≥
I
fn
2
( RCT + 2 RL + Rn)
Note: Ensure that the phase error of the applied core balance current transformer is less than 90 minutes at 10% of rated current and less than 150 minutes at 1% of rated current.
18.3.2
NON-DIRECTIONAL ELEMENTS
Time delayed element
VK ≥
I cn ( RCT + 2 RL + Rn) 2
Instantaneous element
VK ≥ I sn ( RCT + 2 RL + Rn) Note: Ensure that the phase error of the applied core balance current transformer is less than 90 minutes at 10% of rated current and less than 150 minutes at 1% of rated current.
18.4
LOW IMPEDANCE REF PROTECTION
For X/R < 40 and f < 15n
VK ≥ 24 I n ( RCT + 2 RL ) For 40 < X/R < 120 and 15n < If < 40n
VK ≥ 48 I n ( RCT + 2 RL )
P14D-B/G/L/Z-TM-EN-1
207
Chapter 5 - Current Protection Functions
P14D
Note: Class x or Class 5P CTs should be used for low impedance REF applications.
18.5
HIGH IMPEDANCE REF PROTECTION
The high impedance REF element will maintain stability for through-faults and operate in less than 40ms for internal faults, provided the following equations are met:
Rst =
I f ( RCT + 2 RL ) Is
VK ≥ 4 I s Rst Note: Class x CTs should be used for high impedance REF applications.
18.6
USE OF ANSI C-CLASS CTS
Where American/IEEE standards are used to specify CTs, the C class voltage rating can be used to determine the equivalent knee point voltage according to IEC. The equivalence formula is:
VK = 1.05(C rating in volts ) + 100 RCT
208
P14D-B/G/L/Z-TM-EN-1
VOLTAGE & FREQUENCY PROTECTION FUNCTIONS CHAPTER 6
Chapter 6 - Voltage & Frequency Protection Functions
210
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 6 - Voltage & Frequency Protection Functions
CHAPTER OVERVIEW
The P14D provides a wide range of voltage and frequency protection functions. This chapter describes the operation of these functions including the principles, logic diagrams and applications. This chapter contains the following sections: Chapter Overview Undervoltage Protection Overvoltage Protection Rate of Change of Voltage Protection Residual Overvoltage Protection Negative Sequence Overvoltage Protection Frequency Protection Overview Underfrequency Protection Overfrequency Protection Independent R.O.C.O.F Protection Frequency-supervised R.O.C.O.F Protection Average Rate of Change of Frequency Protection Load Shedding and Restoration Frequency Protection DDB signals Frequency Protection Settings Frequency Statistics
211 212 218 223 229 234 236 237 239 241 244 247 250 255 260 273
P14D-B/G/L/Z-TM-EN-1
211
Chapter 6 - Voltage & Frequency Protection Functions
2
P14D
UNDERVOLTAGE PROTECTION
Undervoltage conditions may occur on a power system for a variety of reasons, some of which are outlined below: ● Undervoltage conditions can be related to increased loads, whereby the supply voltage will decrease in magnitude. This situation would normally be rectified by voltage regulating equipment such as AVRs (Auto Voltage Regulators) or On Load Tap Changers. However, failure of this equipment to bring the system voltage back within permitted limits leaves the system with an undervoltage condition, which must be cleared. ● If the regulating equipment is unsuccessful in restoring healthy system voltage, however, then tripping by means of an undervoltage element is required. ● Faults occurring on the power system result in a reduction in voltage of the faulty phases. The proportion by which the voltage decreases is dependent on the type of fault, method of system earthing and its location. Consequently, co-ordination with other voltage and current-based protection devices is essential in order to achieve correct discrimination. ● Complete loss of busbar voltage. This may occur due to fault conditions present on the incomer or busbar itself, resulting in total isolation of the incoming power supply. For this condition, it may be necessary to isolate each of the outgoing circuits, such that when supply voltage is restored, the load is not connected. Therefore, the automatic tripping of a feeder on detection of complete loss of voltage may be required. This can be achieved by a three-phase undervoltage element. ● Where outgoing feeders from a busbar are supplying induction motor loads, excessive dips in the supply may cause the connected motors to stall, and should be tripped for voltage reductions that last longer than a pre-determined time.
UNDERVOLTAGE PROTECTION IMPLEMENTATION
2.1
Undervoltage Protection is implemented in the VOLT PROTECTION column of the relevant settings group. The Undervoltage parameters are contained within the sub-heading UNDERVOLTAGE. The product provides three stages of Undervoltage protection with independent time delay characteristics. Stages 1 and 3 provide a choice of operate characteristics, where you can select between: ● An IDMT characteristic ● DT (Definite Time) You set this using the V<1 Function and V<3 Function cells depending on the stage. The IDMT characteristic is defined by the following formula:
t = K/( M-1) where: ● K = Time multiplier setting ● t = Operating time in seconds ● M = Measured voltage / IED setting voltage (V< Voltage Set) The undervoltage stages can be configured either as phase-to-neutral or phase-to-phase voltages in the V< Measure't mode cell. There is no Timer Hold facility for Undervoltage. Stage 2 can have definite time characteristics only. This is set in the V<2 status cell. Three stages are included in order to provide multiple output types, such as alarm and trip stages. Alternatively, different time settings may be required depending upon the severity of the voltage dip. For example, motor loads will be able to cope with a small voltage dip for a longer time than a major one.
212
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Outputs are available for single or three-phase conditions via the V
2.2
UNDERVOLTAGE PROTECTION LOGIC V< Measure’t Mode
V<(n) Start A/AB
VA VAB
IDMT/DT
&
V<(n) Voltage Set
&
V<(n) Trip A/AB
V< Measure’t Mode
V<(n) Start B/BC
VB VBC
IDMT/DT
&
V<(n) Voltage Set
&
V<(n) Trip B/BC
V< Measure’t Mode
V<(n) Start C/CA
VC VCA
IDMT/DT
&
V<(n) Voltage Set All Poles Dead V<(n) Poledead Inh
&
V<(n) Trip C/CA
&
Enabled
VTS Fast Block
1
&
&
&
1
&
V<(n) Timer Block &
V< Operate mode
1
V<(n) Start
1
V<(n) Trip
&
Any Phase Three Phase
Key: Energising Quanitity
AND gate
&
OR gate
1
External DDB Signal Setting cell Setting value Switch Comparator for undervalues V00803
Figure 68: Undervoltage - single and three phase tripping mode (single stage) The Undervoltage protection function detects when the voltage magnitude for a certain stage falls short of a set threshold. If this happens a Start signal, signifying the "Start of protection", is produced. This Start signal can be blocked by the VTS Fast Block signal and an All Poles Dead signal. This Start signal is applied to the timer module to produce the Trip signal, which can be blocked by the undervoltage timer block signal (V<(n) Timer Block). For each stage, there are three Phase undervoltage detection modules, one for each phase. The three Start signals from each of these phases are OR'd together to create a 3-phase Start signal (V<(n) Start), which can be be activated when any of the three phases start (Any Phase), or when all three phases start (Three Phase), depending on the chosen V
P14D-B/G/L/Z-TM-EN-1
213
Chapter 6 - Voltage & Frequency Protection Functions
P14D
In some cases, we do not want the undervoltage element to trip; for example, when the protected feeder is de-energised, or the circuit breaker is opened, an undervoltage condition would obviously be detected, but we would not want to start protection. To cater for this, an "All Poles Dead" signal is blocks the Start signal for each phase. This is controlled by the V
2.3 Ordinal
UNDERVOLTAGE DDB SIGNALS Signal Name
Source
Type
Response
Description 222
V<1 Timer Block
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal blocks the first stage Phase Undervoltage time delay 223
V<2 Timer Block
Programmable Scheme Logic
This DDB signal blocks the second stage Phase Undervoltage time delay 278
V<1 Trip
Software
This DDB signal is the first stage three-phase or any-phase Undervoltage trip signal 279
V<1 Trip A/AB
Software
This DDB signal is the first stage A-phase Undervoltage trip signal 280
V<1 Trip B/BC
Software
This DDB signal is the first stage B-phase Undervoltage trip signal 281
V<1 Trip C/CA
Software
This DDB signal is the first stage C-phase Undervoltage trip signal 282
V<2 Trip
Software
This DDB signal is the second stage three-phase or any-phase Undervoltage trip signal 283
V<2 Trip A/AB
Software
This DDB signal is the second stage A-phase Undervoltage trip signal 284
V<2 Trip B/BC
Software
This DDB signal is the second stage B-phase Undervoltage trip signal 285
V<2 Trip C/CA
Software
This DDB signal is the second stage C-phase Undervoltage trip signal 331
V<1 Start
Software
This DDB signal is the first stage three-phase or any-phase Undervoltage start signal 332
V<1 Start A/AB
Software
This DDB signal is the first stage A-phase Phase Undervoltage start signal 333
V<1 Start B/BC
Software
This DDB signal is the first stage B-phase Phase Undervoltage start signal 334
V<1 Start C/CA
Software
This DDB signal is the first stage C-phase Phase Undervoltage start signal 335
V<2 Start
Software
This DDB signal is the second stage three-phase or any-phase Undervoltage start signal 336
V<2 Start A/AB
Software
This DDB signal is the second stage A-phase Phase Undervoltage start signal 337
V<2 Start B/BC
Software
This DDB signal is the second stage B-phase Phase Undervoltage start signal
214
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Ordinal
Signal Name
Source
Type
Response
Description 338
V<2 Start C/CA
Software
PSL Input
Protection event
PSL Input
No response
This DDB signal is the second stage C-phase Phase Undervoltage start signal 350
VTS Fast Block
Software
This DDB signal is an instantaneously blocking output from the VTS which can block other functions 380
All Poles Dead
Software
PSL Input
No response
PSL Input
Protection event
This DDB signal indicates that all poles are dead (not all models) 608
V<3 Start
Software
This DDB signal is the third stage three-phase or any-phase Phase Undervoltage start signal 609
V<3 Start A/AB
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the third stage A-phase Phase Undervoltage start signal 610
V<3 Start B/BC
Software
This DDB signal is the third stage B-phase Phase Undervoltage start signal 611
V<3 Start C/CA
Software
This DDB signal is the third stage C-phase Phase Undervoltage start signal 612
V<3 Trip
Software
This DDB signal is the first stage three-phase or any-phase Phase Undervoltage trip signal 613
V<3 Trip A/AB
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Output
No response
This DDB signal is the first stage A-phase Phase Undervoltage trip signal 614
V<3 Trip B/BC
Software
This DDB signal is the first stage B-phase Phase Undervoltage trip signal 615
V<3 Trip C/CA
Software
This DDB signal is the first stage C-phase Phase Undervoltage trip signal 624
V<3 Timer Block
Programmable Scheme Logic
This DDB signal blocks the third stage Phase Undervoltage time delay
2.4
UNDERVOLTAGE SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 VOLT PROTECTION
42
00
This column contains settings for Voltage protection UNDER VOLTAGE
42
01
The settings under this sub-heading relate to Undervoltage V< Measur't Mode
42
02
Phase-Phase
0=Phase-Phase 1=Phase-Neutral
This set determines the voltage input mode - phase-to-phase or phase-to-neutral. V< Operate Mode
42
03
Any Phase
0=Any Phase 1=Three Phase
This setting determines whether any one of the phases or all three of the phases has to satisfy the undervoltage criteria before a decision is made.
P14D-B/G/L/Z-TM-EN-1
215
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
P14D
Available Options
Description
V<1 Function
42
04
DT
0 = Disabled, 1 = DT, 2 = IDMT, 3= Curve 1, 4= Curve 2, 5= Curve 3, 6= Curve 4
This setting determines the tripping characteristic for the first stage undervoltage element. V<1 Voltage Set
42
05
80
From 10*V1 to 120*V1 step 1*V1
This setting sets the pick-up threshold for the first stage undervoltage element. V<1 Time Delay
42
06
10
From 0s to 100s step 0.01s
This setting sets the DT time delay for the first stage undervoltage element. V<1 TMS
42
07
1
From 0.5 to 100 step 0.5
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. V<1 Poledead Inh
42
08
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Pole Dead inhibit logic (not all models) V<2 Status
42
09
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage undervoltage element. There is no choice of curves because this stage is DT only. V<2 Voltage Set
42
0A
60
From 10*V1 to 120*V1 step 1*V1
This setting sets the pick-up threshold for the second stage undervoltage element. V<2 Time Delay
42
0B
5
From 0s to 100s step 0.01s
This setting sets the DT time delay for the second stage undervoltage element. V<2 Poledead Inh
42
0C
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the Pole Dead inhibit logic.
V<3 Function
42
0D
0 = Disabled, 1 = DT, 2 = IDMT, 3= Curve 1, 4= Curve 2, 5= Curve 3, 6= Curve 4
This setting determines the tripping characteristic for the third stage undervoltage element. V<3 Voltage Set
42
0E
From 10*V1 to 120*V1 step 1*V1
This setting sets the pick-up threshold for the third stage undervoltage element. V<3 Time Delay
42
0F
From 0s to 100s step 0.01s
This setting sets the DT time delay for the third stage undervoltage element. V<3 TMS
42
10
From 0.5 to 100 step 0.5
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. V<3 Poledead Inh
42
11
0 = Disabled or 1 = Enabled
This setting enables or disables the Pole Dead inhibit logic.
216
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
2.5
APPLICATION NOTES
2.5.1
UNDERVOLTAGE SETING GUIDELINES
In most applications, undervoltage protection is not required to operate during system earth fault conditions. If this is the case you should select phase-to-phase voltage measurement, as this quantity is less affected by single-phase voltage dips due to earth faults. The voltage threshold setting for the undervoltage protection should be set at some value below the voltage excursions that may be expected under normal system operating conditions. This threshold is dependent on the system in question but typical healthy system voltage excursions may be in the order of 10% of nominal value. The same applies to the time setting. The required time delay is dependent on the time for which the system is able to withstand a reduced voltage. If motor loads are connected, then a typical time setting may be in the order of 0.5 seconds.
P14D-B/G/L/Z-TM-EN-1
217
Chapter 6 - Voltage & Frequency Protection Functions
3
P14D
OVERVOLTAGE PROTECTION
Overvoltage conditions are generally related to loss of load conditions, whereby the supply voltage increases in magnitude. This situation would normally be rectified by voltage regulating equipment such as AVRs (Auto Voltage Regulators) or On Load Tap Changers. However, failure of this equipment to bring the system voltage back within permitted limits leaves the system with an overvoltage condition which must be cleared. Note: During earth fault conditions on a power system there may be an increase in the healthy phase voltages. Ideally, the system should be designed to withstand such overvoltages for a defined period of time.
3.1
OVERVOLTAGE PROTECTION IMPLEMENTATION
Overvoltage Protection is implemented in the VOLT PROTECTION column of the relevant settings group. The Overvoltage parameters are contained within the sub-heading OVERVOLTAGE. The product provides three stages of overvoltage protection with independent time delay characteristics. Stages 1 and 3 provide a choice of operate characteristics, where you can select between: ● An IDMT characteristic ● DT (Definite Time) You set this using the V>1 Function and V>3 Function cells depending on the stage. The IDMT characteristic is defined by the following formula:
t = K/( M - 1) where: ● K = Time multiplier setting ● t = Operating time in seconds ● M = Measured voltage setting voltage (V> Voltage Set) The overvoltage stages can be configured either as phase-to-neutral or phase-to-phase voltages in the V> Measure't mode cell. There is no Timer Hold facility for Overvoltage. Stage 2 can have definite time characteristics only. This is set in the V>2 status cell. Three stages are included in order to provide multiple output types, such as alarm and trip stages. Alternatively, different time settings may be required depending upon the severity of the voltage increase. Outputs are available for single or three-phase conditions via the V>Operate Mode cell for each stage.
218
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
3.2
OVERVOLTAGE PROTECTION LOGIC V> Measure’t Mode
V>(n) Start A/AB
VA VAB
IDMT/DT
V>(n) Voltage Set
&
&
V>(n) Trip A/AB
V> Measure’t Mode
V>(n) Start B/BC
VB VBC
IDMT/DT
V>(n) Voltage Set
&
&
V>(n) Trip B/BC
V> Measure’t Mode
V>(n) Start C/CA
VC VCA
IDMT/DT
V>(n) Voltage Set
&
&
V>(n) Trip C/CA
VTS Fast Block
1
&
&
&
1
&
V>(n) Timer Block &
V> Operate mode
1
V>(n) Start
1
V>(n) Trip
&
Any Phase Three Phase
Key: Energising Quanitity
AND gate
&
OR gate
1
External DDB Signal Setting cell Setting value Switch Comparator for overvalues V00804
Figure 69: Overvoltage - single and three phase tripping mode (single stage) The Overvoltage protection function detects when the voltage magnitude for a certain stage exceeds a set threshold. If this happens a Start signal, signifying the "Start of protection", is produced. This Start signal can be blocked by the VTS Fast Block signal. This Start signal is applied to the timer module to produce the Trip signal, which can be blocked by the overvoltage timer block signal (V>(n) Timer Block). For each stage, there are three Phase overvoltage detection modules, one for each phase. The three Start signals from each of these phases are OR'd together to create a 3-phase Start signal (V>(n) Start), which can be be activated when any of the three phases start (Any Phase), or when all three phases start (Three Phase), depending on the chosen V>Operate Mode setting. The outputs of the timer modules are the trip signals which are used to drive the tripping output relay. These tripping signals are also OR'd together to create a 3-phase Trip signal, which are also controlled by the V>Operate Mode setting. If any one of the above signals is low, or goes low before the timer has counted out, the timer module is inhibited (effectively reset) until the blocking signal goes high.
P14D-B/G/L/Z-TM-EN-1
219
Chapter 6 - Voltage & Frequency Protection Functions
3.3 Ordinal
P14D
OVERVOLTAGE DDB SIGNALS Signal Name
Source
Type
Response
Description 222
V<1 Timer Block
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
No response
This DDB signal blocks the first stage Phase Undervoltage time delay 223
V<2 Timer Block
Programmable Scheme Logic
This DDB signal blocks the second stage Phase Undervoltage time delay 286
V>1 Trip
Software
This DDB signal is the first stage three-phase or any-phase Overvoltage trip signal 287
V>1 Trip A/AB
Software
This DDB signal is the first stage A-phase Overvoltage trip signal 288
V>1 Trip B/BC
Software
This DDB signal is the first stage B-phase Overvoltage trip signal 289
V>1 Trip C/CA
Software
This DDB signal is the first stage C-phase Overvoltage trip signal 290
V>2 Trip
Software
This DDB signal is the second stage three-phase or any-phase Overvoltage trip signal 291
V>2 Trip A/AB
Software
This DDB signal is the second stage A-phase Overvoltage trip signal 292
V>2 Trip B/BC
Software
This DDB signal is the second stage B-phase Overvoltage trip signal 293
V>2 Trip C/CA
Software
This DDB signal is the second stage C-phase Overvoltage trip signal 339
V>1 Start
Software
This DDB signal is the first stage three-phase or any-phase Overvoltage start signal 340
V>1 Start A/AB
Software
This DDB signal is the first stage A-phase Phase Overvoltage start signal 341
V>1 Start B/BC
Software
This DDB signal is the first stage B-phase Phase Overvoltage start signal 342
V>1 Start C/CA
Software
This DDB signal is the first stage C-phase Phase Overvoltage start signal 343
V>2 Start
Software
This DDB signal is the second stage three-phase or any-phase Overvoltage start signal 344
V>2 Start A/AB
Software
This DDB signal is the second stage A-phase Phase Overvoltage start signal 345
V>2 Start B/BC
Software
This DDB signal is the second stage B-phase Phase Overvoltage start signal 346
V>2 Start C/CA
Software
This DDB signal is the second stage C-phase Phase Overvoltage start signal 350
VTS Fast Block
Software
This DDB signal is an instantaneously blocking output from the VTS which can block other functions 380
All Poles Dead
Software
PSL Input
No response
This DDB signal indicates that all poles are dead
220
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Ordinal
Signal Name
Source
Type
Response
Description 616
V>3 Start
Software
PSL Input
Protection event
This DDB signal is the third stage three-phase or any-phase Phase Overvoltage start signal 617
V>3 Start A/AB
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the third stage A-phase Phase Overvoltage start signal 618
V>3 Start B/BC
Software
This DDB signal is the third stage B-phase Phase Overvoltage start signal 619
V>3 Start C/CA
Software
This DDB signal is the third stage C-phase Phase Overvoltage start signal 620
V>3 Trip
Software
This DDB signal is the first stage three-phase or any-phase Phase Overvoltage trip signal 621
V>3 Trip A/AB
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Output
No response
This DDB signal is the first stage A-phase Phase Overvoltage trip signal 622
V>3 Trip B/BC
Software
This DDB signal is the first stage B-phase Phase Overvoltage trip signal 623
V>3 Trip C/CA
Software
This DDB signal is the first stage C-phase Phase Overvoltage trip signal 625
V>3 Timer Block
Programmable Scheme Logic
This DDB signal blocks the third stage Phase Overvoltage time delay
3.4
OVERVOLTAGE SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 VOLT PROTECTION
42
00
This column contains settings for Voltage protection OVERVOLTAGE
42
12
The settings under this sub-heading relate to Overvoltage V> Measur't Mode
42
13
Phase-Phase
0=Phase-Phase 1=Phase-Neutral
This set determines the voltage input mode - phase-to-phase or phase-to-neutral. V> Operate Mode
42
14
Any Phase
0=Any Phase 1=Three Phase
This setting determines whether any one of the phases or all three of the phases has to satisfy the overvoltage criteria before a decision is made.
V>1 Function
42
15
DT
0 = Disabled, 1 = DT, 2 = IDMT, 3= Curve 1, 4= Curve 2, 5= Curve 3, 6= Curve 4
This setting determines the tripping characteristic for the first stage overvoltage element. V>1 Voltage Set
42
16
130
From 40*V1 to 185*V1 step 1*V1
This setting sets the pick-up threshold for the first stage overvoltage element. V>1 Time Delay
42
P14D-B/G/L/Z-TM-EN-1
17
10
From 0s to 100s step 0.01s
221
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
P14D
Available Options
Description This setting sets the DT time delay for the first stage overvoltage element. V>1 TMS
42
18
1
From 0.5 to 100 step 0.5
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves. V>2 Status
42
19
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage overvoltage element. There is no choice of curves because this stage is DT only. V>2 Voltage Set
42
1A
150
From 40*V1 to 185*V1 step 1*V1
This setting sets the pick-up threshold for the second stage overvoltage element. V>2 Time Delay
42
1B
0.5
From 0s to 100s step 0.01s
This setting sets the DT time delay for the second stage overvoltage element.
V>3 Function
42
1C
DT
0 = Disabled, 1 = DT, 2 = IDMT, 3= Curve 1, 4= Curve 2, 5= Curve 3, 6= Curve 4
This setting determines the tripping characteristic for the third stage overvoltage element. V>3 Voltage Set
42
1D
130
From 40*V1 to 185*V1 step 1*V1
This setting sets the pick-up threshold for the third stage overvoltage element. V>3 Time Delay
42
1E
10
From 0s to 100s step 0.01s
This setting sets the DT time delay for the third stage overvoltage element. V>3 TMS
42
1F
1
From 0.5 to 100 step 0.5
This is the Time Multiplier Setting to adjust the operate time of IEC IDMT curves.
3.5
APPLICATION NOTES
3.5.1
OVERVOLTAGE SETTING GUIDELINES
The provision of the two stages and their respective operateing characteristics allows for a number of possible applications: ● Definite Time can be used for both stages to provide the required alarm and trip stages ● Use of the IDMT characteristic allows grading of the time delay according to the severity of the overvoltage. As the voltage settings for both of the stages are independent, the second stage could then be set lower than the first to provide a time-delayed alarm stage. ● If only one stage of overvoltage protection is required, or if the element is required to provide an alarm only, the remaining stage may be disabled. This type of protection must be co-ordinated with any other overvoltage devices at other locations on the system.
222
P14D-B/G/L/Z-TM-EN-1
P14D
4
Chapter 6 - Voltage & Frequency Protection Functions
RATE OF CHANGE OF VOLTAGE PROTECTION
Where there are very large loads, imbalances may occur, which could result in rapid decline in system voltage. The situation could be so bad that shedding one or two stages of load would be unlikely to stop this rapid voltage decline. In such a situation, standard undervoltage protection will normally have to be supplemented with protection that responds to the rate of change of voltage. An element is therefore required, which identifies the high rate of decline of voltage and adapts the load shedding scheme accordingly. Such protection can identify voltage variations occurring close to nominal voltage thereby providing early warning of a developing voltage problem. The element can also be used as an alarm to warn operators of unusually high system voltage variations. Rate of Change of Voltage protection is also known as dv/dt protection.
4.1
RATE OF CHANGE OF VOLTAGE PROTECTION IMPLEMENTATION
The dv/dt protection functions can be found in the the VOLT PROTECTION column under the sub-heading dv/dt PROTECTION. The dv/dt protection consists of four independent stages, which can be configured as either 'phase-to-phase' or 'phase-to-neutral' using the dv/dt Meas mode cell.
P14D-B/G/L/Z-TM-EN-1
223
Chapter 6 - Voltage & Frequency Protection Functions
4.2
P14D
RATE OF CHANGE OF VOLTAGE LOGIC dvdt(n) Start A/AB
dvdt Meas Mode VA VAB
dV/dt
Averaging
DT
&
dvdt(n) AvgCycles Freq Not Found
Reset
1
dvdt(n) Trip A/AB
-1
dvdt(n) Threshold
&
X
dv/dt(n) Start B/BC
dvdt Meas Mode VB VBC
dV/dt
Averaging
DT
&
dvdt(n) AvgCycles Freq Not Found
Reset
1
dv/dt(n) Trip B/BC
-1
dvdt(n) Threshold
&
X
dvdt Meas Mode VC VCA
dv/dt(n) Start C/CA dV/dt
Averaging
DT
&
dvdt(n) AvgCycles Freq Not Found
Reset
Positive
dv/dt(n) Trip C/CA
-1
dvdt(n) Threshold dv/dt(n) Function
1
X 1
Both Negative
1
&
&
&
1
&
&
Disabled
dv/dt(n) Blocking
1 &
1
dv/dt(n) Start
1
dv/dt(n) Trip
&
1
V< Operate mode Any Phase Three Phase
Key: Energising Quanitity
AND gate
&
OR gate
Multiplier
X
Switch
1
Time delay
External DDB Signal Setting cell Setting value
dv/dt calculation
Comparator for undervalues
Comparator for overvalues
dv/dt
Averaging buffer
Averaging
V00806
Figure 70: Rate of Change of Voltage protection logic The dv/dt logic works by differentiating the RMS value of each phase voltage input, which can be with respect to neutral, or respect to another phase depending on the selected measurement mode. This differentiated value is then averaged over a number of cycles, determined by the setting dv/dt(n)AvgCycles and comparing this with a threshold (dv/dt(n)Threshold) in both the positive and negative directions. A start signal is produced depending on the selected direction (positive, negative or both), set by the setting dv/ dt(n)Function, which can also disable the function on a per stage basis. Each stage can also be blocked by the DDB signal dvV/dt(n)Blocking. The trip signal is produced by ing the Start signal through a DT timer.
224
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
The function also produces three-phase Start and Trip signals, which can be set to 'Any Phase' (where any of the phases can trigger the start) or 'Three Phase' (where all three phases are required to trigger the start). The averaging buffer is reset either when the stage is disabled or no frequency is found (Freq Not Found DDB signal).
4.3 Ordinal
DV/DT DDB SIGNALS Signal Name
Source
Type
Response
Description 411
Freq Not Found
Software
PSL Input
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal indicates that no frequency has been found 545
dv/dt1 StartA/AB
Software
This DDB signal is the first stage dv/dt start signal for phase A-N or A-B 546
dv/dt1 StartB/BC
Software
This DDB signal is the first stage dv/dt start signal for phase B-N or B-C 547
dv/dt1 StartC/CA
Software
This DDB signal is the first stage dv/dt start signal for phase C-N or C-A 548
dv/dt1 Start
Software
This DDB signal is the first stage dv/dt start signal for any phase or three-phase (select with setting). 549
dv/dt2 StartA/AB
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the second stage dv/dt start signal for phase A-N or A-B 550
dv/dt2 StartB/BC
Software
This DDB signal is the second stage dv/dt start signal for phase B-N or B-C 551
dv/dt2 StartC/CA
Software
This DDB signal is the second stage dv/dt start signal for phase C-N or C-A 552
dv/dt2 Start
Software
This DDB signal is the second stage dv/dt start signal for any phase or three-phase (select with setting). 553
dv/dt1 Trip A/AB
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the first stage dv/dt trip signal for phase A-N or A-B 554
dv/dt1 Trip B/BC
Software
This DDB signal is the first stage dv/dt trip signal for phase B-N or B-C 555
dv/dt1 Trip C/CA
Software
This DDB signal is the first stage dv/dt trip signal for phase C-N or C-A 556
dv/dt1 Trip
Software
This DDB signal is the first stage dv/dt trip signal for any phase or three-phase (select with setting). 557
dv/dt2 Trip A/AB
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the second stage dv/dt trip signal for phase A-N or A-B 558
dv/dt2 Trip B/BC
Software
This DDB signal is the second stage dv/dt trip signal for phase B-N or B-C 559
dv/dt2 Trip C/CA
Software
This DDB signal is the second stage dv/dt trip signal for phase C-N or C-A 560
dv/dt2 Trip
Software
This DDB signal is the second stage dv/dt trip signal for any phase or three-phase (select with setting). 561
dv/dt1 Blocking
Programmable Scheme Logic
PSL Output
Protection event
This DDB signal blocks the first stage dv/dt protection.
P14D-B/G/L/Z-TM-EN-1
225
Chapter 6 - Voltage & Frequency Protection Functions
Ordinal
Signal Name
P14D
Source
Type
Response
Description 562
dv/dt2 Blocking
Programmable Scheme Logic
PSL Output
Protection event
This DDB signal blocks the second stage dv/dt protection.
4.4
DV/DT SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 VOLT PROTECTION
42
00
This column contains settings for Voltage protection dv/dt PROTECTION
42
20
The settings under this sub-heading relate to rate of change of voltage dv/dt Meas Mode
42
21
Phase-Phase
0=Phase-Phase 1=Phase-Neutral
This set determines the voltage input mode - phase-to-phase or phase-to-neutral. dv/dt1 Function
42
22
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting determines the tripping direction for the first stage of dv/dt element - either disabled, for a rising voltage (positive), or a falling voltage (negative). dv/dt1 Function
42
22
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting determines the tripping direction for the first stage of dv/dt element - either disabled, for a rising voltage (positive), or a falling voltage (negative). dv/dt1 Oper Mode
42
23
Any Phase
0=Any Phase 1=Three Phase
This setting determines whether any one of the phases or all three of the phases has to satisfy the dv/dt criteria before a decision is made. dv/dt1 AvgCycles
42
24
10
From 5 to 50 step 1
This setting sets the number of averaging cycles for the first stage dv/dt element. dv/dt1 Threshold
42
25
10
From 0.5 V/s to 200 V/s step 0.5 V/s
This setting sets the voltage threshold for the first stage dv/dt element. dv/dt1 TimeDelay
42
26
0.5
From 0s to 100s step 0.01s
This setting sets the DT time delay for the first stage dv/dt element. dv/dt1 tRESET
42
27
0.03
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic dv/dt2 Function
42
28
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting determines the tripping direction for the second stage of dv/dt element - either disabled, for a rising voltage (positive), or a falling voltage (negative). dv/dt2 Function
226
42
28
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description This setting determines the tripping direction for the second stage of dv/dt element - either disabled, for a rising voltage (positive), or a falling voltage (negative). dv/dt2 Oper Mode
42
29
Any Phase
0=Any Phase 1=Three Phase
This setting determines whether any one of the phases or all three of the phases has to satisfy the dv/dt criteria before a decision is made. dv/dt2 AvgCycles
42
2A
5
From 5 to 50 step 1
This setting sets the number of averaging cycles for the second stage dv/dt element. dv/dt2 Threshold
42
2B
50
From 0.5 V/s to 200 V/s step 0.5 V/s
This setting sets the voltage threshold for the second stage dv/dt element. dv/dt2 TimeDelay
42
2C
0.3
From 0s to 100s step 0.01s
This setting sets the DT time delay for the second stage dv/dt element. dv/dt2 tRESET
42
2D
0.03
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic dv/dt3 Function
42
2E
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting determines the tripping direction for the third stage of dv/dt element - either disabled, for a rising voltage (positive), or a falling voltage (negative). dv/dt3 Function
42
2E
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting determines the tripping direction for the third stage of dv/dt element - either disabled, for a rising voltage (positive), or a falling voltage (negative). dv/dt3 Oper Mode
42
2F
Any Phase
0=Any Phase 1=Three Phase
This setting determines whether any one of the phases or all three of the phases has to satisfy the dv/dt criteria before a decision is made. dv/dt3 AvgCycles
42
30
10
From 5 to 50 step 1
This setting sets the number of averaging cycles for the third stage dv/dt element. dv/dt3 Threshold
42
31
10
From 0.5 V/s to 200 V/s step 0.5 V/s
This setting sets the voltage threshold for the third stage dv/dt element. dv/dt3 TimeDelay
42
32
0.5
From 0s to 100s step 0.01s
This setting sets the DT time delay for the third stage dv/dt element. dv/dt3 tRESET
42
33
0.03
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic dv/dt4 Function
42
34
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting determines the tripping direction for the fourth stage of dv/dt element - either disabled, for a rising voltage (positive), or a falling voltage (negative). dv/dt4 Function
42
34
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting determines the tripping direction for the fourth stage of dv/dt element - either disabled, for a rising voltage (positive), or a falling voltage (negative).
P14D-B/G/L/Z-TM-EN-1
227
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
P14D
Available Options
Description dv/dt4 Oper Mode
42
35
Any Phase
0=Any Phase 1=Three Phase
This setting determines whether any one of the phases or all three of the phases has to satisfy the dv/dt criteria before a decision is made. dv/dt4 AvgCycles
42
36
5
From 5 to 50 step 1
This setting sets the number of averaging cycles for the fourth stage dv/dt element. dv/dt4 Threshold
42
37
50
From 0.5 V/s to 200 V/s step 0.5 V/s
This setting sets the voltage threshold for the fourth stage dv/dt element. dv/dt4 TimeDelay
42
38
0.3
From 0s to 100s step 0.01s
This setting sets the DT time delay for the fourth stage dv/dt element. dv/dt4 tRESET
42
39
0.03
From 0s to 100s step 0.01s
This setting determines the Reset time for the Definite Time Reset characteristic
228
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
5
RESIDUAL OVERVOLTAGE PROTECTION
On a healthy three-phase power system, the sum of the three-phase to earth voltages is nominally zero, as it is the vector sum of three balanced vectors displaced from each other by 120°. However, when an earth fault occurs on the primary system, this balance is upset and a residual voltage is produced. This condition causes a rise in the neutral voltage with respect to earth. Consequently this type of protection is also commonly referred to as 'Neutral Voltage Displacement' or NVD for short. This residual voltage may be derived (from the phase voltages) or measured (from a measurement class open delta VT). Derived values will normally only be used where the model does not measured functionality (a dedicated measurement class VT). If a measurement class VT is used to produce a measured Residual Voltage, it cannot be used for other features such as Check Synchronisation. This offers an alternative means of earth fault detection, which does not require any measurement of current. This may be particularly advantageous in high impedance earthed or insulated systems, where the provision of core balanced current transformers on each feeder may be either impractical, or uneconomic, or for providing earth fault protection for devices with no current transformers.
5.1
RESIDUAL OVERVOLTAGE PROTECTION IMPLEMENTATION
Residual Overvoltage Protection is implemented in the RESIDUAL O/V NVD column of the relevant settings group. Some applications require more than one stage. For example an insulated system may require an alarm stage and a trip stage. It is common in such a case for the system to be designed to withstand the associated healthy phase overvoltages for a number of hours following an earth fault. In such applications, an alarm is generated soon after the condition is detected, which serves to indicate the presence of an earth fault on the system. This gives time for system operators to locate and isolate the fault. The second stage of the protection can issue a trip signal if the fault condition persists. The product provides three stages of Residual Overvoltage protection with independent time delay characteristics. Stages 1 and 3 provide a choice of operate characteristics, where you can select between: ● An IDMT characteristic ● DT (Definite Time) The IDMT characteristic is defined by the following formula:
t = K/( M - 1) where: ● K= Time multiplier setting ● t = Operating time in seconds ● M = Derived residual voltage setting voltage (VN> Voltage Set) You set this using the VN>1 Function and VN>3 Function cells depending on the stage. Stages 1 and 3 also provide a Timer Hold facility as described in Timer Hold facility (on page 88) Stage 2 can have definite time characteristics only. This is set in the VN>2 status cell The device derives the residual voltage internally from the three-phase voltage inputs supplied from either a 5-limb VT or three single-phase VTs. These types of VT design provide a path for the residual flux and consequently permit the device to derive the required residual voltage. In addition, the primary star point of the VT must be earthed. Three-limb VTs have no path for residual flux and are therefore unsuitable for this type of protection.
P14D-B/G/L/Z-TM-EN-1
229
Chapter 6 - Voltage & Frequency Protection Functions
5.2
P14D
RESIDUAL OVERVOLTAGE LOGIC VN>(n) Start
VN &
VN>(n) Voltage Set
&
IDMT/DT VN>(n) Trip
VTS Fast Block Key: Energising Quanitity
VN>(n) Timer Blk
AND gate
&
External DDB Signal Timer
Setting cell
Comparator for overvalues V00802
Figure 71: Residual overvoltage logic The Residual Overvoltage module (VN>) is a level detector that detects when the voltage magnitude exceeds a set threshold, for each stage. When this happens, the comparator output produces a Start signal (VN>(n) Start), which signifies the "Start of protection". This can be blocked by a VTS Fast block signal. This Start signal is applied to the timer module. The output of the timer module is the VN> (n) Trip signal which is used to drive the tripping output relay.
5.3 Ordinal
RESIDUAL OVERVOLTAGE DDB SIGNALS Signal Name
Source
Type
Response
Description 220
VN>1 Timer Blk
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
This DDB signal blocks the first stage Residual Overvoltage time delay 221
VN>2 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the second stage Residual Overvoltage time delay 274
VN>1 Trip
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
No response
This DDB signal is the first stage Residual Overvoltage trip signal 275
VN>2 Trip
Software
This DDB signal is the second stage Residual Overvoltage trip signal 327
VN>1 Start
Software
This DDB signal is the first stage Residual Overvoltage start signal 328
VN>2 Start
Software
This DDB signal is the second stage Residual Overvoltage start signal 350
VTS Fast Block
Software
This DDB signal is an instantaneously blocking output from the VTS which can block other functions 605
VN>3 Start
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Output
No response
This DDB signal is the third stage Residual Overvoltage start signal 606
VN>3 Trip
Software
This DDB signal is the third stage Residual Overvoltage trip signal 607
VN>3 Timer Blk
Programmable Scheme Logic
This DDB signal blocks the third stage Residual Overvoltage time delay
230
P14D-B/G/L/Z-TM-EN-1
P14D
5.4
Chapter 6 - Voltage & Frequency Protection Functions
RESIDUAL OVERVOLTAGE SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 RESIDUAL O/V NVD
3B
00
This column contains settings for Residual Overvoltage (Neutral Voltage Displacement) VN Input
3B
01
Derived
Not Settable
This cell indicates that VN Input is always derived from the 3 phase voltages VN Input
3B
01
Measured
Not Settable
This cell indicates that VN Input is always measured
VN>1 Function
3B
02
DT
0 = Disabled 1 = DT 2 = IDMT 3= Curve 1 4= Curve 2 5= Curve 3 6= Curve 4
This setting determines the tripping characteristic for the first stage residual overvoltage element. VN>1 Voltage Set
3B
03
5
1V to 80V step 1V
This setting sets the pick-up threshold for the first stage. VN>1 Time Delay
3B
04
5
From 0s to 100s step 0.01s
This setting sets the operate time delay for the first stage. VN>1 TMS
3B
05
1
0.5 to 100 step 0.5
This setting sets the time multiplier setting for the IDMT characteristic. VN>1 tReset
3B
06
0
From 0s to 100s step 0.01s
07
Disabled
0 = Disabled or 1 = Enabled
This setting sets the DT reset time. VN>2 Status
3B
This setting enables or disables the second stage SEF element. There is no choice of curves because this stage is DT only. VN>2 Voltage Set
3B
08
10
1V to 80V step 1V
This setting sets the pick-up threshold for the second stage. VN>2 Time Delay
3B
09
10
From 0s to 100s step 0.01s
This setting sets the operate time delay for the second stage.
VN>3 Function
3B
0A
DT
0 = Disabled 1 = DT 2 = IDMT 3= Curve 1 4= Curve 2 5= Curve 3 6= Curve 4
This setting determines the tripping characteristic for the third stage residual overvoltage element. VN>3 Voltage Set
3B
0B
5
1V to 80V step 1V
This setting sets the pick-up threshold for the third stage. VN>3 Time Delay
3B
0C
5
From 0s to 100s step 0.01s
This setting sets the operate time delay for the third stage. VN>3 TMS
3B
0D
1
0.5 to 100 step 0.5
This setting sets the time multiplier setting for the IDMT characteristic. VN>3 tReset
3B
P14D-B/G/L/Z-TM-EN-1
0E
0
From 0s to 100s step 0.01s
231
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting sets the DT reset time.
5.5
APPLICATION NOTES
5.5.1
CALCULATION FOR SOLIDLY EARTHED SYSTEMS
Consider a phase A to Earth fault on a simple radial system. IED
E00800
Figure 72: Residual voltage for a solidly earthed system As can be seen from the above diagram, the residual voltage measured on a solidly earthed system is solely dependent on the ratio of source impedance behind the IED to the line impedance in front of the IED, up to the point of fault. For a remote fault far away, the ZS/ZL: ratio will be small, resulting in a correspondingly small residual voltage. Therefore, the protection only operates for faults up to a certain distance along the system. The maximum distance depends on the device setting.
5.5.2
CALCULATION FOR IMPEDANCE EARTHED SYSTEMS
Consider a phase A to Earth fault on a simple radial system.
232
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
IED
EL00801
Figure 73: Residual voltage for an impedance earthed system An impedance earthed system will always generate a relatively large degree of residual voltage, as the zero sequence source impedance now includes the earthing impedance. It follows then that the residual voltage generated by an earth fault on an insulated system will be the highest possible value (3 x phase-neutral voltage), as the zero sequence source impedance is infinite.
5.5.3
CALCULATION FOR IMPEDANCE EARTHED SYSTEMS
The voltage setting applied to the elements is dependent on the magnitude of residual voltage that is expected to occur during the earth fault condition. This in turn is dependent upon the method of system earthing employed. Also, you must ensure that the IED setting is set above any standing level of residual voltage that is present on the system.
P14D-B/G/L/Z-TM-EN-1
233
Chapter 6 - Voltage & Frequency Protection Functions
6
P14D
NEGATIVE SEQUENCE OVERVOLTAGE PROTECTION
Where an incoming feeder is supplying rotating plant equipment such as an induction motor, correct phasing and balance of the supply is essential. Incorrect phase rotation will result in connected motors rotating in the wrong direction. For directionally sensitive applications, such as elevators and conveyor belts, it is unacceptable to allow this to happen. Imbalances on the incoming supply cause negative phase sequence voltage components. In the event of incorrect phase rotation, the supply voltage would effectively consist of 100% negative phase sequence voltage only.
6.1
NEGATIVE SEQUENCE OVERVOLTAGE IMPLEMENTATION
Negative Sequence Overvoltage Protection is implemented in the NEG SEQUENCE O/V column of the relevant settings group. The device includes one Negative Phase Sequence Overvoltage element with a single stage. Only Definite time is possible. This element monitors the input voltage rotation and magnitude (normally from a bus connected voltage transformer) and may be interlocked with the motor or or circuit breaker to prevent the motor from being energised whilst incorrect phase rotation exists. The element is enabled using the V2> status cell.
NEGATIVE SEQUENCE OVERVOLTAGE LOGIC
6.2
V2> Start
V2 V2> Voltage Set
&
SC
&
DT V2> Trip
VTS Fast Block V2> Accelerate
Key: Energising Quanitity
AND gate
&
External DDB Signal Setting cell Setting value
Timer Start Counter
SC
Comparator for overvalues V00805
Figure 74: Negative Sequence Overvoltage logic The Negative Voltage Sequence Overvoltage module (V2>) is a level detector that detects when the voltage magnitude exceeds a set threshold. When this happens, the comparator output Overvoltage Module produces a Start signal (V2> Start), which signifies the "Start of protection". This can be blocked by a VTS Fast block signal. This Start signal is applied to the DT timer module. The output of the DT timer module is the V2> Trip signal which is used to drive the tripping output relay. The V2> Accelerate signal accelerates the operating time of the function, by reducing the number of cyles needed to start the function from 4 cycles to 2 cycles. At 50 hz, this means the protection start is reduced from 80 ms to 40 ms.
234
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
6.3
NEGATIVE SEQUENCE OVERVOLTAGE DDB SIGNALS
Ordinal
Signal Name
Source
Type
Response
Description 277
V2> Trip
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
No response
This DDB signal is the negative Sequence Overvoltage trip signal 330
V2> Start
Software
This DDB signal is the Negative Sequence Overvoltage start signal 350
VTS Fast Block
Software
This DDB signal is an instantaneously blocking output from the VTS which can block other functions 517
V2> Accelerate
Programmable Scheme Logic
PSL Output
No response
This DDB reduces the pickup delay of the negative sequence overvoltage function.
6.4
NEGATIVE SEQUENCE OVERVOLTAGE SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 NEG SEQUENCE O/V
3D
00
This column contains settings for Negative Sequence Over Voltage protection (NPSOV) V2> Status
3D
01
Enabled
0 = Disabled, 1 = Enabled
15
From 1*V1 to 110*V1 step 1*V1
This setting enables or disables NPSOV. V2> Voltage Set
3D
02
This setting sets the pick-up threshold for the NPSOV protection element. V2> Time Delay
3D
03
5
From 0s to 100s step 0.01s
This setting sets the operate time-delay for the NPSOV protection element.
6.5
APPLICATION NOTES
6.5.1
SETTING GUIDELINES
The primary concern is usually the detection of incorrect phase rotation (rather than small imbalances), therefore a sensitive setting is not required. The setting must be higher than any standing NPS voltage, which may be present due to imbalances in the measuring VT, device tolerances etc. A setting of approximately 15% of rated voltage may be typical. Note: Standing levels of NPS voltage (V2) are displayed in the V2 Magnitude cell of the MEASUREMENTS 1 column.
The operation time of the element is highly dependent on the application. A typical setting would be in the region of 5 seconds.
P14D-B/G/L/Z-TM-EN-1
235
Chapter 6 - Voltage & Frequency Protection Functions
7
P14D
FREQUENCY PROTECTION OVERVIEW
Power generation and utilisation needs to be well balanced in any industrial, distribution or transmission network. These electrical networks are dynamic entities, with continually varying loads and supplies, which are continually affecting the system frequency. Increased loading reduces the system frequency and generation needs to be increased to maintain the frequency of the supply. Conversely decreased loading increases the system frequency and generation needs to be reduced. Sudden fluctuations in load can cause rapid changes in frequency, which need to be dealt with quickly. Unless corrective measures are taken at the appropriate time, frequency decay can go beyond the point of no return and cause widespread network collapse, which has dire consequences. Protection devices capable of detecting low frequency conditions are generally used to disconnect unimportant loads in order to re-establish the generation-to-load balance. However, with such devices, the action is initiated only after the event and this form of corrective action may not be effective enough to cope with sudden load increases that cause large frequency decays in very short times. In such cases a device that can anticipate the severity of frequency decay and act to disconnect loads before the frequency reaches dangerously low levels, are very effective in containing damage. This is called instantaneous rate of change of frequency protection. During severe disturbances, the frequency of the system oscillates as various generators try to synchronise to a common frequency. The measurement of instantaneous rate of change of frequency can be misleading during such a disturbance. The frequency decay needs to be monitored over a longer period of time to make the correct decision for load shedding. This is called average rate of dchange of frequency protection. Normally, generators are rated for a particular band of frequency. Operation outside this band can cause mechanical damage to the turbine blades. Protection against such contingencies is required when frequency does not improve even after load shedding steps have been taken. This type of protection can be used for operator alarms or turbine trips in case of severe frequency decay. Clearly a range of methods is required to ensure system frequency stability. The Alstom Grid frequency devices provides several protection means: ● Underfrequency Protection: abbreviated to f+t< ● Overfrequency Protection: abbreviated to f+t> ● Independent Rate of Change of Frequency Protection: abbreviated to Independent R.O.C.O.F, or df/dt +t ● Frequency-supervised Rate of Change of Frequency Protection: abbreviated to Frequency-supervised R.O.C.O.F, or f+df/dt ● Average Rate of Change of Frequency Protection: abbreviated to Average R.O.C.O.F, or f+Df/Dt (note the uppercase 'D') ● Load Shedding and Restoration
7.1
FREQUENCY PROTECTION IMPLEMENTATION
Frequency Protection is implemented in the FREQ PROTECTION column of the relevant settings group. The device includes 9 stages for all the frequency protection methods (f+t<, f+t>, df/dt+t, f+df/dt, f+Df/Dt) to facilitate load shedding and subsequent restoration. Each stage can be disabled or enabled with the Stage (n) setting. The frequency protection can also be blocked by an undervoltage condition if required.
236
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
8
UNDERFREQUENCY PROTECTION
A reduced system frequency implies that the net load is in excess of the available generation. Such a condition can arise, when an interconnected system splits, and the load left connected to one of the subsystems is in excess of the capacity of the generators in that particular subsystem. Industrial plants that are dependent on utilities to supply part of their loads will experience underfrequency conditions when the incoming lines are lost. Many types of industrial loads have limited tolerances on the operating frequency and running speeds (e.g. synchronous motors). Sustained underfrequency has implications on the stability of the system, whereby any subsequent disturbance may damage equipment and even lead to blackouts. It is therefore essential to provide protection for underfrequency conditions.
8.1
UNDERFREQUENCY PROTECTION IMPLEMENTATION
The following settings are relevant for underfrequency: ● Stg (n) f+t Status: determines whether the stage is underfrequency, overfrequency, or disabled ● Stg (n) f+t Freq: defines the frequency pickup setting ● Stg (n) f+t Time: sets the time delay
8.2
UNDERFREQUENCY PROTECTION LOGIC Stg(n) f+t Sta
Averaging
Freq
Stg (n) f+t Freq
&
DT Stg(n) f+t Trp
Stage (n) Enabled
Key:
Stg (n) f+t Status
Energising Quanitity
Under
Adv Freq Inh Freq Not Found
UV Block
&
OR gate
1
External DDB Signal 1
Setting cell Setting value
V
AND gate
Internal function
Timer
1 Comparator for undervalues
V00850
Figure 75: Underfrequency logic (single stage) If the frequency is below the setting and not blocked the DT timer is started. If the frequency cannot be determined, the function is blocked.
8.3
APPLICATION NOTES
8.3.1
SETTING GUIDELINES
In order to minimise the effects of underfrequency, a multi-stage load shedding scheme may be used with the plant loads prioritised and grouped. During an underfrequency condition, the load groups are disconnected sequentially, with the highest priority group being the last one to be disconnected.
P14D-B/G/L/Z-TM-EN-1
237
Chapter 6 - Voltage & Frequency Protection Functions
P14D
The effectiveness of each load shedding stage depends on the proportion of power deficiency it represents. If the load shedding stage is too small compared with the prevailing generation deficiency, then there may be no improvement in the frequency. This should be taken into when forming the load groups. Time delays should be sufficient to override any transient dips in frequency, as well as to provide time for the frequency controls in the system to respond. These should not be excessive as this could jeopardize system stability. Time delay settings of 5 - 20 s are typical. An example of a four-stage load shedding scheme for 50 Hz systems is shown below: Stage
Element
Frequency Setting (Hz)
Time Setting (Sec)
1
Stage 1(f+t)
49.0
20 s
2
Stage 2(f+t)
48.6
20 s
3
Stage 3(f+t)
48.2
10 s
4
Stage 4(f+t)
47.8
10 s
The relatively long time delays are intended to provide sufficient time for the system controls to respond. This will work well in a situation where the decline of system frequency is slow. For situations where rapid decline of frequency is expected, this load shedding scheme should be supplemented by rate of change of frequency protection elements.
238
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
9
OVERFREQUENCY PROTECTION
An increased system frequency arises when the mechanical power input to a generator exceeds the electrical power output. This could happen, for instance, when there is a sudden loss of load due to tripping of an outgoing feeder from the plant to a load centre. Under such conditions, the governor would normally respond quickly to obtain a balance between the mechanical input and electrical output, thereby restoring normal frequency. Overfrequency protection is required as a backup to cater for cases where the reaction of the control equipment is too slow.
9.1
OVERFREQUENCY PROTECTION IMPLEMENTATION
The following settings are relevant for overfrequency: ● Stg (n) f+t Status: determines whether the stage is underfrequency, overfrequency, or disabled ● Stg (n) f+t Freq: defines the frequency pickup setting ● Stg (n) f+t Time: sets the time delay
9.2
OVERFREQUENCY PROTECTION LOGIC Stg(n) f+t Sta
Averaging
Freq
Stg (n) f+t Freq
&
DT Stg(n) f+t Trp
Stage (n) Enabled
Key:
Stg (n) f+t Status
Energising Quanitity
Over
Adv Freq Inh Freq Not Found
1
UV Block
&
Setting cell
OR gate
1
Setting value
V
AND gate
External DDB Signal
Internal function
Timer
1 Comparator for overvalues
V00851
Figure 76: Overfrequency logic (single stage) If the frequency is above the setting and not blocked, the DT timer is started and after this has timed out, the trip is produced. If the frequency cannot be determined, the function is blocked.
9.3
APPLICATION NOTES
9.3.1
SETTING GUIDELINES
Following changes on the network caused by faults or other operational requirements, it is possible that various subsystems will be formed within the power network. It is likely that these subsystems will suffer from a generation/load imbalance. The "islands" where generation exceeds the existing load will be subject to overfrequency conditions. Severe over frequency conditions may be unacceptable to many industrial loads, since running speeds of motors will be affected. The overfrequency element can be suitably set to sense this contingency.
P14D-B/G/L/Z-TM-EN-1
239
Chapter 6 - Voltage & Frequency Protection Functions
P14D
An example of two-stage overfrequency protection is shown below using stages 5 and 6 of the f+t elements. However, settings for a real system will depend upon the maximum frequency that equipment can tolerate for a given period of time. Stage
Element
Frequency Setting (Hz)
Time Setting (Sec.)
1
Stage 5(f+t)
50.5
30
2
Stage 6(f+t)
51.0
20
The relatively long time delays are intended to provide time for the system controls to respond and will work well in a situation where the increase of system frequency is slow. For situations where rapid increase of frequency is expected, the protection scheme above could be supplemented by rate of change of frequency protection elements. In the system shown below, the generation in the MV bus is sized according to the loads on that bus, whereas the generators linked to the HV bus produce energy for export to utility. If the links to the grid are lost, the IPP generation will cause the system frequency to rise. This rate of rise could be used to isolate the MV bus from the HV system.
E00857
Figure 77: Power system segregation based upon frequency measurements
240
P14D-B/G/L/Z-TM-EN-1
P14D
10
Chapter 6 - Voltage & Frequency Protection Functions
INDEPENDENT R.O.C.O.F PROTECTION
Where there are very large loads imbalances may occur that result in rapid decline in system frequency. The situation could be so bad that shedding one or two stages of load is unlikely to stop this rapid frequency decline. In such a situation, standard underfrequency protection will normally have to be supplemented with protection that responds to the rate of change of frequency. An element is therefore required which identifies the high rate of decline of frequency, and adapts the load shedding scheme accordingly. Such protection can identify frequency variations occurring close to nominal frequency thereby providing early warning of a developing frequency problem. The element can also be used as an alarm to warn operators of unusually high system frequency variations. Independent Rate of Change of Frequency protection is also known as df/dt+t protection.
10.1
INDEPENENT R.O.C.O.F PROTECTION IMPLEMENTATION
The device provides nine independent stages of protection. Each stage can respond to either rising or falling frequency conditions. This depends on whether the frequency threshold is set above or below the system nominal frequency. For example, if the frequency threshold is set above nominal frequency, the rate of change of frequency setting is considered as positive and the element will operate for rising frequency conditions. If the frequency threshold is set below nominal frequency, the setting is considered as negative and the element will operate for falling frequency conditions. The following settings are relevant for df/dt+t protection: ● df/dt+t (n) Status: determines whether the stage is for falling or rising frequency conditions ● df/dt+t (n) Set: defines the rate of change of frequency pickup setting ● df/dt+t (n) Time: sets the time delay
P14D-B/G/L/Z-TM-EN-1
241
Chapter 6 - Voltage & Frequency Protection Functions
10.2
P14D
INDEPENDENT R.O.C.O.F PROTECTION LOGIC Frequency determination
V
df/dt
Stg1 df/dt+t Sta
& df/dt Avg. Cycles
1
Stg1 df/dt+t Trp
-1
df/dt+t (n) Set
&
X
df/dt+t (n) Time Stage (n) Enabled
df/dt+t (n) Status
1
Positive Both
1
Negative
Key:
Disabled
Energising Quanitity
V
AND gate
&
OR gate
1
External DDB Signal
Enabled
1
UV Block
1
Setting cell Setting value
Stg(n)Block
Internal function
Adv Freq Inh Freq Not Found
1
Timer
Comparator for overvalues
Freq High Freq Low
Comparator for undervalues
V00852
Figure 78: Independent rate of change of frequency logic (single stage)
10.3
APPLICATION NOTES
10.3.1
SETTING GUIDELINES
Considerable care should be taken when setting this element because it is not supervised by a frequency setting. Setting of the time delay or increasing the number of df/dt averaging cycles will improve stability but this is traded against reduced tripping times. It is likely that this element would be used in conjunction with other frequency based protection elements to provide a scheme that s for severe frequency fluctuations. An example scheme is shown below: Frequency "f+t [81U/81O]" Elements Frequency Setting (Hz)
Stage
Time Setting (Sec.)
Frequency Supervised Rate of Change of Frequency "f +df/dt [81RF]" Elements Frequency Setting (Hz)
Rate of Change of Frequency Setting (Hz/Sec.)
1
49
20
49.2
1.0
2
48.6
20
48.8
1.0
3
48.2
10
48.4
1.0
4
47.8
10
48.0
1.0
5
-
-
-
-
242
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Rate of Change of Frequency "df/dt+t [81R]" Elements
Stage
Rate of Change of Frequency Setting (Hz/Sec.)
Time Setting (Sec.)
1
-
-
2
-
-
3
-3.0
0.5
4
-3.0
0.5
5
-3.0
0.1
In this scheme, tripping of the last two stages is accelerated by using the independent rate of change of frequency element. If the frequency starts falling at a high rate (> 3 Hz/s in this example), then stages 3 & 4 are shed at around 48.5 Hz, with the objective of improving system stability. Stage 5 serves as an alarm and gives operators advance warning that the situation is critical.
P14D-B/G/L/Z-TM-EN-1
243
Chapter 6 - Voltage & Frequency Protection Functions
11
P14D
FREQUENCY-SUPERVISED R.O.C.O.F PROTECTION
Frequency-supervised Rate of Change of Frequency protection works in a similar way to Independent Rate of change of Frequency Protection. The only difference is that with frequency supervision, the actual frequency itself is monitored and the protection operates when both the rate of change of frequency AND the frequency itself go outside the set limits. Frequency-supervised Rate of Change of Frequency protection is also known asf+df/dt protection.
11.1
FREQUENCY-SUPERVISED R.O.C.O.F IMPLEMENTATION
The device provides nine independent stages of protection. Each stage can respond to either rising or falling frequency conditions. This depends on whether the frequency threshold is set above or below the system nominal frequency. For example, if the frequency threshold is set above nominal frequency, the rate of change of frequency setting is considered as positive and the element will operate for rising frequency conditions. If the frequency threshold is set below nominal frequency, the setting is considered as negative and the element will operate for falling frequency conditions. The following settings are relevant for f+ df/dt protection: ● f+df/dt 1 Status: determines whether the stage is for falling or rising frequency conditions ● f+df/dt 1 freq: defines the frequency pickup setting ● f+df/dt 1 df/dt: defines the rate of change of frequency pickup setting The device will also indicate when an incorrect setting has been applied if the frequency threshold is set to the nominal system frequency. There is no intentional time delay associated with this element, but time delays could be applied using the PSL if required.
244
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
11.2
FREQUENCY-SUPERVISED R.O.C.O.F LOGIC Frequency determination
V
df/dt &
df/dt Avg. Cycles
Frequency determination
Stg1 df/dt+t Trp
-1
f + df/dt (n) df/dt V
1
&
X Frequency averaging
Freq Avg. Cycles
-1
f+ df/dt (n) freq
X
Stage (n) Enabled
f + df/dt (n) Status
1
Positive Both Negative
1
Key:
Disabled
Energising Quanitity
Enabled
UV Block
AND gate
&
OR gate
1
External DDB Signal
V
1
Setting cell Setting value
Stg(n)Block
Internal function
Timer
Adv Freq Inh Freq Not Found
1
Comparator for overvalues
Freq High Freq Low
Comparator for undervalues
V00853
Figure 79: Frequency-supervised rate of change of frequency logic (single stage)
11.3
APPLICATION NOTES
11.3.1
APPLICATION EXAMPLE
In the load shedding scheme below, we assume that for falling frequency conditions, the system can be stabilised at frequency f2 by shedding a stage of load. For slow rates of decay, this can be achieved using the underfrequency protection element set at frequency f1 with a suitable time delay. However, if the generation deficit is substantial, the frequency will rapidly decrease and it is possible that the time delay imposed by the underfrequency protection will not allow for frequency stabilisation. In this case, the chance of system recovery will be enhanced by disconnecting the load stage based on a measurement of rate of change of frequency and bying the time delay.
P14D-B/G/L/Z-TM-EN-1
245
Chapter 6 - Voltage & Frequency Protection Functions
P14D
E00858
Figure 80: Frequency supervised rate of change of frequency protection
11.3.2
SETTING GUIDELINES
We recommend that the frequency supervised rate of change of frequency protection (f+df/dt) element be used in conjunction with the time delayed frequency protection (f+t) elements. A four stage high speed load shedding scheme may be configured as indicated below, noting that in each stage, both the "f+t" and the "f+df/dt" elements are enabled. Frequency "f+t [81U/81O]" Elements Stage
Frequency Setting (Hz)
Time Setting (Sec.)
Frequency Supervised Rate of Change of Frequency "f+df/dt [81RF]" Elements Frequency Setting (Hz)
Rate of Change of Frequency Setting (Hz/sec.)
1
49
20
49
1.0
2
48.6
20
48.6
1.0
3
48.2
10
48.2
1.0
4
47.8
10
47.8
1.0
It may be possible to further improve the speed of load shedding by changing the frequency setting on the f +df/dt element. In the settings outlined below, the frequency settings for this element have been set slightly higher than the frequency settings for the f+t element. This difference will allow for the measuring time, and will result in the tripping of the two elements at approximately the same frequency value. Therefore, the slow frequency decline and fast frequency decline scenarios are independently monitored and optimised without sacrificing system security. Frequency "f+t [81U/81O]" Elements Stage
Frequency Setting (Hz)
Time Setting (Sec.)
Frequency Supervised Rate of Change of Frequency "f +df/dt [81RF]" Elements Frequency Setting (Hz)
Rate of Change of Frequency Setting (Hz/sec.)
1
49
20
49.2
1.0
2
48.6
20
48.8
1.0
3
48.2
10
48.4
1.0
4
47.8
10
48.0
1.0
246
P14D-B/G/L/Z-TM-EN-1
P14D
12
Chapter 6 - Voltage & Frequency Protection Functions
AVERAGE RATE OF CHANGE OF FREQUENCY PROTECTION
Owing to the complex dynamics of power systems, variations in frequency during times of generation-to-load imbalance are highly non-linear. Oscillations will occur as the system seeks to address the imbalance, resulting in frequency oscillations typically in the order of 0.1 Hz to 1 Hz, in addition to the basic change in frequency. The independent and frequency-supervised rate of change of frequency elements use an instantaneous measurement of the rate of change of frequency, based on a 3-cycle, filtered, rolling average technique. Due to the oscillatory nature of frequency excursions, this instantaneous value can sometimes be misleading, either causing unexpected operation or excessive instability. For this reason, the device also provides an element for monitoring the longer term frequency trend, thereby reducing the effects of non-linearity in the system. Average Rate of Change of Frequency protection is also known as f+Df/Dt protection (note the upper-case "D").
12.1
AVERAGE R.O.C.O.F PROTECTION IMPLEMENTATION
The device provides nine independent stages of protection. Each stage can respond to either rising or falling frequency conditions. This depends on whether the frequency threshold is set above or below the system nominal frequency. For example, if the frequency threshold is set above nominal frequency, the rate of change of frequency setting is considered as positive and the element will operate for rising frequency conditions. If the frequency threshold is set below nominal frequency, the setting is considered as negative and the element will operate for falling frequency conditions. When the measured frequency crosses the supervising frequency threshold, a timer is initiated. At the end of this time period, the frequency difference is evaluated and if this exceeds the setting, a trip output is given.
EL00856
Figure 81: Average rate of change of frequency characteristic
P14D-B/G/L/Z-TM-EN-1
247
Chapter 6 - Voltage & Frequency Protection Functions
P14D
After time ∆t, the element is blocked from further operation until the frequency recovers to a value above the supervising frequency threshold. If the element has operated, the trip DDB signal will be ON until the frequency recovers to a value above the supervising frequency threshold. The average rate of change of frequency is then measured based on the frequency difference, ∆f over the settable time period, ∆t. The following settings are relevant for Df/Dt protection: ● f+Df/Dt (n) Status: determines whether the stage is for falling or rising frequency conditions ● f+Df/Dt (n) Freq: defines the frequency pickup setting ● f+Df/Dt (n) Dfreq: defines the change in frequency that must be measured in a set time period ● f+Df/Dt (n) Dtime: sets the time period over which the frequency is monitiored
12.2
AVERAGE R.O.C.O.F LOGIC
Frequency determination
V
Frequency Averaging
Stg1 df/dt+t Sta
& Freq Avg. Cycles Df/Dt+f (n) freq
Frequency comparision
1
Stg1 df/dt+t Trp
-1
&
X
F+ Df/Dt Dtime (n)
F+ Df/Dt Dfreq (n)
Stage (n) Enabled
f + Df/Dt (n) Status
1
Positive Both Negative
1 Key:
Disabled
Energising Quanitity
V
UV Block
&
OR gate
1
External DDB Signal 1
1
Setting cell Setting value
Stg(n)Block
Internal function
Adv Freq Inh Freq Not Found
AND gate
1
Timer
Comparator for overvalues
Freq High Freq Low
Comparator for undervalues
V00859
Figure 82: Average rate of change of frequency logic (single stage)
12.3
APPLICATION NOTES
12.3.1
SETTING GUIDELINES
The average rate of change of frequency element can be set to measure the rate of change over a short period as low as 20 ms (1 cycle @ 50 Hz) or a relatively long period up to 2 s (100 cycles @ 50 Hz). With a time setting, Dt, towards the lower end of this range, the element becomes similar to the frequency supervised rate of change function, "f+df/dt". With high Dt settings, the element acts as a frequency trend monitor.
248
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Although the element has a wide range of setting possibilities we recommend that the Dt setting is set greater than 100 ms to ensure the accuracy of the element. A possible four stage load shedding scheme using the average rate of change frequency element is shown in the following table: Frequency "f+t [81U/81O]" Elements Stage
(f+t) t Time Setting (Sec.)
(f+t) f Frequency Setting (Hz)
Average Rate of Change of Frequency "f+Df/Dt [81RAV]" Elements (f+Df/Dt) f (f+Df/Dt) Df Frequency Frequency Setting Diff Setting, (Hz) (Hz)
(f+Df/Dt) Dt Time Period, (Sec.)
1
49
20
49
0.5
0.5
2
48.6
20
48.6
0.5
0.5
3
48.2
10
48.2
0.5
0.5
4
47.8
10
47.8
0.5
0.5
In the above scheme, the faster load shed decisions are made by monitoring the frequency change over 500 ms. Therefore tripping takes place more slowly than in schemes employing frequency-supervised df/dt, but the difference is not very much at this setting. If the delay jeopardises system stability, then the scheme can be improved by increasing the independent "f" setting. Depending on how much this value is increased, the frequency at which the "f+Df/Dt" element will trip also increases and so reduces the time delay under more severe frequency fluctuations. For example, with the settings shown below, the first stage of load shedding would be tripped approximately 300 msecs after 49.0 Hz is reached and at a frequency of approximately 48.7 Hz. Frequency "f+t [81U/81O]" Elements Stage
(f+t) f Frequency Setting (Hz)
Average Rate of Change of Frequency "f+Df/Dt [81RAV]" Elements
(f+Df/Dt) f (f+t) t Frequency Setting Time Setting (Sec) (Hz)
(f+Df/Dt) Df Frequency Diff Setting (Hz)
(f+Df/Dt) Dt Time Period, (Sec.)
1
49
20
49.2
0.5
0.5 s
2
48.6
20
48.8
0.5
0.5 s
3
48.2
10
48.4
0.5
0.5 s
4
47.8
10
48.0
0.5
0.5 s
P14D-B/G/L/Z-TM-EN-1
249
Chapter 6 - Voltage & Frequency Protection Functions
13
P14D
LOAD SHEDDING AND RESTORATION
The goal of load shedding is to stabilise a falling system frequency. As the system stabilises and the generation capability improves, the system frequency will recover to near normal levels and after some time delay it is possible to consider the restoration of load onto the healthy system. However, load restoration needs to be performed carefully and systematically so that system stability is not jeopardized again. In the case of industrial plants with captive generation, load restoration should be linked to the available generation since connecting additional load when the generation is still inadequate, will only result in declining frequency and more load shedding. If the in-plant generation is insufficient to meet the load requirements, then load restoration should be interlocked with recovery of the utility supply. Whilst load shedding leads to an improvement in the system frequency, the disconnected loads need to be reconnected after the system is stable again. Loads should only be restored if the frequency remains stable for some period of time (minor frequency excursions can be ignored during this time period). The number of load restoration steps is normally less than the load shedding steps to reduce repeated disturbances while restoring load.
13.1
LOAD RESTORATION IMPLEMENTATION
The device uses the measurement of system frequency as the main criteria for load restoration. For each stage of load restoration, it is necessary that the same stage of load shedding has occurred previously and that no elements within that stage are configured for overfrequency or rising frequency conditions. If load shedding has not previously occurred, the load restoration for that stage is inactive. The device provides nine independent stages of Load Restoration. It is implemented in the FREQ PROTECTION column of the relevant settings group. The following settings are relevant for Load Restoration: ● Restore(n) Status: determines whether the stage is disabled or enabled ● Restore(n) Freq: defines the frequency pickup setting ● Restore(n) Time: Timer period for which the measured frequency must be higher than the stage restoration. ● Holding Timer: Sets the holding timer value
13.2
HOLDING BAND
Load restoration for a given stage begins when the system frequency rises above the Restore(n) Freq setting for that stage and the stage restoration timer Restore(n) Time is initiated. If the system frequency remains above the frequency setting for the set time delay, load restoration of that stage will be triggered. Unfortunately, frequency recovery profiles are highly non-linear and it would be reasonably common for the system frequency to fall transiently below the restoration frequency threshold. If the restoration timer immediately reset whenever a frequency dip occurred, it is likely that load restoration would never be successful. For this reason, the IED has a "holding band". This holding band is a region defined by the restoration frequency and the highest frequency setting used in the load shedding elements for that stage. The difference between these two settings must always be greater than 0.02 Hz, otherwise a Wrong Setting alarm will be generated. Whenever the system frequency dips into the holding band, operation of the stage restoration timer is suspended until the frequency rises above the restoration frequency setting, at which point timing will continue. If the system frequency dip is sufficiently large to cause any frequency element to start or trip in this stage, i.e. if the frequency falls below the lower limit of the holding band, the restoration timer will immediately be reset. This is demonstrated below.
250
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
V00854
Figure 83: Load restoration with short deviation into holding band If the system frequency remains in the holding band for too long it is likely that other system frequency problems are occurring and it would be prudent to reset the restoration timer for that stage. For this reason, as soon as the system frequency is measured to be within the holding band, the "Holding Timer" is initiated. If the system frequency doesn’t leave the holding band before the holding timer setting has been exceeded, the load restoration time delay for that stage is immediately reset. Note: The holding timer has a common setting for all stages of load restoration.
An example of the case when the time in the holding band is excessive is shown below.
P14D-B/G/L/Z-TM-EN-1
251
Chapter 6 - Voltage & Frequency Protection Functions
P14D
V00855
Figure 84: Load restoration with long deviation into holding band
252
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
13.3
LOAD RESTORATION LOGIC Stg(n) f+t Trp Stg(n) df/dt+t Trp Stg(n) f+df/dt Trp
1
&
Load Restoration Function
Cumulative Timer
Stg(n) Restore Sta
Stg(n) f+Df/Dt Trp &
Restore (n) Status
Stg(n) Restore Cls
Restore(n) Time
Enabled Disabled
V
Key:
Enabled
UV Block
1
Energising Quanitity
1
External DDB Signal
Stg(n)Block
Setting cell
Adv Freq Inh
Setting value
Freq Not Found
1
Internal function
Freq High Comparator for overvalues
Freq Low Frequency determination
V
Frequency Averaging
Comparator for undervalues
Freq Avg. Cycles Holding function
Restore freq
AND gate
&
OR gate
1
Highest Freq setting Holding Timer (n) Timer V00860
Figure 85: Load Restoration logic
13.4
APPLICATION NOTES
13.4.1
SETTING GUIDELINES
A four stage, single frequency load restoration scheme is shown below. The frequency setting has been chosen such that there is sufficient separation between the highest load shed frequency and the restoration frequency to prevent any possible hunting. A restoration frequency setting closer to nominal frequency may be chosen if an operating frequency of 49.3 Hz is unacceptable. Stage
Restoration Frequency Setting (Hz)
Restoration Time Delay (secs)
Holding Time Delay (secs)
1
49.3 Hz
240 sec
20 sec
2
49.3 Hz
180 sec
20 sec
3
49.3 Hz
120 sec
20 sec
4
49.3 Hz
60 sec
20 sec
In this scheme, the time delays ensure that the most critical loads are reconnected (assuming that the higher stages refer to more important loads). By restoring the load sequentially, system stability should normally be maintained. These time settings are system dependent; higher or lower settings may be required depending on the particular application.
P14D-B/G/L/Z-TM-EN-1
253
Chapter 6 - Voltage & Frequency Protection Functions
P14D
It is possible to set up restoration schemes involving multiple frequencies. This allows faster restoration of loads, but there is the possibility of continuous system operation at frequencies far removed from the nominal. A typical scheme using two frequencies is illustrated below: Stage
Restore Freq. Restoration Frequency Setting (Hz)
Restore DelayRestoration Time Delay (S)
Holding Time Delay (S)
1
49.5 Hz
120 sec
20 sec
2
49.5 Hz
60 sec
20 sec
3
49.0 Hz
120 sec
20 sec
4
49.0 Hz
60 sec
20 sec
Staggered time settings may be used in this scheme as well, but the time separation among the restoration of stages will be a function of the frequency recovery pattern. Time coordinated restoration can only be guaranteed for those stages with a common restoration frequency setting.
254
P14D-B/G/L/Z-TM-EN-1
P14D
14
Chapter 6 - Voltage & Frequency Protection Functions
FREQUENCY PROTECTION DDB SIGNALS
Within the Programmable Scheme Logic (PSL), signals are available to indicate the start and trip of each frequency stage. The DDB signal states can be be viewed by setting the Monitor Bit cells in the COMMISSION TESTS column. The complete set of frequency-related DDB signals is detailed as follows: Ordinal
Signal Name
Source
Type
Response
Description 167
UV Block
Software
PSL Input
Alarm latched event
PSL Input
No response
PSL Output
No response
PSL Input
Protection event
This DDB blocks the undervoltage element 411
Freq Not Found
Software
This DDB signal indicates that no frequency has been found 1280
Adv Freq Inh
Programmable Scheme Logic
This DDB inhibits frequency protection 1281
Stg1 f+t Sta
Software
This DDB signal is the start signal for the first stage Frequency protection element. 1282
Stg1 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the first stage Frequency protection element. 1283
Stg1 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the first stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1284
Stg1 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the first stage Independent Rate-of-Change-of-Frequency protection element. 1285
Stg1 df/dt+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the first stage Independent Rate-of-Change-of-Frequency protection element. 1286
Stg1 f+Df/Dt Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the first stage Average Rate-of-Change-of-Frequency protection element. 1287
Stg1 f+Df/Dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the first stage Average Rate-of-Change-of-Frequency protection element. 1288
Stg1 Block
Programmable Scheme Logic
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal blocks all first stage Frequency protection elements 1291
Stg1 Restore Cls
Software
This DDB signal closes the first stage Load Restoration 1292
Stg1 Restore Sta
Software
This DDB signal starts the first stage Load Restoration 1295
Stg2 f+t Sta
Software
This DDB signal is the start signal for the second stage Frequency protection element. 1296
Stg2 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the second stage Frequency protection element. 1297
Stg2 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the second stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1298
Stg2 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the second stage Independent Rate-of-Change-of-Frequency protection element. 1299
Stg2 df/dt+t Trp
P14D-B/G/L/Z-TM-EN-1
Software
PSL Input
Protection event
255
Chapter 6 - Voltage & Frequency Protection Functions
Ordinal
Signal Name
Source
P14D
Type
Response
Description This DDB signal is the trip signal for the second stage Independent Rate-of-Change-of-Frequency protection element. 1300
Stg2 f+Df/Dt Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the second stage Average Rate-of-Change-of-Frequency protection element. 1301
Stg2 f+Df/Dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the second stage Average Rate-of-Change-of-Frequency protection element. 1302
Stg2 Block
Programmable Scheme Logic
PSL Output
No response
This DDB signal blocks all second stage Frequency protection elements 1305
Stg2 Restore Cls
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal closes the second stage Load Restoration 1306
Stg2 Restore Sta
Software
This DDB signal starts the second stage Load Restoration 1309
Stg3 f+t Sta
Software
This DDB signal is the start signal for the third stage Frequency protection element. 1310
Stg3 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the third stage Frequency protection element. 1311
Stg3 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the third stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1312
Stg3 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the third stage Independent Rate-of-Change-of-Frequency protection element. 1313
Stg3 df/dt+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the third stage Independent Rate-of-Change-of-Frequency protection element. 1314
Stg3 f+Df/Dt Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the third stage Average Rate-of-Change-of-Frequency protection element. 1315
Stg3 f+Df/Dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the third stage Average Rate-of-Change-of-Frequency protection element. 1316
Stg3 Block
Programmable Scheme Logic
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal blocks all third stage Frequency protection elements 1319
Stg3 Restore Cls
Software
This DDB signal closes the third stage Load Restoration 1320
Stg3 Restore Sta
Software
This DDB signal starts the third stage Load Restoration 1323
Stg4 f+t Sta
Software
This DDB signal is the start signal for the fourth stage Frequency protection element. 1324
Stg4 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the fourth stage Frequency protection element. 1325
Stg4 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the fourth stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1326
Stg4 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the fourth stage Independent Rate-of-Change-of-Frequency protection element. 1327
Stg4 df/dt+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the fourth stage Independent Rate-of-Change-of-Frequency protection element. 1328
256
Stg4 f+Df/Dt Sta
Software
PSL Input
Protection event
P14D-B/G/L/Z-TM-EN-1
P14D
Ordinal
Chapter 6 - Voltage & Frequency Protection Functions
Signal Name
Source
Type
Response
Description This DDB signal is the start signal for the fourth stage Average Rate-of-Change-of-Frequency protection element. 1329
Stg4 f+Df/Dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the fourth stage Average Rate-of-Change-of-Frequency protection element. 1330
Stg4 Block
Programmable Scheme Logic
PSL Output
No response
This DDB signal blocks all fourth stage Frequency protection elements 1333
Stg4 Restore Cls
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal closes the fourth stage Load Restoration 1334
Stg4 Restore Sta
Software
This DDB signal starts the fourth stage Load Restoration 1337
Stg5 f+t Sta
Software
This DDB signal is the start signal for the fifth stage Frequency protection element. 1338
Stg5 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the fifth stage Frequency protection element. 1339
Stg5 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the fifth stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1340
Stg5 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the fifth stage Independent Rate-of-Change-of-Frequency protection element. 1341
Stg5 df/dt+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the fifth stage Independent Rate-of-Change-of-Frequency protection element. 1342
Stg5 f+Df/Dt Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the fifth stage Average Rate-of-Change-of-Frequency protection element. 1343
Stg5 f+Df/Dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the fifth stage Average Rate-of-Change-of-Frequency protection element. 1344
Stg5 Block
Programmable Scheme Logic
PSL Output
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal blocks all fifth stage Frequency protection elements 1347
Stg5 Restore Cls
Software
This DDB signal closes the fifth stage Load Restoration 1348
Stg5 Restore Sta
Software
This DDB signal starts the fifth stage Load Restoration 1351
Stg6 f+t Sta
Software
This DDB signal is the start signal for the sixth stage Frequency protection element. 1352
Stg6 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the sixth stage Frequency protection element. 1353
Stg6 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the sixth stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1354
Stg6 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the sixth stage Independent Rate-of-Change-of-Frequency protection element. 1355
Stg6 df/dt+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the sixth stage Independent Rate-of-Change-of-Frequency protection element. 1356
Stg6 f+Df/Dt Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the sixth stage Average Rate-of-Change-of-Frequency protection element. 1357
Stg6 f+Df/Dt Trp
P14D-B/G/L/Z-TM-EN-1
Software
PSL Input
Protection event
257
Chapter 6 - Voltage & Frequency Protection Functions
Ordinal
Signal Name
Source
P14D
Type
Response
Description This DDB signal is the trip signal for the sixth stage Average Rate-of-Change-of-Frequency protection element. 1358
Stg6 Block
Programmable Scheme Logic
PSL Output
No response
This DDB signal blocks all sixth stage Frequency protection elements 1361
Stg6 Restore Cls
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal closes the sixth stage Load Restoration 1362
Stg6 Restore Sta
Software
This DDB signal starts the sixth stage Load Restoration 1365
Stg7 f+t Sta
Software
This DDB signal is the start signal for the seventh stage Frequency protection element. 1366
Stg7 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the seventh stage Frequency protection element. 1367
Stg7 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the seventh stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1368
Stg7 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the seventh stage Independent Rate-of-Change-of-Frequency protection element. 1369
Stg7 df/dt+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the seventh stage Independent Rate-of-Change-of-Frequency protection element. 1370
Stg7 f+Df/Dt Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the seventh stage Average Rate-of-Change-of-Frequency protection element. 1371
Stg7 f+Df/Dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the seventh stage Average Rate-of-Change-of-Frequency protection element. 1372
Stg7 Block
Programmable Scheme Logic
PSL Output
No response
This DDB signal blocks all seventh stage Frequency protection elements 1375
Stg7 Restore Cls
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal closes the seventh stage Load Restoration 1376
Stg7 Restore Sta
Software
This DDB signal starts the seventh stage Load Restoration 1379
Stg8 f+t Sta
Software
This DDB signal is the start signal for the eighth stage Frequency protection element. 1380
Stg8 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the eighth stage Frequency protection element. 1381
Stg8 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the eighth stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1382
Stg8 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the eighth stage Independent Rate-of-Change-of-Frequency protection element. 1383
Stg8 df/dt+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the eighth stage Independent Rate-of-Change-of-Frequency protection element. 1384
Stg8 f+Df/Dt Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the eighth stage Average Rate-of-Change-of-Frequency protection element. 1385
Stg8 f+Df/Dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the eighth stage Average Rate-of-Change-of-Frequency protection element. 1386
258
Stg8 Block
Programmable Scheme Logic
PSL Output
No response
P14D-B/G/L/Z-TM-EN-1
P14D
Ordinal
Chapter 6 - Voltage & Frequency Protection Functions
Signal Name
Source
Type
Response
Description This DDB signal blocks all eighth stage Frequency protection elements 1389
Stg8 Restore Cls
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal closes the eighth stage Load Restoration 1390
Stg8 Restore Sta
Software
This DDB signal starts the eighth stage Load Restoration 1393
Stg9 f+t Sta
Software
This DDB signal is the start signal for the ninth stage Frequency protection element. 1394
Stg9 f+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the ninth stage Frequency protection element. 1395
Stg9 f+df/dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the ninth stage Frequency-Supervised Rate-of-Change-of-Frequency protection element. 1396
Stg9 df/dt+t Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the ninth stage Independent Rate-of-Change-of-Frequency protection element. 1397
Stg9 df/dt+t Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the ninth stage Independent Rate-of-Change-of-Frequency protection element. 1398
Stg9 f+Df/Dt Sta
Software
PSL Input
Protection event
This DDB signal is the start signal for the ninth stage Average Rate-of-Change-of-Frequency protection element. 1399
Stg9 f+Df/Dt Trp
Software
PSL Input
Protection event
This DDB signal is the trip signal for the ninth stage Average Rate-of-Change-of-Frequency protection element. 1400
Stg9 Block
Programmable Scheme Logic
PSL Output
No response
This DDB signal blocks all ninth stage Frequency protection elements 1403
Stg9 Restore Cls
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Output
No response
PSL Output
No response
This DDB signal closes the ninth stage Load Restoration 1404
Stg9 Restore Sta
Software
This DDB signal starts the ninth stage Load Restoration 1405
Restore Reset
Programmable Scheme Logic
This DDB signal resets all Load Restoration stages 1406
Reset Stats
Programmable Scheme Logic
This DDB signal resets all statistics counters
P14D-B/G/L/Z-TM-EN-1
259
Chapter 6 - Voltage & Frequency Protection Functions
15
P14D
FREQUENCY PROTECTION SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description FREQ PROTECTION
4D
00
This column contains settings for frequency protection. Freq Avg.Cycles
4D
01
5
From 0 to 48 step 1
This setting sets the number of power system cycles that are used to average the frequency measurement. df/dt Avg.Cycles
4D
02
5
From 0 to 48 step 1
This setting sets the number of power system cycles that are used to average the rate of change of frequency measurement. V
4D
03
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the frequency protection elements. V
4D
04
25*V1
From 10*V1 to 120*V1 step 1*V1
This setting sets the pick-up threshold for the undervoltage blocking element. V
4D
05
Phase-Phase
0=Phase-Phase 1=Phase-Neutral
This set determines the mode for the measured input voltage that will be used for the under voltage blocking: phase-to-phase or phase-to-neutral. V
4D
06
Three Phase
0=Any Phase 1=Three Phase
This setting determines whether any one of the phases or all three of the phases has to satisfy the undervoltage criteria before a decision is made. Stage 1
4D
07
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the first stage of frequency protection. Stg 1 f+t Status
4D
08
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 1 f+t Freq
4D
09
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the first stage frequency protection element. Stg 1 f+t Time
4D
0A
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the first stage frequency protection element. df/dt+t 1 Status
4D
0B
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the first stage independent rate of change of frequency protection (df/dt+t). df/dt+t 1 Set
4D
0C
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the first stage. df/dt+t 1 Time
4D
0D
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the first stage rate of change of frequency protection element. f+df/dt 1 Status
4D
0E
Negative
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the first stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 1 Status
4D
0E
Disabled
0=Disabled
This setting disables or determines the tripping direction for the first stage frequency-supervised rate of change of frequency protection (f+df/dt).
260
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description f+df/dt 1 freq
4D
0F
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the first stage frequency-supervised rate of change of frequency protection element. f+df/dt 1 df/dt
4D
10
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the df/dt threshold for the first stage frequency-supervised rate of change of frequency. f+Df/Dt 1 Status
4D
11
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 1 Status
4D
11
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 1 freq
4D
12
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the first stage average rate of change of frequency protection element. f+Df/Dt 1 Dfreq
4D
13
1
From 0.1Hz to 10Hz step 0.01Hz
This setting sets the change in frequency that must be measured in the set time for the first stage average rate of change of frequency protection element. f+Df/Dt 1 Dtime
4D
14
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the first stage average rate of change of frequency protection element. Restore1 Status
4D
15
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the first stage of load restoration. Restore1 Status
4D
15
Disabled
0=Disabled
This setting enables or disables the first stage of load restoration. Restore1 Freq
4D
16
49.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the first stage of load restoration, above which the associated load restoration time can start. Restore1 Time
4D
17
240
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the first stage restoration frequency setting to permit load restoration. Holding Timer 1
4D
18
5
From 1s to 7200s step 1s
This setting sets the holding time of the first stage load restoration. Stg 1 UV Block
4D
19
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the first stage load restoration element. Stage 2
4D
1A
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage of frequency protection. Stg 2 f+t Status
4D
1B
Under
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 2 f+t Freq
4D
1C
48.6
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the second stage frequency protection element. Stg 2 f+t Time
4D
1D
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the second stage frequency protection element.
P14D-B/G/L/Z-TM-EN-1
261
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description df/dt+t 2 Status
4D
1E
Negative
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the second stage independent rate of change of frequency protection (df/dt+t). df/dt+t 2 Set
4D
1F
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the second stage. df/dt+t 2 Time
4D
20
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the second stage rate of change of frequency protection element. f+df/dt 2 Status
4D
21
Negative
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the second stage frequency-supervised rate of change of frequency protection (f+df/ dt). f+df/dt 2 Status
4D
21
Disabled
0=Disabled
This setting disables or determines the tripping direction for the second stage frequency-supervised rate of change of frequency protection (f+df/ dt). f+df/dt 2 freq
4D
22
48.6
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the second stage frequency-supervised rate of change of frequency protection element. f+df/dt 2 df/dt
4D
23
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the df/dt threshold for the second stage frequency-supervised rate of change of frequency. f+Df/Dt 2 Status
4D
24
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt), or disables it for this stage. f+Df/Dt 2 Status
4D
24
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt), or disables it for this stage. f+Df/Dt 2 freq
4D
25
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the second stage average rate of change of frequency protection element. f+Df/Dt 2 Dfreq
4D
26
1
From 0.1Hz to 10Hz step 0.01Hz
This setting sets the change in frequency that must be measured in the set time for the second stage average rate of change of frequency protection element. f+Df/Dt 2 Dtime
4D
27
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the second stage average rate of change of frequency protection element. Restore2 Status
4D
28
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage of load restoration. Restore2 Status
4D
28
Disabled
0=Disabled
This setting enables or disables the second stage of load restoration. Restore2 Freq
4D
29
49.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the second stage of load restoration, above which the associated load restoration time can start. Restore2 Time
4D
2A
180
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the second stage restoration frequency setting to permit load restoration.
262
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description Holding Timer 2
4D
2B
5
From 1s to 7200s step 1s
This setting sets the holding time of the second stage load restoration. Stg 2 UV Block
4D
2C
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the second stage load restoration element. Stage 3
4D
2D
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the third stage of frequency protection. Stg 3 f+t Status
4D
2E
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 3 f+t Freq
4D
2F
48.2
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the third stage frequency protection element. Stg 3 f+t Time
4D
30
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the third stage frequency protection element. df/dt+t 3 Status
4D
31
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the third stage independent rate of change of frequency protection (df/dt+t). df/dt+t 3 Set
4D
32
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the third stage. df/dt+t 3 Time
4D
33
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the third stage rate of change of frequency protection element. f+df/dt 3 Status
4D
34
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the third stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 3 Status
4D
34
Disabled
0=Disabled
This setting disables or determines the tripping direction for the third stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 3 freq
4D
35
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the third stage frequency-supervised rate of change of frequency protection element. f+df/dt 3 df/dt
4D
36
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the df/dt threshold for the third stage frequency-supervised rate of change of frequency. f+Df/Dt 3 Status
4D
37
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 3 Status
4D
37
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 3 freq
4D
38
48.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the third stage average rate of change of frequency protection element. f+Df/Dt 3 Dfreq
4D
P14D-B/G/L/Z-TM-EN-1
39
1
From 0.1Hz to 10Hz step 0.01Hz
263
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting sets the change in frequency that must be measured in the set time for the third stage average rate of change of frequency protection element. f+Df/Dt 3 Dtime
4D
3A
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the third stage average rate of change of frequency protection element. Restore3 Status
4D
3B
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the third stage of load restoration. Restore3 Status
4D
3B
Disabled
0=Disabled
This setting enables or disables the third stage of load restoration. Restore3 Freq
4D
3C
49.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the third stage of load restoration, above which the associated load restoration time can start. Restore3 Time
4D
3D
120
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the third stage restoration frequency setting to permit load restoration. Holding Timer 3
4D
3E
5
From 1s to 7200s step 1s
This setting sets the holding time of the third stage load restoration. Stg 3 UV Block
4D
3F
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the third stage load restoration element. Stage 4
4D
40
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the fourth stage of frequency protection. Stg 4 f+t Status
4D
41
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 4 f+t Freq
4D
42
47.8
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the fourth stage frequency protection element. Stg 4 f+t Time
4D
43
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the fourth stage frequency protection element. df/dt+t 4 Status
4D
44
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the fourth stage independent rate of change of frequency protection (df/dt+t). df/dt+t 4 Set
4D
45
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the fourth stage. df/dt+t 4 Time
4D
46
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the fourth stage rate of change of frequency protection element. f+df/dt 4 Status
4D
47
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the fourth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 4 Status
4D
47
Disabled
0=Disabled
This setting disables or determines the tripping direction for the fourth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 4 freq
4D
48
47.8
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the fourth stage frequency-supervised rate of change of frequency protection element.
264
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description f+df/dt 4 df/dt
4D
49
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the df/dt threshold for the fourth stage frequency-supervised rate of change of frequency. f+Df/Dt 4 Status
4D
4A
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 4 Status
4D
4A
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 4 freq
4D
4B
48.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the fourth stage average rate of change of frequency protection element. f+Df/Dt 4 Dfreq
4D
4C
1
From 0.1Hz to 10Hz step 0.01Hz
This setting sets the change in frequency that must be measured in the set time for the fourth stage average rate of change of frequency protection element. f+Df/Dt 4 Dtime
4D
4D
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the fourth stage average rate of change of frequency protection element. Restore4 Status
4D
4E
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the fourth stage of load restoration. Restore4 Status
4D
4E
Disabled
0=Disabled
This setting enables or disables the fourth stage of load restoration. Restore4 Freq
4D
4F
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the fourth stage of load restoration, above which the associated load restoration time can start. Restore4 Time
4D
50
240
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the fourth stage restoration frequency setting to permit load restoration. Holding Timer 4
4D
51
5
From 1s to 7200s step 1s
This setting sets the holding time of the fourth stage load restoration. Stg 4 UV Block
4D
52
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the fourth stage load restoration element. Stage 5
4D
53
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the fifth stage of frequency protection. Stg 5 f+t Status
4D
54
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 5 f+t Freq
4D
55
47.4
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the fifth stage frequency protection element. Stg 5 f+t Time
4D
56
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the fifth stage frequency protection element. df/dt+t 5 Status
4D
57
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the fifth stage independent rate of change of frequency protection (df/dt+t).
P14D-B/G/L/Z-TM-EN-1
265
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description df/dt+t 5 Set
4D
58
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the fifth stage. df/dt+t 5 Time
4D
59
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the fifth stage rate of change of frequency protection element. f+df/dt 5 Status
4D
5A
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the fifth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 5 Status
4D
5A
Disabled
0=Disabled
This setting disables or determines the tripping direction for the fifth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 5 freq
4D
5B
47.4
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the fifth stage frequency-supervised rate of change of frequency protection element. f+df/dt 5 df/dt
4D
5C
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the df/dt threshold for the fifth stage frequency-supervised rate of change of frequency. f+Df/Dt 5 Status
4D
5D
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 5 Status
4D
5D
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 5 freq
4D
5E
48
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the fifth stage average rate of change of frequency protection element. f+Df/Dt 5 Dfreq
4D
5F
1
From 0.1Hz to 10Hz step 0.01Hz
This setting sets the change in frequency that must be measured in the set time for the fifth stage average rate of change of frequency protection element. f+Df/Dt 5 Dtime
4D
60
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the fifth stage average rate of change of frequency protection element. Restore5 Status
4D
61
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the fifth stage of load restoration. Restore5 Status
4D
61
Disabled
0=Disabled
This setting enables or disables the fifth stage of load restoration. Restore5 Freq
4D
62
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the fifth stage of load restoration, above which the associated load restoration time can start. Restore5 Time
4D
63
180
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the fifth stage restoration frequency setting to permit load restoration. Holding Timer 5
4D
64
5
From 1s to 7200s step 1s
This setting sets the holding time of the fifth stage load restoration. Stg 5 UV Block
4D
65
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the fifth stage load restoration element. Stage 6
266
4D
66
Disabled
0 = Disabled or 1 = Enabled
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description This setting enables or disables the sixth stage of frequency protection. Stg 6 f+t Status
4D
67
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 6 f+t Freq
4D
68
47
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the sixth stage frequency protection element. Stg 6 f+t Time
4D
69
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the sixth stage frequency protection element. df/dt+t 6 Status
4D
6A
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting determines the tripping direction for the sixth stage of dv/dt element - either disabled, for a rising frequency (positive), or a falling frequency (negative) for the sixth stage independent rate of change of frequency protection (df/dt+t). df/dt+t 6 Set
4D
6B
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the sixth stage. df/dt+t 6 Time
4D
6C
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the sixth stage rate of change of frequency protection element. f+df/dt 6 Status
4D
6D
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the sixth stage independent rate of change of frequency protection (df/dt+t). f+df/dt 6 Status
4D
6D
Disabled
0=Disabled
This setting sets the rate of change of frequency threshold for the sixth stage. f+df/dt 6 freq
4D
6E
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the operating time delay for the sixth stage rate of change of frequency protection element. f+df/dt 6 df/dt
4D
6F
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting disables or determines the tripping direction for the sixth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+Df/Dt 6 Status
4D
70
Disabled
0=Disabled 1=Under 2=Over
This setting disables or determines the tripping direction for the sixth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+Df/Dt 6 Status
4D
70
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 6 freq
4D
71
48
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the sixth stage average rate of change of frequency protection element. f+Df/Dt 6 Dfreq
4D
72
1
From 0.1Hz to 10Hz step 0.01Hz
This setting sets the change in frequency that must be measured in the set time for the sixth stage average rate of change of frequency protection element. f+Df/Dt 6 Dtime
4D
73
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the sixth stage average rate of change of frequency protection element. Restore6 Status
4D
P14D-B/G/L/Z-TM-EN-1
74
Disabled
0 = Disabled or 1 = Enabled
267
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting enables or disables the sixth stage of load restoration. Restore6 Status
4D
74
Disabled
0=Disabled
This setting enables or disables the sixth stage of load restoration. Restore6 Freq
4D
75
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the sixth stage of load restoration, above which the associated load restoration time can start. Restore6 Time
4D
76
120
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the sixth stage restoration frequency setting to permit load restoration. Holding Timer 6
4D
77
5
From 1s to 7200s step 1s
This setting sets the holding time of the sixth stage load restoration. Stg 6 UV Block
4D
78
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the sixth stage load restoration element. Stage 7
4D
79
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the seventh stage of frequency protection. Stg 7 f+t Status
4D
7A
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 7 f+t Freq
4D
7B
46.6
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the seventh stage frequency protection element. Stg 7 f+t Time
4D
7C
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the seventh stage frequency protection element. df/dt+t 7 Status
4D
7D
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the seventh stage independent rate of change of frequency protection (df/dt+t). df/dt+t 7 Set
4D
7E
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the seventh stage. df/dt+t 7 Time
4D
7F
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the seventh stage rate of change of frequency protection element. f+df/dt 7 Status
4D
80
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the seventh stage frequency-supervised rate of change of frequency protection (f+df/ dt). f+df/dt 7 Status
4D
80
Disabled
0=Disabled
This setting disables or determines the tripping direction for the seventh stage frequency-supervised rate of change of frequency protection (f+df/ dt). f+df/dt 7 freq
4D
81
46.6
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the seventh stage frequency-supervised rate of change of frequency protection element. f+df/dt 7 df/dt
4D
82
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the df/dt threshold for the seventh stage frequency-supervised rate of change of frequency.
268
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description f+Df/Dt 7 Status
4D
83
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 7 Status
4D
83
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 7 freq
4D
84
47.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the seventh stage average rate of change of frequency protection element. f+Df/Dt 7 Dfreq
4D
85
1
From 0.1Hz to 10Hz step 0.01Hz
This setting sets the change in frequency that must be measured in the set time for the seventh stage average rate of change of frequency protection element. f+Df/Dt 7 Dtime
4D
86
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the seventh stage average rate of change of frequency protection element. Restore7 Status
4D
87
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the seventh stage of load restoration. Restore7 Status
4D
87
Disabled
0=Disabled
This setting enables or disables the seventh stage of load restoration. Restore7 Freq
4D
88
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the seventh stage of load restoration, above which the associated load restoration time can start. Restore7 Time
4D
89
100
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the seventh stage restoration frequency setting to permit load restoration. Holding Timer 7
4D
8A
5
From 1s to 7200s step 1s
This setting sets the holding time of the seventh stage load restoration. Stg 7 UV Block
4D
8B
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the seventh stage load restoration element. Stage 8
4D
8C
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the eighth stage of frequency protection. Stg 8 f+t Status
4D
8D
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 8 f+t Freq
4D
8E
50.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the eighth stage frequency protection element. Stg 8 f+t Time
4D
8F
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the eighth stage frequency protection element. df/dt+t 8 Status
4D
90
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the eighth stage independent rate of change of frequency protection (df/dt+t). df/dt+t 8 Set
4D
91
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the eighth stage.
P14D-B/G/L/Z-TM-EN-1
269
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description df/dt+t 8 Time
4D
92
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the eighth stage rate of change of frequency protection element. f+df/dt 8 Status
4D
93
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the eighth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 8 Status
4D
93
Disabled
0=Disabled
This setting disables or determines the tripping direction for the eighth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 8 freq
4D
94
50.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the eighth stage frequency-supervised rate of change of frequency protection element. f+df/dt 8 df/dt
4D
95
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the df/dt threshold for the eighth stage frequency-supervised rate of change of frequency. f+Df/Dt 8 Status
4D
96
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 8 Status
4D
96
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 8 freq
4D
97
50.5
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the eighth stage average rate of change of frequency protection element. f+Df/Dt 8 Dfreq
4D
98
1
From 0.1Hz to 10Hz step 0.01Hz
This setting sets the change in frequency that must be measured in the set time for the eighth stage average rate of change of frequency protection element. f+Df/Dt 8 Dtime
4D
99
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the eighth stage average rate of change of frequency protection element. Restore8 Status
4D
9A
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the eighth stage of load restoration. Restore8 Status
4D
9A
Disabled
0=Disabled
This setting enables or disables the eighth stage of load restoration. Restore8 Freq
4D
9B
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the eighth stage of load restoration, above which the associated load restoration time can start. Restore8 Time
4D
9C
80
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the eighth stage restoration frequency setting to permit load restoration. Holding Timer 8
4D
9D
5
From 1s to 7200s step 1s
This setting sets the holding time of the eighth stage load restoration. Stg 8 UV Block
4D
9E
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the eighth stage load restoration element. Stage 9
4D
9F
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the ninth stage of frequency protection.
270
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description Stg 9 f+t Status
4D
A0
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection, or disables it for this stage. Stg 9 f+t Freq
4D
A1
51
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the ninth stage frequency protection element. Stg 9 f+t Time
4D
A2
2
From 0s to 100s step 0.01s
This setting sets the operating time delay for the ninth stage frequency protection element. df/dt+t 9 Status
4D
A3
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the ninth stage independent rate of change of frequency protection (df/dt+t). df/dt+t 9 Set
4D
A4
2
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the rate of change of frequency threshold for the ninth stage. df/dt+t 9 Time
4D
A5
0.5
From 0s to 100s step 0.01s
This setting sets the operating time delay for the ninth stage rate of change of frequency protection element. f+df/dt 9 Status
4D
A6
Disabled
0=Disabled 1=Negative 2=Positive 3=Both
This setting disables or determines the tripping direction for the ninth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 9 Status
4D
A6
Disabled
0=Disabled
This setting disables or determines the tripping direction for the ninth stage frequency-supervised rate of change of frequency protection (f+df/dt). f+df/dt 9 freq
4D
A7
51
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up threshold for the ninth stage frequency-supervised rate of change of frequency protection element. f+df/dt 9 df/dt
4D
A8
1
From 0.01Hz/s to 10Hz/s step 0.01Hz/s
This setting sets the df/dt threshold for the ninth stage frequency-supervised rate of change of frequency. f+Df/Dt 9 Status
4D
A9
Disabled
0=Disabled 1=Under 2=Over
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 9 Status
4D
A9
Disabled
0=Disabled
This setting selects either underfrequency or overfrequency protection for the average rate of change of frequency (Df/Dt)y, or disables it for this stage. f+Df/Dt 9 freq
4D
AA
51
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the ninth stage average rate of change of frequency protection element. f+Df/Dt 9 Dfreq
4D
AB
1
From 0.1Hz to 10Hz step 0.01Hz
This setting sets the change in frequency that must be measured in the set time for the ninth stage average rate of change of frequency protection element. f+Df/Dt 9 Dtime
4D
AC
0.5
From 0.02s to 100s step 0.01s
This setting sets the time period in which an excessive change in frequency must be measured for the ninth stage average rate of change of frequency protection element. Restore9 Status
4D
AD
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the ninth stage of load restoration.
P14D-B/G/L/Z-TM-EN-1
271
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description Restore9 Status
4D
AD
Disabled
0 = Disabled
This setting enables or disables the ninth stage of load restoration. Restore9 Freq
4D
AE
49
From 40.1Hz to 69.9Hz step 0.01Hz
This setting sets the pick-up trheshold for the ninth stage of load restoration, above which the associated load restoration time can start. Restore9 Time
4D
AF
60
From 0s to 7200s step 0.25s
This setting sets the time period for which the measured frequency must be higher than the ninth stage restoration frequency setting to permit load restoration. Holding Timer 9
4D
B0
5
From 1s to 7200s step 1s
This setting sets the holding time of the ninth stage load restoration. Stg 9 UV Block
4D
B1
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the undervoltage blocking of the ninth stage load restoration element.
272
P14D-B/G/L/Z-TM-EN-1
P14D
16
Chapter 6 - Voltage & Frequency Protection Functions
FREQUENCY STATISTICS
Menu Text
Col
Row
Default Setting
Available Options
Description FREQUENCY STAT 05
00
This column contains frequency protection statistical parameters Stg1 f+t Sta
05
01
Not Settable
02
Not Settable
03
Not Settable
04
Not Settable
Number of f+t starts for Stage 1 Stg1 f+t Trp
05
Number of f+t trips for Stage 1 Stg1 f+df/dt Trp
05
Number of f+df/dt trips for Stage 1 Stg1 df/dt+t Sta
05
Number of df/dt+t starts for Stage 1 Stg1 df/dt+t Trp
05
05
Not Settable
06
Not Settable
Number of df/dt trips for Stage 1 Stg1 f+Df/Dt Sta
05
Number of f+DF/DT starts for Stage 1 Stg1 f+Df/Dt Trp
05
07
Not Settable
Number of f+DF/DT trips for Stage 1 Stg1 Revn Date
05
08
Not Settable
0A
Not Settable
0B
Not Settable
0C
Not Settable
0D
Not Settable
Stage 1 Revision Date Stg2 f+t Sta
05
Number of f+t starts for Stage 2 Stg2 f+t Trp
05
Number of f+t trips for Stage 2 Stg2 f+df/dt Trp
05
Number of f+df/dt trips for Stage 2 Stg2 df/dt+t Sta
05
Number of df/dt+t starts for Stage 2 Stg2 df/dt+t Trp
05
0E
Not Settable
0F
Not Settable
Number of df/dt trips for Stage 2 Stg2 f+Df/Dt Sta
05
Number of f+DF/DT starts for Stage 2 Stg2 f+Df/Dt Trp
05
10
Not Settable
Number of f+DF/DT trips for Stage 2 Stg2 Revn Date
05
11
Not Settable
13
Not Settable
14
Not Settable
15
Not Settable
Stage 2 Revision Date Stg3 f+t Sta
05
Number of f+t starts for Stage 3 Stg3 f+t Trp
05
Number of f+t trips for Stage 3 Stg3 f+df/dt Trp
05
Number of f+df/dt trips for Stage 3
P14D-B/G/L/Z-TM-EN-1
273
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description Stg3 df/dt+t Sta
05
16
Not Settable
Number of df/dt+t starts for Stage 3 Stg3 df/dt+t Trp
05
17
Not Settable
18
Not Settable
Number of df/dt trips for Stage 3 Stg3 f+Df/Dt Sta
05
Number of f+DF/DT starts for Stage 3 Stg3 f+Df/Dt Trp
05
19
Not Settable
Number of f+DF/DT trips for Stage 3 Stg3 Revn Date
05
1A
Not Settable
1C
Not Settable
1D
Not Settable
1E
Not Settable
1F
Not Settable
Stage 3 Revision Date Stg4 f+t Sta
05
Number of f+t starts for Stage 4 Stg4 f+t Trp
05
Number of f+t trips for Stage 4 Stg4 f+df/dt Trp
05
Number of f+df/dt trips for Stage 4 Stg4 df/dt+t Sta
05
Number of df/dt+t starts for Stage 4 Stg4 df/dt+t Trp
05
20
Not Settable
21
Not Settable
Number of df/dt trips for Stage 4 Stg4 f+Df/Dt Sta
05
Number of f+DF/DT starts for Stage 4 Stg4 f+Df/Dt Trp
05
22
Not Settable
Number of f+DF/DT trips for Stage 4 Stg4 Revn Date
05
23
Not Settable
25
Not Settable
26
Not Settable
27
Not Settable
28
Not Settable
Stage 4 Revision Date Stg5 f+t Sta
05
Number of f+t starts for Stage 5 Stg5 f+t Trp
05
Number of f+t trips for Stage 5 Stg5 f+df/dt Trp
05
Number of f+df/dt trips for Stage 5 Stg5 df/dt+t Sta
05
Number of df/dt+t starts for Stage 5 Stg5 df/dt+t Trp
05
29
Not Settable
2A
Not Settable
Number of df/dt trips for Stage 5 Stg5 f+Df/Dt Sta
05
Number of f+DF/DT starts for Stage 5 Stg5 f+Df/Dt Trp
05
2B
Not Settable
Number of f+DF/DT trips for Stage 5 Stg5 Revn Date
05
2C
Not Settable
Stage 5 Revision Date
274
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description Stg6 f+t Sta
05
2E
Not Settable
2F
Not Settable
30
Not Settable
31
Not Settable
Number of f+t starts for Stage 6 Stg6 f+t Trp
05
Number of f+t trips for Stage 6 Stg6 f+df/dt Trp
05
Number of f+df/dt trips for Stage 6 Stg6 df/dt+t Sta
05
Number of df/dt+t starts for Stage 6 Stg6 df/dt+t Trp
05
32
Not Settable
33
Not Settable
Number of df/dt trips for Stage 6 Stg6 f+Df/Dt Sta
05
Number of f+DF/DT starts for Stage 6 Stg6 f+Df/Dt Trp
05
34
Not Settable
Number of f+DF/DT trips for Stage 6 Stg6 Revn Date
05
35
Not Settable
37
Not Settable
38
Not Settable
39
Not Settable
3A
Not Settable
Stage 6 Revision Date Stg7 f+t Sta
05
Number of f+t starts for Stage 7 Stg7 f+t Trp
05
Number of f+t trips for Stage 7 Stg7 f+df/dt Trp
05
Number of f+df/dt trips for Stage 7 Stg7 df/dt+t Sta
05
Number of df/dt+t starts for Stage 7 Stg7 df/dt+t Trp
05
3B
Not Settable
3C
Not Settable
Number of df/dt trips for Stage 7 Stg7 f+Df/Dt Sta
05
Number of f+DF/DT starts for Stage 7 Stg7 f+Df/Dt Trp
05
3D
Not Settable
Number of f+DF/DT trips for Stage 7 Stg7 Revn Date
05
3E
Not Settable
40
Not Settable
41
Not Settable
42
Not Settable
43
Not Settable
Stage 7 Revision Date Stg8 f+t Sta
05
Number of f+t starts for Stage 8 Stg8 f+t Trp
05
Number of f+t trips for Stage 8 Stg8 f+df/dt Trp
05
Number of f+df/dt trips for Stage 8 Stg8 df/dt+t Sta
05
Number of df/dt+t starts for Stage 8 Stg8 df/dt+t Trp
05
44
Not Settable
Number of df/dt trips for Stage 8
P14D-B/G/L/Z-TM-EN-1
275
Chapter 6 - Voltage & Frequency Protection Functions
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description Stg8 f+Df/Dt Sta
05
45
Not Settable
Number of f+DF/DT starts for Stage 8 Stg8 f+Df/Dt Trp
05
46
Not Settable
Number of f+DF/DT trips for Stage 8 Stg8 Revn Date
05
47
Not Settable
49
Not Settable
4A
Not Settable
4B
Not Settable
4C
Not Settable
Stage 8 Revision Date Stg9 f+t Sta
05
Number of f+t starts for Stage 9 Stg9 f+t Trp
05
Number of f+t trips for Stage 9 Stg9 f+df/dt Trp
05
Number of f+df/dt trips for Stage 9 Stg9 df/dt+t Sta
05
Number of df/dt+t starts for Stage 9 Stg9 df/dt+t Trp
05
4D
Not Settable
4E
Not Settable
Number of df/dt trips for Stage 9 Stg9 f+Df/Dt Sta
05
Number of f+DF/DT starts for Stage 9 Stg9 f+Df/Dt Trp
05
4F
Not Settable
Number of f+DF/DT trips for Stage 9 Stg9 Revn Date
05
50
Not Settable
52
0=No Operation 1=All 2=Stage 1 3=Stage 2 4=Stage 3 5=Stage 4 6=Stage 5 7=Stage 6 8=Stage 7 9=Stage 8 10=Stage 9
Stage 9 Revision Date
Reset Statistics
05
No Operation
This command resets the statistics on a stage by stage basis or for all stages at once
276
P14D-B/G/L/Z-TM-EN-1
POWER PROTECTION FUNCTIONS CHAPTER 7
Chapter 7 - Power Protection Functions
278
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 7 - Power Protection Functions
CHAPTER OVERVIEW
Power protection is used for protecting generators. The described product provides basic power protection for small distributed generators, typically less than 2 MW. This chapter contains the following sections: Chapter Overview Overpower Protection Underpower Protection Sensitive Power Protection
279 280 286 291
P14D-B/G/L/Z-TM-EN-1
279
Chapter 7 - Power Protection Functions
2
P14D
OVERPOWER PROTECTION
With Overpower, we should consider two distinct conditions: Forward Overpower and Reverse Overpower. A forward overpower condition occurs when the system load becomes excessive. A generator is rated to supply a certain amount of power and if it attempts to supply power to the system greater than its rated capacity, it could be damaged. Therefore overpower protection in the forward direction can be used as an overload indication. It can also be used as back-up protection for failure of governor and control equipment. Generally the Overpower protection element would be set above the maximum power rating of the machine. A reverse overpower condition occurs if the generator prime mover fails. When this happens, the power system may supply power to the generator, causing it to motor. This reversal of power flow due to loss of prime mover can be very damaging and it is important to be able to detect this with a Reverse Overpower element.
2.1
OVERPOWER PROTECTION IMPLEMENTATION
Overpower Protection is implemented in the POWER PROTECTION column of the relevant settings group, under the sub-heading OVERPOWER. The Overpower Protection element provides 2 stages of directional overpower for both active and reactive power. The directional element can be configured as forward or reverse and can activate single-phase or three-phase trips. The elements use three-phase power and single phase power measurements as the energising quantities. A Start condition occurs when two consecutive measurements exceed the setting threshold. A trip condition occurs if the Start condition is present for the set time delay. This can be inhibited by the VTS Slow Block and Pole Dead logic if desired. The Start and Trip timer resets if the power falls below the drop-off level or if an inhibit condition occurs. The reset mechanism is similar to the overcurrent functionality for a pecking fault condition, where the percentage of elapsed time for the operate timer is memorised for a set reset time delay. If the Start condition returns before the reset timer has timed out, the operate time initialises from the memorised travel value. Otherwise the memorised value is reset to zero after the reset time times out.
280
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 7 - Power Protection Functions
2.2
OVERPOWER LOGIC Power>(n) (phase) Start
P(A, B, or C)
DT
&
Power>(n) 1Ph Watt
1
&
Power>(n) 1Ph VAR
Power>(n) TimeDelay
Power>(n) Mode Active
Power>(n) (phase) Trip
-1
&
X
Reactive
Power>(n) 3PhStart
P(3 phase)
DT
Power>(n) 3Ph Watt
&
1
&
Power>(n) 3PhTrip
Power>(n) 3Ph VAR Power>(n) TimeDelay
Power>(n) Mode Active
-1
&
X
Key: Energising Quanitity
Reactive
AND gate
&
OR gate
1
External DDB Signal
Power>(n) Direction Forward
Setting cell
Reverse
Setting value Timer
Power>(n) Status Comparator for overvalues
Enabled
Switch
VTS Slow Block
Direction reversal (-1 multiplier)
V00900
-1
X
Figure 86: Overpower logic
2.3 Ordinal
OVERPOWER DDB SIGNALS Signal Name
Source
Type
Response
Description 351
VTS Slow Block
Software
PSL Input
No response
This DDB signal is a purposely delayed output from the VTS which can block other functions 722
Power>1 3PhStart
Software
PSL Input
Protection event
This DDB signal is the first stage three-phase Phase Overpower start signal 723
Power>1 A Start
Software
PSL Input
Protection event
This DDB signal is the first stage A-phase Phase Overpower start signal 724
Power>1 B Start
Software
PSL Input
Protection event
This DDB signal is the first stage B-phase Phase Overpower start signal 725
Power>1 C Start
Software
PSL Input
Protection event
This DDB signal is the first stage C-phase Phase Overpower start signal 726
Power>2 3PhStart
Software
PSL Input
Protection event
This DDB signal is the second stage three-phase Phase Overpower start signal 727
Power>2 A Start
Software
PSL Input
Protection event
This DDB signal is the second stage A-phase Phase Overpower start signal 728
Power>2 B Start
Software
PSL Input
Protection event
This DDB signal is the second stage B-phase Phase Overpower start signal
P14D-B/G/L/Z-TM-EN-1
281
Chapter 7 - Power Protection Functions
Ordinal
Signal Name
P14D
Source
Type
Response
Description 729
Power>2 C Start
Software
PSL Input
Protection event
This DDB signal is the second stage C-phase Phase Overpower start signal 738
Power>1 3Ph Trip
Software
PSL Input
Protection event
This DDB signal is the first stage three-phase Phase Overpower trip signal 739
Power>1 A Trip
Software
PSL Input
Protection event
This DDB signal is the first stage A-phase Phase Overpower trip signal 740
Power>1 B Trip
Software
PSL Input
Protection event
This DDB signal is the first stage B-phase Phase Overpower trip signal 741
Power>1 C Trip
Software
PSL Input
Protection event
This DDB signal is the first stage C-phase Phase Overpower trip signal 742
Power>2 3Ph Trip
Software
PSL Input
Protection event
This DDB signal is the second stage three-phase Phase Overpower trip signal 743
Power>2 A Trip
Software
PSL Input
Protection event
This DDB signal is the second stage A-phase Phase Overpower trip signal 744
Power>2 B Trip
Software
PSL Input
Protection event
This DDB signal is the second stage B-phase Phase Overpower trip signal 745
Power>2 C Trip
Software
PSL Input
Protection event
This DDB signal is the second stage C-phase Phase Overpower trip signal 754
Power>1 Block
Programmable Scheme PSL Output Logic
Protection event
This DDB signal blocks the first stage Overpower protection 755
Power>2 Block
Programmable Scheme PSL Output Logic
Protection event
This DDB signal blocks the second stage Overpower protection
2.4
OVERPOWER SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 POWER PROTECTION
41
00
This column contains settings for Power protection OVER POWER
41
01
The settings under this sub-heading relate to Overpower Power>1 Status
41
02
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the first stage Overpower protection. Power>1Direction
41
03
Forward
0=Reverse 1=Forward
This setting determines the direction of the first stage Overpower element. Power>1 Mode
41
04
Active
0=Active 1=Reactive
There are two operation modes; Active or Reactive. This setting determines which mode is to be used for the first stage Overpower element. Power>1TimeDelay
41
05
1
From 0s to 100s step 0.01s
This setting sets the operate time delay setting for the first stage Overpower element.
282
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 7 - Power Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description Power>1 tRESET
41
06
0
From 0s to 100s step 0.01s
This setting sets the time delay for the first stage Overpower element. Power>1 1Ph Watt
41
07
40
From 1 to 325 step 1
This setting sets the pick-up threshold for the single-phase Overpower element for the 'Active' mode. Power>1 1Ph VAr
41
08
24
From 1 to 325 step 1
This setting sets the pick-up threshold of the single-phase Overpower element for the 'Reactive' mode. Power>1 3Ph Watt
41
09
120
From 1 to 325 step 1
This setting sets the pick-up threshold for the three-phase Overpower element for the 'Active' mode. Power>1 3Ph VAr
41
0A
72
From 1 to 325 step 1
This setting sets the pick-up threshold of the three-phase Overpower element for the 'Reactive' mode. Power>2 Status
41
0B
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage Overpower protection. Power>2Direction
41
0C
Forward
0=Reverse 1=Forward
This setting determines the direction of the second stage Overpower element. Power>2 Mode
41
0D
Active
0=Active 1=Reactive
There are two operation modes; Active or Reactive. This setting determines which mode is to be used for the second stage Overpower element. Power>2TimeDelay
41
0E
1
From 0s to 100s step 0.01s
This setting sets the operate time delay setting for the second stage Overpower element. Power>2 tRESET
41
0F
0
From 0s to 100s step 0.01s
This setting sets the time delay for the second stage Overpower element. Power>2 1Ph Watt
41
10
40
From 1 to 325 step 1
This setting sets the pick-up threshold for the single-phase Overpower element for the 'Active' mode. Power>2 1Ph VAr
41
11
24
From 1 to 325 step 1
This setting sets the pick-up threshold of the single-phase Overpower element for the 'Reactive' mode. Power>2 3Ph Watt
41
12
120
From 1 to 325 step 1
This setting sets the pick-up threshold for the three-phase Overpower element for the 'Active' mode. Power>2 3Ph VAr
41
13
72
From 1 to 325 step 1
This setting sets the pick-up threshold of the three-phase Overpower element for the 'Reactive' mode.
2.5
APPLICATION NOTES
2.5.1
FORWARD OVERPOWER SETTING GUIDELINES
The relevant power threshold settings should be set greater than the machine full load rated power. The operating mode should be set to Forward. A time delay setting (Power>(n) TimeDelay) should be applied. This setting is dependant on the application, but would typically be around 5 seconds. The delay on the reset timer (Power>(n) tRESET), would normally be set to zero.
2.5.2
REVERSE POWER CONSIDERATIONS
A generator is expected to supply power to the connected system in normal operation. If the generator prime mover fails, it will begin to motor (if the power system to which it is connected has other generating sources).
P14D-B/G/L/Z-TM-EN-1
283
Chapter 7 - Power Protection Functions
P14D
The consequences of generator motoring and the level of power drawn from the power system will be dependent on the type of prime mover. Typical levels of motoring power and possible motoring damage that could occur for various types of generating plant are given in the following table. Prime mover Diesel Engine
Motoring power 5% - 25%
Possible damage (percentage rating) Risk of fire or explosion from unburned fuel
Motoring level depends on compression ratio and cylinder bore stiffness. Rapid disconnection is required to limit power loss and risk of damage. 10% - 15% (Split-shaft) >50% (Single-shaft)
Gas Turbine
With some gear-driven sets, damage may arise due to reverse torque on gear teeth.
Compressor load on single shaft machines leads to a high motoring power compared to split-shaft machines. Rapid disconnection is required to limit power loss or damage. Hydraulic Turbines
0.2 - >2% (Blades out of water) >2.0% (Blades in water)
Blade and runner damage may occur with a long period of motoring
Power is low when blades are above tail-race water level. Hydraulic flow detection devices are often the main means of detecting loss of drive. Automatic disconnection is recommended for unattended operation. Steam Turbines
0.5% - 3% (Condensing sets) 3% - 6% (Non-condensing sets)
Thermal stress damage may be inflicted on lowpressure turbine blades when steam flow is not available to dissipate losses due to air resistance.
Damage may occur rapidly with non-condensing sets or when vacuum is lost with condensing sets. Reverse power protection may be used as a secondary method of detection and might only be used to raise an alarm.
In some applications, the level of reverse power in the case of prime mover failure may fluctuate. This may be the case for a failed diesel engine. To prevent cyclic initiation and reset of the main trip timer, an adjustable reset time delay is provided. You will need to set this time delay longer than the period for which the reverse power could fall below the power setting. This setting needs to be taken into when setting the main trip time delay. Note: A delay in excess of half the period of any system power swings could result in operation of the reverse power protection during swings.
2.5.3
REVERSE OVERPOWER SETTING GUIDELINES
Each stage of power protection can be selected to operate as a reverse power stage by selecting the Power>(n) Direction cell to 'Reverse'. The relevant power threshold settings should be set to less than 50% of the motoring power. The operating mode should be set to Reverse. The reverse power protection function should be time-delayed to prevent false trips or alarms being given during power system disturbances or following synchronisation. A time delay setting, of approximately 5 s would be typically applied. The delay on the reset timer, Power>1 tRESET or Power>2 tRESET, would normally be set to zero. When settings of greater than zero are used for the reset time delay, the pick-up time delay setting may need to be increased to ensure that false tripping does not result in the event of a stable power swinging event. Reverse overpower protection can also be used for loss of mains applications. If the distributed generator is connected to the grid but not allowed to export power to the grid, it is possible to use reverse power
284
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 7 - Power Protection Functions
detection to switch off the generator. In this case, the threshold setting should be set to a sensitive value, typically less than 2% of the rated power. It should also be time-delayed to prevent false trips or alarms being given during power system disturbances, or following synchronisation. A typical time delay is 5 seconds.
P14D-B/G/L/Z-TM-EN-1
285
Chapter 7 - Power Protection Functions
3
P14D
UNDERPOWER PROTECTION
Although the Underpower protection is directional and can be configured as forward or reverse, the most common application is for Low Forward Power protection. When a machine is generating and the circuit breaker connecting the generator to the system is tripped, the electrical load on the generator is cut off. This could lead to overspeeding of the generator if the mechanical input power is not reduced quickly. Large turbo-alternators, with low-inertia rotor designs, do not have a high over speed tolerance. Trapped steam in a turbine, downstream of a valve that has just closed, can rapidly lead to over speed. To reduce the risk of over speed damage, it may be desirable to interlock tripping of the circuit breaker and the mechanical input with a low forward power check. This ensures that the generator circuit breaker is opened only after the mechanical input to the prime mover has been removed, and the output power has reduced enough such that overspeeding is unlikely. This delay in tripping the circuit breaker may be acceptable for non-urgent protection trips (e.g. stator earth fault protection for a high impedance earthed generator). For urgent trips however (e.g. stator current differential protection), this Low Forward Power interlock should not be used.
3.1
UNDERPOWER PROTECTION IMPLEMENTATION
Underpower Protection is implemented in the POWER PROTECTION column of the relevant settings group, under the sub-heading UNDERPOWER. The UNDERPOWER Protection element provides 2 stages of directional underpower for both active and reactive power. The directional element can be configured as forward or reverse and can activate singlephase or three-phase trips. The elements use three-phase power and single phase power measurements as the energising quantity. A start condition occurs when two consecutive measurements fall below the setting threshold. A trip condition occurs if the start condition is present for the set trip time. This can be inhibited by the VTS slow block and pole dead logic if desired. The Start and Trip timer resets if the power exceeds the drop-off level or if an inhibit condition occurs. The reset mechanism is similar to the overcurrent functionality for a pecking fault condition, where the percentage of elapsed time for the operate timer is memorised for a set reset time delay. If the Start condition returns before the reset timer has timed out, the operate time initialises from the memorised travel value. Otherwise the memorised value is reset to zero after the reset time times out.
286
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 7 - Power Protection Functions
3.2
UNDERPOWER LOGIC Power<(n) (phase) Start
P(A, B, or C)
DT
&
Power<(n) 1Ph Watt
1
&
Power<(n) 1Ph VAR
Power>(n) TimeDelay
Power<(n) Mode Active
Power<(n) (phase) Trip
&
X
-1
Reactive
Power<(n) 3PhStart
P(3 phase)
DT
Power<(n) 3Ph Watt
&
1
&
Power<(n) 3PhTrip
Power<(n) 3Ph VAR Power>(n) TimeDelay
Power<(n) Mode Active
&
X
-1
Reactive
Power<(n) Direction Key: Energising Quanitity
Forward Reverse
Power<1 Status
Setting cell
Enabled
All Poles Dead V<(n) Poledead Inh
AND gate
&
OR gate
1
External DDB Signal
Setting value &
Timer 1
Enabled
Comparator for undervalues
VTS Slow Block
Switch Direction reversal (-1 multiplier)
V00901
-1
X
Figure 87: Underpower logic
3.3 Ordinal
UNDERPOWER DDB SIGNALS Signal Name
Source
Type
Response
Description 351
VTS Slow Block
Software
PSL Input
No response
This DDB signal is a purposely delayed output from the VTS which can block other functions 380
All Poles Dead
Software
PSL Input
No response
PSL Input
Protection event
This DDB signal indicates that all poles are dead 730
Power<1 3PhStart
Software
This DDB signal is the first stage three-phase Phase Underpower start signal 731
Power<1 A Start
Software
PSL Input
Protection event
This DDB signal is the first stage A-phase Phase Underpower start signal 732
Power<1 B Start
Software
PSL Input
Protection event
This DDB signal is the first stage B-phase Phase Underpower start signal 733
Power<1 C Start
Software
PSL Input
Protection event
This DDB signal is the first stage C-phase Phase Underpower start signal 734
Power<2 3PhStart
Software
PSL Input
Protection event
This DDB signal is the second stage three-phase Phase Underpower start signal
P14D-B/G/L/Z-TM-EN-1
287
Chapter 7 - Power Protection Functions
Ordinal
Signal Name
P14D
Source
Type
Response
Description 735
Power<2 A Start
Software
PSL Input
Protection event
This DDB signal is the second stage A-phase Phase Underpower start signal 736
Power<2 B Start
Software
PSL Input
Protection event
This DDB signal is the second stage B-phase Phase Underpower start signal 737
Power<2 C Start
Software
PSL Input
Protection event
This DDB signal is the second stage C-phase Phase Underpower start signal 746
Power<1 3Ph Trip
Software
PSL Input
Protection event
This DDB signal is the first stage three-phase Phase Underpower trip signal 747
Power<1 A Trip
Software
PSL Input
Protection event
This DDB signal is the first stage A-phase Phase Underpower trip signal 748
Power<1 B Trip
Software
PSL Input
Protection event
This DDB signal is the first stage B-phase Phase Underpower trip signal 749
Power<1 C Trip
Software
PSL Input
Protection event
This DDB signal is the first stage C-phase Phase Underpower trip signal 750
Power<2 3Ph Trip
Software
PSL Input
Protection event
This DDB signal is the second stage three-phase Phase Underpower trip signal 751
Power<2 A Trip
Software
PSL Input
Protection event
This DDB signal is the second stage A-phase Phase Underpower trip signal 752
Power<2 B Trip
Software
PSL Input
Protection event
This DDB signal is the second stage B-phase Phase Underpower trip signal 753
Power<2 C Trip
Software
PSL Input
Protection event
This DDB signal is the second stage C-phase Phase Underpower trip signal 756
Power<1 Block
Programmable Scheme PSL Output Logic
Protection event
This DDB signal blocks the first stage Underpower protection 757
Power<2 Block
Programmable Scheme PSL Output Logic
Protection event
This DDB signal blocks the second stage Underpower protection
3.4
UNDERPOWER SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 POWER PROTECTION
41
00
This column contains settings for Power protection UNDER POWER
41
14
The settings under this sub-heading relate to Underpower Power<1 Status
41
15
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the first stage Underpower protection. Power<1Direction
41
16
Forward
0=Reverse 1=Forward
This setting determines the direction of the first stage Underpower element.
288
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 7 - Power Protection Functions
Menu Text
Col
Row
Default Setting
Available Options
Description Power<1 Mode
41
17
Active
0=Active 1=Reactive
There are two operation modes; Active or Reactive. This setting determines which mode is to be used for the first stage Underpower element. Power<1TimeDelay
41
18
1
From 0s to 100s step 0.01s
This setting sets the operate time delay setting for the first stage Underpower element. Power<1 tRESET
41
19
0
From 0s to 100s step 0.01s
This setting sets the time delay for the first stage Underpower element. Power<1 1Ph Watt
41
1A
10
From 1 to 325 step 1
This setting sets the pick-up threshold for the single-phase Underpower element for the 'Active' mode. Power<1 1Ph VAr
41
1B
6
From 1 to 325 step 1
This setting sets the pick-up threshold of the single-phase Underpower element for the 'Reactive' mode. Power<1 3Ph Watt
41
1C
30
From 1 to 325 step 1
This setting sets the pick-up threshold for the three-phase Underpower element for the 'Active' mode. Power<1 3Ph VAr
41
1D
18
From 1 to 325 step 1
This setting sets the pick-up threshold of the three-phase Underpower element for the 'Reactive' mode. Power<2 Status
41
1E
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage Underpower protection. Power<2Direction
41
1F
Forward
0=Reverse 1=Forward
Thc setting determines the direction of the second stage Underpower element. Power<2 Mode
41
20
Active
0=Active 1=Reactive
There are two operation modes; Active or Reactive. This setting determines which mode is to be used for the second stage Underpower element. Power<2TimeDelay
41
21
1
From 0s to 100s step 0.01s
This setting sets the operate time delay setting for the second stage Underpower element. Power<2 tRESET
41
22
0
From 0s to 100s step 0.01s
This setting sets the time delay for the second stage Underpower element. Power<2 1Ph Watt
41
23
10
From 1 to 325 step 1
This setting sets the pick-up threshold for the single-phase Underpower element for the 'Active' mode. Power<2 1Ph VAr
41
24
6
From 1 to 325 step 1
This setting sets the pick-up threshold of the single-phase Underpower element for the 'Reactive' mode. Power<2 3Ph Watt
41
25
30
From 1 to 325 step 1
This setting sets the pick-up threshold for the three-phase Underpower element for the 'Active' mode. Power<2 3Ph VAr
41
26
18
From 1 to 325 step 1
This setting sets the pick-up threshold of the three-phase Underpower element for the 'Reactive' mode. Power Blocking
41
27
0x3
Bit 0=Poledead Blocks Power<1 Bit 1=Poledead Blocks Power<2
This setting is a 2 bit binary (Data type G402), whereby you can activate the Poledead Blocking for the Underpower and Overpower elements.
3.5
APPLICATION NOTES
3.5.1
LOW FORWARD POWER CONSIDERATIONS
The Low Forward Power protection can be arranged to interlock ‘non-urgent’ protection tripping using the programmable scheme logic. It can also be arranged to provide a for external interlocking of manual
P14D-B/G/L/Z-TM-EN-1
289
Chapter 7 - Power Protection Functions
P14D
tripping. To prevent unwanted alarms and flags, a Low Forward Power protection element can be disabled when the circuit breaker is opened via ‘Pole Dead’ logic. The Low Forward Power protection can also be used to provide loss of load protection when a machine is motoring. It can be used for example to protect a machine which is pumping from becoming unprimed, or to stop a motor in the event of a failure in the mechanical transmission. A typical application would be for pump storage generators operating in the motoring mode, where there is a need to prevent the machine becoming unprimed which can cause blade and runner damage. During motoring conditions, it is typical for the IED to switch to another setting group with the low forward power enabled and correctly set and the protection operating mode set to 'Reverse'. A low forward power element may also be used to detect a loss of mains or loss of grid condition for applications where the distributed generator is not allowed to export power to the system.
3.5.2
LOW FORWARD POWER SETTING GUIDELINES
Each stage of power protection can be selected to operate as a forward power stage by selecting the Power<(n) Direction cell to 'Forward'. When required for interlocking of non-urgent tripping applications, the threshold setting of the low forward power protection function should be less than 50% of the power level that could result in a dangerous overspeed condition on loss of electrical loading. When required for loss of load applications, the threshold setting of the low forward power protection function, is system dependent, however, it is typically set to 10 - 20% below the minimum load. The operating mode should be set to 'Reverse' for this application. For interlocking non-urgent trip applications the time delay associated with the low forward power protection function could be set to zero. However, some delay is desirable so that permission for a non-urgent electrical trip is not given in the event of power fluctuations arising from sudden steam valve/throttle closure. A typical time delay is 2 seconds. For loss of load applications the pick-up time delay is application dependent but is normally set in excess of the time between motor starting and the load being established. Where rated power cannot be reached during starting (for example where the motor is started with no load connected) and the required protection operating time is less than the time for load to be established then it will be necessary to inhibit the power protection during this period. This can be done in the PSL using AND logic and a pulse timer triggered from the motor starting to block the power protection for the required time. When required for loss of mains or loss of grid applications where the distributed generator is not allowed to export power to the system, the threshold setting of the reverse power protection function, should be set to a sensitive value, typically <2% of the rated power. The low forward power protection function should be time-delayed to prevent false trips or alarms being given during power system disturbances or following synchronisation. A time delay setting, of 5s should be applied typically. The delay on the reset timers would normally be set to zero. To prevent unwanted alarms and flags, the protection element can be disabled when the circuit breaker is open via Pole Dead logic.
290
P14D-B/G/L/Z-TM-EN-1
P14D
4
Chapter 7 - Power Protection Functions
SENSITIVE POWER PROTECTION
In some applications, it is necessary to have very high accuracy when applying power protection. For such applications it is possible to use metering class CTs and separate Sensitive Power elements. The Sensitive Power protection is a single-phase power element using phase A current and voltage. It provides two independent stages of Low Forward Power, Reverse Power and Over Power protection with timer and pole-dead blocking. Note: Sensitive Power Protection is only available for models equipped with a SEF transformer.
4.1
SENSITIVE POWER PROTECTION IMPLEMENTATION
Sensitive Power Protection is implemented in the POWER PROTECTION column of the relevant settings group, under the sub-heading SENSITIVE POWER. It is a single phase power element using the A-phase current and voltage. There are two stages of Sensitive Power protection, which can be independently selected as Low Forward Power, Reverse Power and Overpower. Note: When the sensitive power function is used, the SEF CT must be connected to Phase A current, making the measured power ISEF x VA.
4.2
SENSITIVE POWER MEASUREMENTS
Three sensitive power related measurements are added to the Measurements column, the visibility of which will depend on the protection configuration. ● A-Phase Sensitive Active Power in Watts (APh Sen Watts) ● A-Phase Sensitive Re-active Power in VArs (APh Sen VARs) ● A-Phase Sensitive Power Angle (APh Power Angle)
P14D-B/G/L/Z-TM-EN-1
291
Chapter 7 - Power Protection Functions
4.3
P14D
SENSITIVE POWER LOGIC Sens P(n) Start A
PA DT
P>(n)
&
1
Sens P(n) Trip A
-PA
Sens P(n) Delay &
P>(n) PA P<(n)
&
Aph Sens Power Key: Energising Quanitity
Enabled
Sens P1 Function
AND gate
&
OR gate
1
External DDB Signal
Over
Setting cell
Reverse
Setting value
Low Forward Disabled
Timer Comparator for undervalues
P(n) Poledead Inh Enabled
1
VTS Slow Block
Comparator for overvalues
V00902
Figure 88: Sensitive Power logic diagram
4.4
SENSITIVE POWER DDB SIGNALS Ordinal
Signal Name
Source
Type
Response
Description 351
VTS Slow Block
Software
PSL Input
No response
This DDB signal is a purposely delayed output from the VTS which can block other functions 758
SensP1 Start A
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the first stage Sensitive Power protection start signal 759
SensP2 Start A
Software
This DDB signal is the second stage Sensitive Power protection start signal 760
SensP1 Trip A
Software
This DDB signal is the first stage Sensitive Power protection trip signal 761
SensP2 Trip A
Software
This DDB signal is the second stage Sensitive Power protection trip signal
292
P14D-B/G/L/Z-TM-EN-1
P14D
4.5
Chapter 7 - Power Protection Functions
SENSITIVE POWER SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 41 POWER PROTECTION
00
This column contains settings for Power protection SENSITIVE POWER
41
28
The settings under this sub-heading relate to Sensitive Power protection Aph Sens Power
41
29
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables Sensitive Power protection (A-phase only) Comp Angle
41
2A
0
From -5 to 5 step 0.1
Reverse
0=Disabled 1=Reverse 2=Low Forward 3=Over
This setting sets the CT compensating angle. Sens P1 Function
41
2B
This setting determines the type of Sensitive Power protection is used for this stage. Sens -P>1Setting
41
2C
0.5*V1*I3
From 0.3*V1*I3 to 100*V1*I3 step 0.1*V1*I3
This setting sets the pick-up threshold for the first stage Sensitive Reverse Power element. Sens P<1 Setting
41
2D
0.5*V1*I3
From 0.3*V1*I3 to 100*V1*I3 step 0.1*V1*I3
This setting sets the pick-up threshold for the first stage Low Forward Power element. Sens P>1 Setting
41
2E
50*V1*I3
From 0.3*V1*I3 to 100*V1*I3 step 0.1*V1*I3
This setting sets the pick-up threshold for the first stage Overpower element. Sens P1 Delay
41
2F
5
From 0s to 100s step 0.01s
This setting sets the operate time delay setting for the first stage Sensitive Power element. Sens P1 tRESET
41
30
0
From 0s to 100s step 0.01s
This setting sets the reset time delay for the first stage Sensitive Power element. P1 Poledead Inh
41
31
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the first stage Pole Dead inhibit signal. Sens P2 Function
41
32
Low Forward
0=Disabled 1=Reverse 2=Low Forward 3=Over
This setting determines the type of Sensitive Power protection is used for this stage. Sens -P>2Setting
41
33
0.5*V1*I3
From 0.3*V1*I3 to 100*V1*I3 step 0.1*V1*I3
This setting sets the pick-up threshold for the second stage Sensitive Reverse Power element. Sens P<2 Setting
41
34
0.5*V1*I3
From 0.3*V1*I3 to 100*V1*I3 step 0.1*V1*I3
This setting sets the pick-up threshold for the second stage Low Forward Power element. Sens P>2 Setting
41
35
50*V1*I3
From 0.3*V1*I3 to 100*V1*I3 step 0.1*V1*I3
This setting sets the pick-up threshold for the second stage Overpower element. Sens P2 Delay
41
36
2
From 0s to 100s step 0.01s
This setting sets the operate time delay setting for the second stage Sensitive Power element. Sens P2 tRESET
41
37
0
From 0s to 100s step 0.01s
This setting sets the reset time delay for the second stage Sensitive Power element. P2 Poledead Inh
41
P14D-B/G/L/Z-TM-EN-1
38
Enabled
0 = Disabled or 1 = Enabled
293
Chapter 7 - Power Protection Functions
Menu Text
Col
P14D
Row
Default Setting
Available Options
Description This setting enables or disables the second stage Pole Dead inhibit signal.
4.6
APPLICATION NOTES
4.6.1
SENSITIVE POWER CALCULATION
Input Quantities Sensitive power is calculated from VA Ph-N voltage and I sensitive current input (connected to phase A). The calculation for active power with the correction angle is:
PA = I ASVA cos( ϕ − θC ) Where: ● VA = A-phase voltage ● IAS = A-phase sensitive current ● Φ= the angle of IAS with respect to VA ● θC = the CT correction angle Calculations within the device are based upon quadrature components obtained from the Fourier analysis of the input signals. The quadrature values for VA and IAS are used for the sensitive power calculation as shown:
VA = VAr + jVAi I AS = I ASr + jI ASi VA
VA = A-phase-N volts IAS = A-phase sensitive current IASC = compensated a phase sensitive current F = angle of IAS with respect to VA ( c = CT correction angle IASC
F
(c
IAS
V00903
Figure 89: Sensitive Power input vectors CT Correction The CT correction rotates the IAS vector by the correction angle. This correction is performed before the power calculation and can be achieved with the use of a rotation matrix:
cos θC sin θ C
294
− sin θC cos θC
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 7 - Power Protection Functions
The corrected phase-A sensitive current IASC is thus:
I I cos θC I ASC = ASCr = I AS = ASr I ASCi I ASi sin θC
− sin θC I ASr cos θC − I ASi sin θC = cos θC I ASr sin θC + I ASi cos θC
therefore:
I ASCr = I ASr cos θC − I ASi sin θC and
I ASCi = I ASr sin θC + I ASi cos θC These values will be stored and only calculated when the compensation angle setting is changed. The stored values can then be used to calculate IASC and IASC Active Power Calculation The corrected A-phase sensitive current vector can now be used to calculate the sensitive A-Phase active power PAS. Using the equation * PAS = Re VA I ASC
PAS = Re (VAr + jVAi ) ( I ASCr + jI ASCi ) = Re (VAr + jVAi ) ( I ASCr − jI ASCi ) = Re (VAr I ASCr + VAi I ASCi ) + j (VAi I ASCrr − VAr I ASCi ) = VAr I ASCr + VAi I ASCi 4.6.2
SENSITIVE POWER SETTING GUIDELINES
For reverse and low forward power protection, if settings greater than 3% Pn are used, the phase angle errors of suitable protection class current transformers will not result in any risk of maloperation. If settings of less than 3% are used, however, we recommend that the current input is driven by a correctly loaded metering class current transformer. The sensitive power protection has a minimum setting accuracy of 0.5% Pn. It uses the In sensitive CT to calculate single-phase active power. It also provides phase compensation to remove errors introduced by the primary input transformers.
P14D-B/G/L/Z-TM-EN-1
295
Chapter 7 - Power Protection Functions
296
P14D
P14D-B/G/L/Z-TM-EN-1
AUTORECLOSE CHAPTER 8
Chapter 8 - Autoreclose
298
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 8 - Autoreclose
CHAPTER OVERVIEW
Selected models of this product provide sophisticated Autoreclose (AR) functionality. The purpose of this chapter is to describe the operation of this functionality including the principles, logic diagrams and applications. This chapter contains the following sections: Chapter Overview Introduction to 3-phase Autoreclose Implementation Autoreclose Function Inputs Autoreclose Function Outputs Autoreclose Function Alarms Autoreclose Operation DDB Signals Settings Setting Guidelines
299 300 301 302 305 307 308 326 329 334
P14D-B/G/L/Z-TM-EN-1
299
Chapter 8 - Autoreclose
2
P14D
INTRODUCTION TO 3-PHASE AUTORECLOSE
It is known that approximately 80 - 90% of faults are transient in nature. This means that most faults do not last long and are self-clearing. A common example of a transient fault is an insulator flashover, which may be caused for example by lightning, clashing conductors or wind-blown debris. A transient fault, such as an insulator flashover, is a self-clearing ‘non-damage’ fault. The flashover will cause one or more circuit breakers to trip, but it may also have the effect of clearing the fault. If the fault clears itself, the fault does not recur when the line is re-energised. The remaining 10 – 20% of faults are either semi-permanent or permanent. A small tree branch falling on the line could cause a semi-permanent fault. Here the cause of the fault would not be removed by the immediate tripping of the circuit, but could be burnt away during a time-delayed trip. Permanent faults could be broken conductors, transformer faults, cable faults or machine faults, which must be located and repaired before the supply can be restored. In the majority of fault incidents, if the faulty line is immediately tripped out, and time is allowed for the fault arc to deionise, reclosure of the circuit breakers will result in the line being successfully re-energised. Autoreclose schemes are used to automatically reclose a circuit breaker a set time after it has been opened due to operation of a protection element. On HV/MV distribution networks, autoreclosing is applied mainly to radial feeders, where system stability problems do not generally arise. The main advantages of using Autoreclose are: ● Minimal interruption in supply to the consumer ● Reduction of operating costs - fewer man hours in repairing fault damage and the possibility of running unattended substations ● With Autoreclose, instantaneous protection can be used which means shorter fault durations. This in turn means less fault damage and fewer permanent faults Autoreclosing provides an important benefit on circuits using time-graded protection, in that it allows the use of instantaneous protection to provide a high speed first trip. With fast tripping, the duration of the power arc resulting from an overhead line fault is reduced to a minimum. This lessens the chance of damage to the line, which might otherwise cause a transient fault to develop into a permanent fault. Using instantaneous protection also prevents blowing of fuses in teed feeders, as well as reducing circuit breaker maintenance by eliminating pre-arc heating. When instantaneous protection is used with autoreclosing, the scheme is normally arranged to block the instantaneous protection after the first trip. Therefore, if the fault persists after re-closure, the time-graded protection will provide discriminative tripping resulting in the isolation of the faulted section. However, for certain applications, where the majority of the faults are likely to be transient, it is common practise to allow more than one instantaneous trip before the instantaneous protection is blocked. Some schemes allow a number of re-closures and time-graded trips after the first instantaneous trip, which may result in the burning out and clearance of semi-permanent faults. Such a scheme may also be used to allow fuses to operate in teed feeders where the fault current is low. When considering feeders that are partly overhead line and partly underground cable, any decision to install auto-reclosing should be subject to analysis of the data (knowledge of the frequency of transient faults). This is because this type of arrangement probably has a greater proportion of semi-permanent and permanent faults than for purely overhead feeders. In this case, the advantages of autoreclosing are small. It can even be disadvantageous because re-closing on to a faulty cable is likely to exacerbate the damage.
300
P14D-B/G/L/Z-TM-EN-1
P14D
3
Chapter 8 - Autoreclose
IMPLEMENTATION
Autoreclose functionality is a software option, which is selected when ordering the device, so this description only applies to models with this option. Autoreclose works for phase overcurrent (POC) earth fault (EF) and sensitive earth fault (SEF) protection. It is implemented in the AUTORECLOSE column of the relevant settings group. In addition to the settings contained in this column, you will also need to make some settings in the blocking cells of the relevant protection columns. The Autoreclose function can be set to perform a single-shot, two-shot, three-shot or four-shot cycle. You select this by the Number of Shots cell in the AUTORECLOSE column. You can also initiate a separate Autoreclose cycle for the SEF protection, with a different number of shots, selected by the Number of SEF Shots cell. Dead times for all shots can be adjusted independently. An Autoreclose cycle can be initiated internally by operation of a protection element, or externally by a separate protection device. The dead time starts in one of two cases; when the circuit breaker has tripped, or when the protection has reset. You select this using the Start Dead t On cell. At the end of the relevant dead time, a CB close 3ph signal is given, providing it is safe for the circuit breaker to close. This is determined by checking that certain system conditions are met as specified by the System Checks functionality. It is safe to close the circuit breaker providing that: ● only one side of the circuit breaker is live (either dead line / live bus, or live line / dead bus), or ● if both bus and line sides of the circuit breaker are live, the system voltages are synchronised. In addition, the energy source powering the circuit breaker (for example the closing spring) must be fully charged. This is indicated from the CB Healthy DDB input. When the CB has closed, the reclaim time starts. If the circuit breaker does not trip again, the Autoreclose function resets at the end of the set reclaim time. If the protection operates during the reclaim time the device either advances to the next shot in the Autoreclose cycle, or if all reclose attempts have been made, goes to lockout. CB Status signals must also be available, so the default setting for CB Status Input should be modified according to the application. The default PSL requires 52A, 52B and CB Healthy logic inputs, so a setting of both 52A and 52B is required for the CB Status Input.
P14D-B/G/L/Z-TM-EN-1
301
Chapter 8 - Autoreclose
4
P14D
AUTORECLOSE FUNCTION INPUTS
The Autoreclose function has several logic inputs, which can be mapped to any of the opto-inputs or to one or more of the DDB output signals generated by the PSL. The functions of these inputs are described below.
4.1
CB HEALTHY
It is necessary to establish if there is sufficient energy in the circuit breaker (spring charged, gas pressure healthy, etc.) before the CB can be re-closed. This CB Healthy input is used to ensure this before initiating a CB closed 3ph command. If on completion of the dead time, the CB Healthy input is low, and remains low for a period given by the CB Healthy Time timer, lockout will result and the circuit breaker will remain open. The majority of circuit breakers are only capable of providing a single trip-close-trip cycle, in which case the CB Healthy signal would stay low after one Autoreclose shot, resulting in lockout. This check can be disabled by not allocating an opto-input for the CB Healthy signal, whereby the signal defaults to a High state.
4.2
BLOCK AR
The Block AR input blocks the Autoreclose function and causes a lockout. It can be used when protection operation without Autoreclose is required. A typical example is on a transformer feeder, where Autoreclose may be initiated by the feeder protection but blocked by the transformer protection.
4.3
RESET LOCKOUT
The Reset Lockout input can be used to reset the Autoreclose function following lockout. It also resets any Autoreclose alarms, provided that the signals that initiated the lockout have been removed.
4.4
AR AUTO MODE
The AR Auto Mode input is used to select the Auto operating mode. In this mode, the Autoreclose function is in service.
4.5
AR LIVE LINE MODE
The AR Live Line Mode input is used to select the Live Line operating mode when Autoreclose is out of service and all blocking of instantaneous protection by Autoreclose is disabled. This operating mode takes precedence over all other operating modes for safety reasons, as it indicates that utility personnel are working near live equipment.
4.6
TELECONTROL MODE
The Telecontrol input is used to select the Telecontrol operating mode so that the Auto and Non-auto modes of operation can be selected remotely.
4.7
LIVE/DEAD CCTS OK (LIVE/DEAD CIRCUITS OK)
The Live/Dead Ccts OK signal is a signal indicating the status of the Live Line / Dead Bus or Live Bus / Dead Line system conditions (High = OK, Low = Not OK). The logic required can be derived in the PSL from the Live Line, Dead Line, Live Bus and Dead Bus signals in the System Check logic, or it can come from an external source depending on the application.
302
P14D-B/G/L/Z-TM-EN-1
P14D
4.8
Chapter 8 - Autoreclose
AR SYS CHECKS (AR SYSTEM CHECKS)
The AR Sys Checks signal can be mapped from the system checks output SysChksInactive, to enable auto-reclosing without any system checks, providing the System Checks setting in the CONFIGURATION column is disabled. This mapping is not essential, because the No System Checks setting in the AUTORECLOSE column can be enabled to achieve the same effect. This DDB can also be mapped to an opto-input, to allow the IED to receive a signal from an external system monitoring device, indicating that the system conditions are suitable for CB closing. This should not normally be necessary, since the IED has comprehensive built in system check functionality.
4.9
EXT AR PROT TRIP (EXTERNAL AR PROTECTION TRIP)
The Ext AR Prot signal allows Autoreclose initiation by a Trip from a separate protection device.
4.10
EXT AR PROT START(EXTERNAL AR PROTECTION START)
The Ext AR Prot signal allows Autoreclose initiation by a Start from a separate protection device.
4.11
DAR COMPLETE (DELAYED AUTORECLOSE COMPLETE)
Some utilities require Delayed Autoreclose (DAR) functionality. The DAR Complete signal can, if required, be mapped in PSL to provide a short pulse when a CB Close command is given at the end of the dead time. If DAR Complete is activated during an Autoreclose cycle, output DAR in Progress resets, even though the reclaim time may still be running, and AR in Progress remains set until the end of the reclaim time. For most applications, DAR complete can be ignored (not mapped in PSL). In such cases, output DAR in Progress operates and resets in parallel with AR in Progress.
4.12
CB IN SERVICE (CIRCUIT BREAKER IN SERVICE)
This signal must be high until the instant of protection operation for an Autoreclose cycle to be initiated. For most applications, this DDB can be mapped simply from CB Closed 3ph. More complex PSL mapping can be programmed if required, for example where it is necessary to confirm not only that the CB is closed but also that the line and/or bus VT is actually live up to the instant of protection operation.
4.13
AR RESTART
In some applications, it is sometimes necessary to initiate an Autoreclose cycle by means of connecting an external signal to an opto-input. This would be when the normal interlock conditions are not all satisfied, i.e. when the CB is open and the associated feeder is dead. If the AR Restart input is mapped to an opto-input, activation of that opto-input will initiate an Autoreclose cycle irrespective of the status of the CB in Service input, provided the other interlock conditions, are still satisfied.
4.14
DT OK TO START (DEAD TIME OK TO START)
This is an optional extra interlock in the dead time initiation logic. In addition to the CB being open and the protection reset, DT OK To Start has to be set high to allow the dead time function to be primed after an AR cycle has started. Once the dead time function is primed, this signal has no further affect – the dead time function stays primed even if the signal subsequently goes low. A typical PSL mapping for this input is from the Dead Line signal from the System Check logic. This would enable dead time priming only when the feeder has gone dead after CB tripping. If this extra dead time priming interlock is not required, DT OK To Start can be left unmapped, and it will default to a high state.
P14D-B/G/L/Z-TM-EN-1
303
Chapter 8 - Autoreclose
4.15
P14D
DEAD TIME ENABLED
This is another optional interlock in the dead time logic. This signal has to be high to allow the dead time to run. If this signal goes low, the dead time stops and resets, but stays primed, and will restart from zero when it goes high again. A typical PSL mapping is from the CB Healthy input or from selected signals from the System Check logic. It could also be mapped to an opto-input to provide a 'hold off' function for the follower CB in a 'master/follower' application with 2 CBs. If this optional interlock is not required, Dead Time Enabled can be left unmapped, and it will default to a high state.
4.16
AR INIT TRIP TEST (INITIATE TRIP TEST)
If AR Init TripTest is mapped to an opto-input, and that input is activated momentarily, the IED generates a CB trip output via AR Trip Test. The default PSL then maps this to output to the trip output relay and initiates an Autoreclose cycle.
4.17
AR SKIP SHOT 1
If AR Skip Shot 1 is mapped to an opto-input, and that input is activated momentarily, the IED logic will cause the Autoreclose sequence counter to increment by 1. This will decrease the available number of reclose shots and will lockout the re-closer.
4.18
INH RECLAIM TIME (INHIBIT RECLAIM TIME)
If Inh Reclaim Time is mapped to an opto-input, and that input is active at the start of the reclaim time, the IED logic will cause the reclaim timers to be blocked.
304
P14D-B/G/L/Z-TM-EN-1
P14D
5
Chapter 8 - Autoreclose
AUTORECLOSE FUNCTION OUTPUTS
The Autoreclose function has several logic outputs, which can be assigned to output relay s, monitor bits in the COMMISSIONING TESTS column, or the PSL. The functions of these outputs are described below.
5.1
AR IN PROGRESS
This signal is present during the complete re-close cycle from the start of protection to the end of the reclaim time or lockout.
5.2
DAR IN PROGRESS
This operates together with the AR In Progress signal at the start of Autoreclose. If DAR Complete does not operate, DAR in Progress remains operated until AR In Progress resets at the end of the cycle. If DAR Complete goes high during the Autoreclose cycle, DAR in Progress resets.
5.3
SEQUENCE COUNTER STATUS DDB SIGNALS
During each Autoreclose cycle a sequence Counter increments by 1 after each fault trip and resets to zero at the end of the cycle. ● ● ● ● ●
5.4
Seq. Counter = 0 is set when the counter is at zero Seq. Counter = 1 is set when the counter is at 1 Seq. Counter = 2 is set when the counter is at 2 Seq. Counter = 3 is set when the counter is at 3 Seq. Counter = 4 is set when the counter is at 4
SUCCESSFUL CLOSE
The Successful Close output indicates that an Autoreclose cycle has been successfully completed. A successful Autoreclose signal is given after the protection has tripped the CB and it has reclosed successfully. The successful Autoreclose output is reset at the next CB trip or from one of the reset lockout methods.
5.5
AR IN SERVICE
The AR In Service output indicates whether the Autoreclose is in or out of service. Autoreclose is In Service when the device is in Auto mode and Out of Service when in the Non-Auto and Live Line modes.
5.6
AR BLK MAIN PROT (BLOCK MAIN PROTECTION)
The AR Blk Main Prot signal blocks the DT-only stages (instantaneous stages) of the main current protection elements. These are I>3, I>4, I>6, IN1>3, IN1>4, IN2>3, and IN2>4. You block the instantaneous stages for each trip of the Autoreclose cycle using the Overcurrent and Earth Fault 1 and 2 settings, I> Blocking, IN1> Blocking, IN2> Blocking and the Trip 1/2/3/4/5 Main settings.
5.7
AR BLK SEF PROT (BLOCK SEF PROTECTION)
The AR Blk SEF Prot signal blocks the DT-only stages (instantaneous stages) of the SEF protection elements. These are ISEF>3, and ISEF>4. You block the instantaneous SEF stages for each trip of the Autoreclose cycle using the SEF PROTECTION setting ISEF> Blocking, and the Trip 1/2/3/4/5 SEF settings.
P14D-B/G/L/Z-TM-EN-1
305
Chapter 8 - Autoreclose
5.8
P14D
RECLOSE CHECKS
The Reclose Checks output indicates that the AR System Checks are in progress.
5.9
DEADTIME IN PROG
The DeadTime in Prog output indicates that the dead time is in progress. This signal is set when Reclose Checks is set AND input Dead TimeEnabled is high. This may be useful during commissioning to check the operation of the Autoreclose cycle.
5.10
DT COMPLETE (DEAD TIME COMPLETE)
DT Complete (Dead time complete) operates at the end of the set dead time, and remains operated until either the scheme resets at the end of the reclaim time or a further protection operation or Autoreclose initiation occurs. It can be applied purely as an indication, or included in PSL mapping to logic input DAR Complete.
5.11
AR SYNC CHECK (AR SYNCHRONISATION CHECK)
AR Sync Check indicates that the Autoreclose Synchronism checks are satisfactory. This is when either of the synchronisation check modules (CS1 or CS2), confirms an In-Synchronism condition.
5.12
AR SYSCHECKS OK (AR SYSTEM CHECKS OK)
AR SysChecks OK indicates that the Autoreclose System checks are satisfactory. This is when any selected system check condition (synchronism check, live bus/dead line etc.) is confirmed.
5.13
AUTO CLOSE
The Auto Close output indicates that the Autoreclose logic has issued a 'Close' signal to the CB. This output feeds a signal to the control close pulse timer and remains on until the CB has closed. This signal may be useful during commissioning to check the operation of the Autoreclose cycle.
5.14
PROTECTION LOCKT (PROTECTION LOCKOUT)
Protection Lockt (Protection Lockout) operates if AR lockout is triggered by protection operation either during the inhibit period following a manual CB close or when the device is in Non-auto or Live Line mode.
5.15
RESET LCKOUT ALM (RESET LOCKOUT ALARM)
Reset Lckout Alm operates when the device is in Non-auto mode, if the Reset Lockout setting is set to 'Select Non Auto'.
5.16
RECLAIM IN PROG
Reclaim in Prog output indicates that a reclaim timer is in progress and will drop-off once the reclaim timer resets.
5.17
RECLAIM COMPLETE
Reclaim Complete operates at the end of the set reclaim time and is a fast reset. To maintain the output indication a dwell timer has to be implemented in PSL.
306
P14D-B/G/L/Z-TM-EN-1
P14D
6
Chapter 8 - Autoreclose
AUTORECLOSE FUNCTION ALARMS
The following DDB signals will produce an alarm. These are described below.
6.1
AR NO SYS CHECK
The AR No Sys Check alarm indicates that the system voltages are not suitable for autoreclosing at the end of the system check time (setting Sys Check Time), leading to a lockout condition. This alarm is latched and must be reset manually.
6.2
AR CB UNHEALTHY
The AR CB Unhealthy alarm indicates that the CB Healthy input was not energised at the end of the 'CB Healthy Time', leading to a lockout condition. This alarm is latched and must be reset manually.
6.3
AR LOCKOUT
The AR Lockout alarm indicates that the device is in a lockout status and that further re-close attempts will not be made. This alarm can configured to reset automatically (self-reset) or manually as determined by the setting Reset Lockout by in the CB CONTROL column.
P14D-B/G/L/Z-TM-EN-1
307
Chapter 8 - Autoreclose
P14D
7
AUTORECLOSE OPERATION
7.1
OPERATING MODES
The Autoreclose function has three operating modes: ● Auto Mode: Autoreclose is in service ● Non-auto Mode: Autoreclose is out of service AND the chosen protection functions are blocked if setting AR Deselected = 'Block Inst Prot.' ● Live Line Mode: Autoreclose is out of service, but protection functions are NOT blocked, even if setting AR Deselected = 'Block Inst Prot.' Note: Live Line Mode provides extra security for live line working on the protected feeder.
The Autoreclose function must first be enabled in the CONFIGURATION column. You can then select the operating mode according to application requirements. The basic method of mode selection is determined by the setting AR Mode Select in the AUTORECLOSE column, as summarised in the following table: AR Mode Select Setting
Description
Command Mode
Auto or Non-auto mode selection is determined by the command cell Autoreclose Mode in the CB CONTROL column.
Opto Set Mode
Auto or Non-auto mode selection is determined by an opto-input mapped to AR Auto Mode If the AR Auto Mode input is high, Auto operating mode is selected. If the AR Auto Mode input is low, NonAuto operating mode is selected.
Set Mode
Auto or Non-auto mode selection is controlled by the Telecontrol Mode input. If the Telecontrol Mode input is high, the setting Autoreclose Mode in the CB CONTROL column is used to select Auto or Non Auto operating mode. If the Telecontrol Mode input is low, it behaves as for the 'Opto Set Mode' setting.
Pulse Set Mode
Auto or Non-auto mode selection is determined by the falling edge of Telecontrol. If the Telecontrol input is high, the operating mode is toggled between Auto and Non Auto Mode on the falling edge as it goes low. The Auto Mode pulses are produced by the SCADA system. If the Telecontrol input is low, it behaves as for the 'Opto Set Mode' setting.
The Live Line Mode is controlled by AR Live Line Mode. If this is high, the scheme is forced into Live Line Mode irrespective of the other signals.
7.1.1
FOUR-POSITION SELECTOR SWITCH IMPLEMENTATION
It is quite common for some utilities to apply a four position selector switch to control the mode of operation. This application can be implemented using the DDB signals AR Live Line Mode, AR Auto Mode and Telecontrol Mode. This is demonstrated in the following diagram.
308
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
IED E00500
Figure 90: Four-position selector switch implementation The required logic truth table for this arrangement is as follows: Switch position
AR Auto Mode
Telecontrol Mode
AR Live Line Mode
Non-auto
0
0
0
Telecontrol
0 or SCADA pulse
1
0
Auto
1
0
0
Live Line
0
0
1
P14D-B/G/L/Z-TM-EN-1
309
Chapter 8 - Autoreclose
7.1.2
P14D
OPERATING MODE SELECTION LOGIC Auto-Reclose AR disabled
Disable Enable
Live Line Mode
&
Live Line AR Mode Select Opto Set Mode Set Mode Pulse Set Mode Command Mode
&
&
&
&
&
&
&
1 1
Autoreclose Mode Auto No Operation Non Auto
&
Non Auto Mode
&
Auto Mode
S
Auto Mode Memory
Q
& 1
&
R
& & &
& AR Auto Mode
Enable
Key: Internal DDB Signal
Output pulse on rising edge of ‘Tele’
External DDB Signal Internal function
Enable Output pulse on falling edge of ‘Auto’
& &
Setting cell Setting value AND gate
OR gate
1 S
Telecontrol Mode Timer V00501
&
SR Latch
Q R
Figure 91: Autoreclose mode select logic The mode selection logic includes a 100 ms delay Auto Mode, Telecontrol and Live Line logic inputs, to ensure a predictable change of operating modes. This is of particular importance for the case when the four position switch does not have 'make-before-break' s. The logic also ensures that when the switch is moved from Auto or Non-Auto position to Telecontrol, the scheme remains in the previously selected mode (Auto or Non-Auto) until a different mode is selected by remote control. For applications where live line operating mode and remote selection of Auto/Non-auto modes are not required, a simple two position switch can be arranged to activate Auto Mode input. In this case, the Live Line and Telecontrol inputs would be unused.
7.2
AUTORECLOSE INITIATION
Autoreclose is usually initiated from the IED's internal protection function. Different stages of phase overcurrent and earth fault protection can be programmed to initiate or block the main Autoreclose function. The stages of sensitive earth fault protection can also be programmed to initiate or block both the Main Autoreclose function or the SEF Autoreclose function. The associated settings are found in the AUTORECLOSE column under the sub-heading AR INITIATION. For example:
310
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
If I>1 AR is set to 'Initiate Main AR', operation of the I>1 protection stage will initiate Autoreclose If ISEF>1 AR is set to 'No Action', operation of the ISEF>1 protection stage will lead to a CB trip but no reclose. Note: A selection must be made for each protection stage that is enabled.
A separate protection device may also initiate Autoreclose. The Autoreclose can be initiated from a protection Trip, or when sequence coordination is required from a protection Start. If external triggering of Autoreclose is required, the following DDB signals should be mapped to opto-inputs: ● Ext AR Prot Trip ● Ext AR Prot Strt (if applicable) In addition, the setting Ext Prot should be set to 'Initiate Main AR'. Although a protection start and a protection trip can initiate an AR cycle, several checks still have to be performed before the initialisation signal is given. Some of the checks are listed below: ● Auto Mode has been selected ● Live line mode is disabled ● The number of main protection and SEF shots have not been reached ● Sequence co-ordination is enabled (for protection start to initiate AR. This is not necessary if a protection trip is doing the initiating) ● The CB Ops Lockout DDB signal is not set ● The CB in Service DDB signal is high Note: The relevant protection trip must be mapped to the Trip Command In DDB.
7.2.1
START SIGNAL LOGIC Ext AR Prot Strt Ext Prot
&
Initiate Main AR
I>(n) Start I>(n) AR
&
Initiate Main AR
IN1>(n) Start IN1>(n) AR
&
1
Main Protection Start
Initiate Main AR
IN2>(n) Start IN2>(n) AR
Key:
&
Internal DDB Signal
Initiate Main AR
ISEF>(n) Start ISEF>(n) AR
Setting cell &
Setting value
Initiate Main AR Initiate SEF AR
SEF Protection Start
AND gate
&
OR gate
1
V00502
Figure 92: Start signal logic
P14D-B/G/L/Z-TM-EN-1
311
Chapter 8 - Autoreclose
7.2.2
P14D
TRIP SIGNAL LOGIC AR Init TripTest Test Autoreclose
1
AR Trip Test
3 pole Test
Ext AR Prot Trip Ext Prot
&
1
Main Protection Trip
Initiate Main AR
SEF Protection Trip Output Relay 3 I>(n) Trip I>(n) AR
&
Initiate Main AR
IN1>(n) Trip IN1>(n) AR
&
Initiate Main AR
IN2>(n) Trip IN2>(n) AR
Key: 1
&
Setting cell
&
Setting value
Initiate Main AR
ISEF>(n) Trip ISEF>(n) AR
Internal DDB Signal
AND gate
&
&
OR gate
1
Initiate Main AR Initiate SEF AR
&
Timer
V00503
Figure 93: Trip signal logic
312
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
7.2.3
BLOCKING SIGNAL LOGIC CB Fail Alarm Block AR Output Relay 3 I>3 Trip I>3 AR
&
Block AR
IREF> Trip I2>(n) Trip Broken Line Trip Thermal Trip V<1 Trip V<2 Trip V>1 Trip V>2 Trip VN>1 Trip VN>2 Trip V2>2 Trip
I>4 Trip I>4 AR
&
Block AR
I>6 Trip I>6 AR
&
Block AR
1
Stg(n) f+t Trp Stg(n) f+df/dt Trp Stg(n) df/dt+t Trp Stg(n) f+Df/Dt Trp
IN1>3 Trip IN1>3 AR
&
Block AR
IN1>4 Trip IN1>4 AR
&
Block AR
IN2>3 Trip IN2>3 AR
&
1
&
1
Block autoreclose
Block AR
IN2>4 Trip IN2>4 AR
&
Block AR
INSEF>1 Trip ISEF>1 AR
&
Block AR
INSEF>2 Trip ISEF>2 AR
&
Block AR
INSEF>3 Trip ISEF>3 AR
Key: Internal DDB Signal &
Block AR
INSEF>4 Trip ISEF>4 AR Block AR
Setting cell Setting value
&
AND gate
&
OR gate
1
V00515
Figure 94: Blocking signal logic
P14D-B/G/L/Z-TM-EN-1
313
Chapter 8 - Autoreclose
7.2.4
P14D
SHOTS EXCEEDED LOGIC Main Protection Start
Key:
S
& SC >= Main Shots
External DDB Signal
Main High Shots
Q R
SEF Protection Start
Internal DDB Signal
S
&
SC >= SEF Shots
AND gate
SEF High Shots
Q
&
OR gate
1
R
SR Latch
S Q R
V00504
Figure 95: Shots Exceeded logic
7.2.5
AR INITIATION LOGIC Auto Mode
Key: Internal DDB Signal
&
Lockout Alarm
External DDB Signal
Main Protection Trip Main Protection Start
1
Internal function
&
Setting cell
Main High Shots
Setting value
SEF Protection Trip SEF Protection Start
1 AND gate
&
&
OR gate
SEF High Shots
1 S
SR Latch
Sequence Co-ord
Q R
Enabled Disabled
Autoreclose Start &
1
S
DAR in Progress
Q R
CB in Service
Autoreclose Initiate
S
Autoreclose Inhibit AR Restart DAR Complete
Increment on falling edge
1
AR SeqCounter 0 AR SeqCounter 1 AR SeqCounter 2
Lockout Alarm
SC Counter
Reclaim Time Complete Non Auto Mode
AR in Progress
Q R
1
Reset
AR SeqCounter 3 AR SeqCounter 4 SC Count >= 4
Autoreclose Disabled
Number of Shots
SC Count >= Main Shots
Live Line Mode
Number of SEF Shots
SC Count >= SEF Shots
V00505
Figure 96: AR initiation logic
7.3
BLOCKING INSTANTANEOUS PROTECTION FOR SELECTED TRIPS
Instantaneous protection may be blocked or not blocked for each trip in an Autoreclose cycle. This is selected using the Trip (n) Main and Trip (n) SEF settings, where n is the number of the trip in the autoreclose cycle. These allow the instantaneous elements of phase, earth fault and SEF protection to be
314
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
selectively blocked for a CB trip sequence. For example, if Trip 1 Main is set to 'No Block' and Trip 2 Main is set to 'Block Inst Prot', the instantaneous elements of the phase and earth fault protection will be available for the first trip but blocked afterwards for the second trip during the Autoreclose cycle. The logic for this is shown below. Seq Counter = 0 Trip 1 Main
&
Block Inst Prot No Block
Seq Counter = 1 Trip 2 Main
&
Block Inst Prot No Block
Seq Counter = 2 Trip 3 Main
&
1
Block Main Prot Trips
1
Block SEF Prot Trips
Block Inst Prot No Block
Seq Counter = 3 Trip 4 Main
&
Block Inst Prot No Block
Seq Counter = 4 Trip 5 Main
&
Block Inst Prot No Block
Seq Counter = 0 Trip 1 SEF
&
Block Inst Prot No Block
Seq Counter = 1 Trip 2 SEF
&
Block Inst Prot No Block
Seq Counter = 2 Trip 3 SEF
&
Block Inst Prot No Block
Seq Counter = 3 Trip 4 SEF
&
Block Inst Prot No Block
Key: External DDB Signal Internal DDB Signal
Seq Counter = 4 Trip 5 SEF
Setting cell &
Block Inst Prot
Setting value
No Block
AND gate
&
OR gate
1
V00506
Figure 97: Blocking instantaneous protection for selected trips
P14D-B/G/L/Z-TM-EN-1
315
Chapter 8 - Autoreclose
7.4
P14D
BLOCKING INSTANTANEOUS PROTECTION FOR LOCKOUTS
Instantaneous protection can also be blocked for certain lockout conditions: It is blocked when the CB maintenance lockout counter or excessive fault frequency lockout has reached its penultimate value. For example, if the setting No. CB Ops Lock in the CB MONITOR SETUP column is set to 100 and the No. CB Ops Maint = '99', the instantaneous protection can be blocked to ensure that the last CB trip before lockout will be due to discriminative protection operation. This is controlled using the EFF Maint Lock setting (Excessive Fault Frequency maintenance lockout). If this is set to 'Block Inst Prot', the instantaneous protection will be blocked for the last CB Trip before lockout occurs. Instantaneous protection can also be blocked when the IED is locked out, using the AR Lockout setting. It can also be blocked after a manual close using the Manual Close setting. When the IED is in the Non-auto mode it can be blocked by using the AR Deselected setting. The logic for these features is shown below.
316
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
AR disabled Lockout Alarm Pre-Lockout EFF Maint Lock
&
Block Inst Prot No Block
Block Main Prot Trips
&
&
&
Main Protection Start
S
1
Q
1
&
Block Main Prot
Q
1
&
Block SEF Prot
R
Live Line Mode Block SEF Prot Trips
&
&
&
SEF Protection Start
S
1
R
Live Line Mode Lockout Alarm AR Lockout
&
1
Block Inst Prot No Block
Non Auto Mode AR Deselected
&
Key:
Block Inst Prot No Block
External DDB Signal
AR In Prog CB Closed 3ph
Internal DDB Signal &
1
Auto Mode Autoreclose inhibit
Setting cell & 20ms
Manual Close
Setting value SR Latch
S Q
Timer
R
Block Inst Prot No Block
AND gate
&
OR gate
1
V00507
Figure 98: Blocking instantaneous protection for lockouts
7.5
DEAD TIME CONTROL
When the setting CS AR Immediate is enabled, immediate re-closure of the circuit breaker is allowed providing that both sides of the circuit breaker are live and in synchronism at any time after the dead time has started. This allows for quicker load restoration, as it is not necessary to wait for the full dead time to expire. If CS AR Immediate is disabled, or neither Line nor Bus are live, the dead timer will continue to run, if the Dead Time Enabled signal is high. The Dead Time Enabled function could be mapped to an opto-input to indicate that the circuit breaker is healthy. Mapping the Dead Time Enabled function in PSL increases the flexibility by allowing it to be triggered by other conditions such as Live Line/Dead Bus. If Dead Time Enabled is not mapped in PSL, it defaults to high, so the dead time can run.
P14D-B/G/L/Z-TM-EN-1
317
Chapter 8 - Autoreclose
P14D
The dead time control logic is shown below. AR with ChkSyn Enable Disable
Scheme 2 (Voltage models only) &
1 AR Sync Check
&
1 DeadTime Enabled
Seq Counter = 1
&
Seq Counter = 2
&
Seq Counter = 3
&
Seq Counter = 4
&
1
DT Complete
&
CB Open 3ph
DeadTime in Prog
1
DT OK To Start
&
S
Reclose Checks
Q R
Autoreclose Start
1
Autoreclose Initiate
Start Dead t On Protection Reset
Key:
Internal DDB Signal
Sequence Co-ord Disable
1
External DDB Signal
AR In Progress
Enable
&
Setting cell &
Setting value SR Flip Flop
Q
Timer
R
&
CB Trips
S
AND gate
&
OR gate
1
V00508
Figure 99: Dead Time Control logic
7.5.1
AR CB CLOSE CONTROL
Once the dead time is completed or a synchronism check is confirmed, the Auto Close signal is given, provided both the CB Healthy and the System Checks are satisfied. The Auto Close signal triggers a CB Close command via the CB Control functionality. The AR CB Close Control Logic is shown below.
318
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
Reset Total AR
Total Shot Counter (Increment on +ve edge)
Yes No
CB Cls Fail CB Open 3ph
&
Auto Close
&
Hold Reclaim Output
S
&
Q R
&
S
DT Complete Autoreclose Start
Q R
&
Lockout Alarm
&
S Q R
CB Closed 3ph
CB Healthy
&
AR CB Unhealthy
&
AR No Sys Check
&
AR SysChecks OK
Key:
External DDB Signal
S
SR Flip Flop
Internal DDB Signal Setting cell
AND gate
Q
Timer
R
&
OR gate
1
Setting value Function
V00509
Figure 100: AR CB Close Control logic
7.6
AR SYSTEM CHECKS
The permission to initiate an Autoreclose depends on the following AR system check settings. These are found in the AUTORECLOSE column under the AR SYSTEM CHECKS sub-heading and are not to be confused with the main system check settings in the SYSTEM CHECKS column. The AR SYSTEM CHECKS are as follows: ● Live/Dead Ccts: When enabled this setting will give an AR Check OK signal when the LiveDead Ccts OK signal is high. This logic input DDB would normally be mapped in PSL to appropriate combinations of Line Live, Line Dead, Bus Live and Bus Dead DDB signals. ● No System Checks: When enabled this setting completely disables system checks thus allowing Autoreclose initiation under any system conditions. ● SysChk on Shot 1: Can be used to disable system checks on the first AR shot. ● AR with ChkSync: Only allows Autoreclose when the system satisfies the Check Sync Stage 1 (CS1) settings in the main SYSTEM CHECKS menu. ● AR with SysSync: Only allows Autoreclose when the system satisfies the Check Sync Stage 2 (CS2) settings in the main SYSTEM CHECKS menu.
P14D-B/G/L/Z-TM-EN-1
319
Chapter 8 - Autoreclose
P14D
The AR System Check logic is as follows: AR SysChecks
1
AR SysChecks OK
SysChk on Shot 1 Enabled
&
Seq Counter = 1 No system Checks Enabled
1
AR SysChecks OK
Live/Dead Ccts Enabled
&
LiveDead Ccts OK
Scheme 2 (Voltage models only)
AR with ChkSyn Enabled
&
Check Sync 1 OK
1 Key:
AR with SysSyn Enabled
AR Sync Check
&
Check Sync 2 OK Reclose Checks
External DDB Signal Internal DDB Signal Setting cell Setting value AND gate
&
OR gate
1
V00510
Figure 101: AR System Check logic
7.7
RECLAIM TIMER INITIATION
The tReclaim Extend setting allows you to control whether the timer is suspended from the protection start s or not. When a setting of 'No Operation' is used, the reclaim timer operates from the instant the CB is closed and will continue until the timer expires. The Reclaim Time must therefore be set in excess of the time-delayed protection operating time, to ensure that the protection can operate before the Autoreclose function is reset. For certain applications it is advantageous to set tReclaim Extend to 'On Prot Start'. This facility allows the operation of the reclaim timer to be suspended after CB re-closure by a signal from the main protection start or SEF protection start signals. This feature ensures that the reclaim time cannot time out and reset the Autoreclose before the time delayed protection has operated. Since the reclaim timer will be suspended, it is unnecessary to use a timer setting in excess of the protection operating time, therefore a short reclaim time can be used. Short reclaim time settings can help to prevent unnecessary lockout for a succession of transient faults in a short period, for example during a thunderstorm.
320
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
Key:
Lockout Reset Yes
Internal DDB Signal
1
HMI Clear
Setting cell
Reset Lockout Lockout alarm
Setting value
Reset Lockout
&
External DDB Signal
Internal function
CB Closed 3 ph
HMI Key
Reset Lockout by CB Close Interface
AND gate
&
Reset Lckout Alm
S
SR Latch
CB Open 3 ph
Q
OR gate
1
Timer
R
&
Autoclose
CB Closed 3 ph
S Q
1
&
R
Successful close
Q R
&
AR In Progress
S
Reclaim In Prog
tReclaim Extend On Prot Start No Operation
Main Protection Start SEF Protection Start
&
& 1
&
Reclaim Complete
1
DT Complete
1 &
Autoreclose Start Sequence Co-ord Enabled
Hold Reclaim Output Seq Counter = 1
&
nc
Successful
Reset 1st shot Counter Seq Counter = 2
&
nc
Successful
Reset 2nd shot Counter Seq Counter = 3
&
nc
Successful
Reset 3rd shot Counter Seq Counter = 4
&
nc
Successful
Reset 4th shot Counter CB Open 3 ph
&
AR Lockout
nc Reset
Persistant Faults Counter
Reset Total AR Yes
V00511
Figure 102: Reclaim Time logic
7.8
AUTORECLOSE INHIBIT
To ensure that autoreclosing is not initiated for a manual CB closure on to a pre-existing fault (switch on to fault), the AR on Man Close setting can be set to Inhibited. With this setting, Autoreclose initiation is inhibited for a period equal to setting AR Inhibit Time following a manual CB closure. The logic for AR Inhibit is as follows:
P14D-B/G/L/Z-TM-EN-1
321
Chapter 8 - Autoreclose
P14D
Pulse to start inhibit timer
CB Closed 3 ph
&
AR In Progress AR on Man Close
Autoreclose inhibit
External DDB Signal
Enabled
& SEF Protection Start
& Key:
Inhibited
Main Protection Start
1
1
Internal DDB Signal Setting cell Setting value
Auto Mode
Internal function AND gate
&
OR gate
1
Timer
V00512
Figure 103: AR Initiation inhibit If a protection operation occurs during the inhibit period, Autoreclose is not initiated. A further option is provided by setting Man Close on Flt. If this is set to 'Lockout', Autoreclose is locked out (AR Lockout) for a fault during the inhibit period following manual CB closure. If Man Close on Flt is set to 'No Lockout, the CB trips without reclosure, but Autoreclose is not locked out. You may need to block selected fast non-discriminating protection in order to obtain fully discriminative tripping during the AR initiation inhibit period following CB manual close. You can do this by setting Manual Close to 'Block Inst Prot'. A 'No Block setting will enable all protection elements immediately on CB closure. If setting AR on Man Close is set to 'Enabled, Autoreclose can be initiated immediately on CB closure, and settings AR Inhibit Time, Man Close on Flt and Manual Close are irrelevant.
7.9
AUTORECLOSE LOCKOUT
If protection operates during the reclaim time following the final reclose attempt, the IED is driven to lockout and the Autoreclose function is disabled until the lockout condition is reset. This produces the alarm, AR Lockout. The Block AR input blocks Autoreclose and causes a lockout if Autoreclose is in progress. Autoreclose lockout can also be caused by the CB failing to close due to an unhealthy circuit breaker (CB springs not charged or low gas pressure) or if there is no synchronisation between the system voltages. These two conditions are indicated by the alarms CB Unhealthy and AR No Check Sync. This is shown in the AR Lockout logic diagram as follows:
322
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
Reclaim Complete
&
CB Open 3ph
&
DT complete Autoreclose Start AR in Progress
S
&
Block Autoreclose
Q R
AR CB Unhealthy
1 CB Status Alarm CB Cls Fail S
HMI Clear
AR Lockout
Q
1
Lockout Reset
R
Yes
Reset Lockout
Reset lockout Lockout Alarm
&
CB Closed 3ph
Key:
Reset Lockout by
External DDB Signal
Interface CB Close
Internal DDB Signal
Reset Lckout Alm
Setting cell Setting value
Main Protection Trip Autoreclose Initiate
&
HMI Key AND gate
Main High Shots
&
SEF Protection Trip Autoreclose Initiate
&
1
OR gate
SEF High Shots Man No Checksync Protection Lockt
V00513
1 S
SR Latch
Q R
Timer
Figure 104: Overall Lockout logic AR lockout may also be due to a protection operation when the IED is in the Live Line or Non-auto modes when the setting Trip AR Inactive is set to 'Lockout'. Autoreclose lockout can also be caused by a protection operation after manual closing during the AR Inhibit Time when the Manual Close on Flt setting is set to 'Lockout'. This is shown as follows:
P14D-B/G/L/Z-TM-EN-1
323
Chapter 8 - Autoreclose
P14D
Ext. Trip 3ph Main Protection Trip
1
&
SEF Protection Trip
1
Protection Lockt
Autoreclose inhibit
Key:
Man Close on Flt Lockout
External DDB Signal
No Lockout
Internal DDB Signal Live Line Mode Non Auto mode
1
Setting cell &
Setting value
Lockout Alarm
AND gate
Trip AR Inactive
&
Lockout No Lockout
1
OR gate
V00514
Figure 105: Lockout for protection trip when AR is not available Note: Lockout can also be caused by the CB condition monitoring functions in the CB MONITOR SETUP column.
The Reset Lockout input can be used to reset the Autoreclose function following lockout and reset any Autoreclose alarms, provided that the signals that initiated the lockout have been removed. Lockout can also be reset from the clear key or the command Lockout Reset from the CB CONTROL column. There are two different Reset Lockout by settings. One in the CB CONTROL column and one in the AUTORECLOSE column. The Reset Lockout by setting in the CB CONTROL column is used to enable or disable reset of lockout automatically from a manual close after the manual close time Man Close Rst Dly. The Reset Lockout by setting in the AUTORECLOSE column is used to enable/disable the resetting of lockout when the IED is in the Non-auto operating mode. The reset lockout methods are summarised in the following table: Reset Lockout Method
When Available?
Interface via the Clear key. Note: This will also reset all other protection flags
Always
interface via CB CONTROL command Lockout Reset
Always
Opto-input Reset lockout
Always
Following a successful manual close if CB CONTROL setting Reset Lockout by is set to 'CB Close'
Only when set
By selecting Non-Auto mode, provided AUTORECLOSE setting Reset Lockout by Only when set is set to 'Select NonAuto'
7.10
SEQUENCE CO-ORDINATION
The Sequence Co-ord setting in the AUTORECLOSE menu allows sequence co-ordination with other protection devices, such as downstream pole-mounted reclosers. The main protection start or SEF protection start signals indicate when fault current is present, advance the sequence count by one and start the dead time, whether the CB is open or closed. When the dead time is complete and the protection start inputs are low, the reclaim timer is initiated.
324
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
You should program both the upstream and downstream Autoreclose IEDs with the same number of shots to lockout and number of instantaneous trips before instantaneous protection is blocked. This will ensure that for a persistent downstream fault, both Autoreclose IEDs will be on the same sequence count and will block instantaneous protection at the same time. When sequence co-ordination is disabled, the circuit breaker has to be tripped to start the dead time, and the sequence count is advanced by one. When using sequence co-ordination for some applications such as downstream pole-mounted reclosers, it may be desirable to re-enable instantaneous protection when the recloser has locked out. When the downstream recloser has locked out there is no need for discrimination. This allows you to have instantaneous, then IDMT, then instantaneous trips again during an Autoreclose cycle. Instantaneous protection may be blocked or not blocked for each trip in an Autoreclose cycle using the Trip (n) Main and Trip (n) SEF settings, where n is the number of the trip in the autoreclose cycle.
7.11
SYSTEM CHECKS FOR FIRST RECLOSE
The Sys Chk on Shot 1 setting in the SYSTEM CHECKS sub menu of the AUTORECLOSE column is used to enable or disable system checks for the first reclose attempt in an Autoreclose cycle. This may be preferred when high speed Autoreclose is applied, to avoid the extra time for a synchronism check. Subsequent reclose attempts in a multi-shot cycle will, however, still require a synchronism check.
P14D-B/G/L/Z-TM-EN-1
325
Chapter 8 - Autoreclose
8
P14D
DDB SIGNALS
Ordinal
Signal Name
Source
Type
Response
Description 163
AR Lockout
Software
PSL Input
Alarm self reset event
This DDB signal indicates that the AR did not result in successful reclosure and locks out further reclose attempts 164
AR CB Unhealthy
Software
PSL Input
Alarm latched event
PSL Input
Alarm latched event
The scheme has waited for the "CB HEALTHY" signal for the HEALTHY WINDOW time. 165
AR No Sys Check
Software
The scheme has waited for the "SYSTEM OK TO CLOSE" input for the SYSTEM CHECK WINDOW time 230
CB Healthy
Programmable Scheme Logic
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Output
No response
PSL Input
Protection event
This DDB signal indicates that the CB is healthy. 237
Reset Lockout
This DDB Resets a lockout condition 239
Block AR
This DDB signal blocks the Autoreclose function 240
AR LiveLine Mode
This DB indicates that the autoreclose function is in Live Line mode 241
AR Auto Mode
Programmable Scheme Logic
This DB indicates that the autoreclose function is in Auto mode 242
Telecontrol Mode
Programmable Scheme Logic
This DB indicates that the autoreclose function is in Telecontrol mode 358
AR Blk Main Prot
Software
This DDB signal, generated by the Autoreclose function, blocks the Main Protection elements (POC, EF1, EF2, NPSOC) 359
AR Blk SEF Prot
Software
PSL Input
Protection event
This DDB signal, generated by the Autoreclose function, blocks the SEF Protection element (POC, EF1, EF2, NPSOC) 360
AR In Progress
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
No response
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
Software
PSL Input
Protection event
Software
PSL Input
Protection event
This DDB signal indicates that three-pole Autoreclose is in progress 361
AR In Service
Software
This DDB signal indicates that Autoreclose is in or out of service (auto, or non-auto mode) 362
AR SeqCounter 0
Software
This DDB signal indicates that the AR has not been initiated 363
AR SeqCounter 1
Software
This DDB signal indicates that the AR function is in its first shot 364
AR SeqCounter 2
Software
This DDB signal indicates that the AR function is in its second shot 365
AR SeqCounter 3
Software
This DDB signal indicates that the AR function is in its third shot 366
AR SeqCounter 4
Software
This DDB signal indicates that the AR function is in its fourth shot 367
Successful Close
This DDB signal indicates a successful reclosure 368
DeadTime in Prog
This DDB signal indicates that the Autoreclose dead time is in progress
326
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
Ordinal
Signal Name
Source
Type
Response
Description 369
Protection Lockt
Software
PSL Input
Protection event
Software
PSL Input
Protection event
Software
PSL Input
Protection event
This DB signal locks out the Autoreclose function 370
Reset Lckout Alm
This DDB signal indicates that a lockout has been reset. 371
Auto Close
This DDB signal tells the CB to close, originating from Autoreclose only. This DDB signal has a fixed reset time. 372
AR Trip Test
Software
PSL Input
Protection event
PSL Output
No response
PSL Output
No response
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Input
No response
Programmable Scheme Logic
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
PSL Input
No response
PSL Input
No response
PSL Output
No response
PSL Input
No response
PSL Input
No response
Programmable Scheme Logic
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
This DDB signal is used to test the Autoreclose function trip test 403
AR Sys Checks
Programmable Scheme Logic
This DDB signal tells the the Autoreclose that the system checks are satisfied. 439
Ext AR Prot Trip
Programmable Scheme Logic
This DDB can initiate an Autoreclose sequence from an external trip 440
Ext AR Prot Strt
Programmable Scheme Logic
This DDB informs the Autoreclose function of an external start 453
DAR Complete
This DDB signal resets the AR in Progress 1 signal 454
CB in Service
This DDB signal indicates that the Circuit Breaker is in service 455
AR Restart
Programmable Scheme Logic
This DDB signal triggers a Restart of the Autoreclose initiation process 456
DAR In Progress
Software
This DDB signal indicates that delayed Auto-Reclose is in progress 457
DeadTime Enabled
This DDB signal enables the Dead Time timers 458
DT OK To Start
This DDB signal tells the AR that it is OK to start the Autoreclose Dead Timer. 459
DT Complete
Software
This DDB signal indicates that the Autoreclose Dead Time is complete 460
Reclose Checks
Software
This DDB signal indicates that Autoreclose system checks are in progress 461
LiveDead Ccts OK
Programmable Scheme Logic
This DDB informs the AR function that there is a Live/Dead circuit condition 462
AR Sync Check
Software
This DDB signal indicates that the Autoreclose Synchronisation Check is OK 463
AR SysChecks OK
Software
This DDB signal indicates that the Autoreclose System Checks are is OK 464
AR Init TripTest
This DDB signal initiates an Autoreclose trip test. 530
AR Skip Shot 1
This DDB signal forces the Autoreclose function to skip shot 1 of a reclose sequence. 532
Inh Reclaim Time
Programmable Scheme Logic
This DDB signal inhibits the Autoreclose Reclaim Timer
P14D-B/G/L/Z-TM-EN-1
327
Chapter 8 - Autoreclose
Ordinal
P14D
Signal Name
Source
Type
Response
Description 533
Reclaim In Prog
Software
PSL Input
No response
PSL Input
No response
This DDB signal indicates that the Autoreclose Reclaim Time is in progress 534
Reclaim Complete
Software
This DDB signal indicates that the Autoreclose Reclaim Time is complete
328
P14D-B/G/L/Z-TM-EN-1
P14D
9
Chapter 8 - Autoreclose
SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 AUTORECLOSE
49
00
This column contains settings for Autoreclose (AR) AR Mode Select
49
01
Command Mode
0=Command Mode 1=Opto Set Mode 2= Set Mode 3=Pulse Set Mode
1
From 1 to 4 step 1
This setting determines the Autoreclose mode. Number of Shots
49
02
This setting sets the required number of autoreclose cycles for Overcurrent trips. Number SEF Shots
49
03
0
From 0 to 4 step 1
This setting sets the number of required autoreclose cycles for SEF trips. Sequence Co-ord
49
04
Disabled
0 = Disabled or 1 = Enabled
This setting enables the sequence co-ordination function to ensure the correct protection grading between an upstream and downstream reclosing device. CS AR Immediate
49
05
Disabled
0 = Disabled or 1 = Enabled
This setting allows immediate re-closure of the circuit breaker provided both sides of the circuit breaker are live and in synchronism at any time after the dead time has started. Dead Time 1
49
06
10
From 0.01s to 300s step 0.01s
This setting sets the dead time for the first autoreclose cycle. Dead Time 2
49
07
60
From 0.01s to 300s step 0.01s
This setting sets the dead time for the second autoreclose cycle. Dead Time 3
49
08
180
From 0.01s to 9999s step 0.01s
This setting sets the dead time for the third autoreclose cycle. Dead Time 4
49
09
180
From 0.01s to 9999s step 0.01s
This setting sets the dead time for the fourth autoreclose cycle. CB Healthy Time
49
0A
5
From 0.01s to 9999s step 0.01s
Protection Reset
0=Protection Reset 1=CB Trips
This setting defines the CB lockout time Start Dead t On
49
0B
This setting determines whether the dead time has started when the circuit breaker trips or when the protection trip resets. tReclaim Extend
49
0C
No Operation
0=On Prot Start 1=No Operation
This setting allows the to control whether the reclaim timer is suspended by the protection start s or not (i.e. whether the IED is permitted to reclaim if a fault condition is present and will be cleared in a long time-scale). Reclaim Time 1
49
0D
180
From 1s to 600s step 0.01s
Sets the autoreclose reclaim time for the first autoreclose cycle. Reclaim Time 2
49
0E
180
From 1s to 600s step 0.01s
Sets the autoreclose reclaim time for the second autoreclose cycle. Reclaim Time 3
49
0F
180
From 1s to 600s step 0.01s
Sets the autoreclose reclaim time for the third autoreclose cycle. Reclaim Time 4
49
P14D-B/G/L/Z-TM-EN-1
10
180
From 1s to 600s step 0.01s
329
Chapter 8 - Autoreclose
Menu Text
P14D
Col
Row
Default Setting
Available Options
Description Sets the autoreclose reclaim time for the fourth autoreclose cycle. AR Inhibit Time
49
11
5
From 0.01s to 600s step 0.01s
This setting defines the inhibit time before Autoreclose is initiated following a manual CB closure. AR Lockout
49
12
No Block
0=No Block 1=Block Inst Prot
This setting is used to block instantaneous protection if the IED has undergone Autoreclose Lockout. EFF Maint Lock
49
13
No Block
0=No Block 1=Block Inst Prot
This setting is used to block instantaneous protection for the last circuit breaker trip before lockout occurs. AR Deselected
49
14
No Block
0=No Block 1=Block Inst Prot
This setting allows the instantaneous protection to be blocked when autoreclose is in non-auto mode of operation. Manual Close
49
15
No Block
0=No Block 1=Block Inst Prot
This setting is used to block instantaneous protection when the circuit breaker is closed manually whilst there is no auto-reclose sequence in progress or autoreclose is inhibited. Trip 1 Main
49
16
No Block
0=No Block 1=Block Inst Prot
The Trip (n) Main settings are used to selectively block the instantaneous elements of phase and earth fault protection elements for a circuit breaker trip sequence. Trip 2 Main
49
17
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) Main settings are used to selectively block the instantaneous elements of phase and earth fault protection elements for a circuit breaker trip sequence. Trip 3 Main
49
18
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) Main settings are used to selectively block the instantaneous elements of phase and earth fault protection elements for a circuit breaker trip sequence. Trip 4 Main
49
19
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) Main settings are used to selectively block the instantaneous elements of phase and earth fault protection elements for a circuit breaker trip sequence. Trip 5 Main
49
1A
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) Main settings are used to selectively block the instantaneous elements of phase and earth fault protection elements for a circuit breaker trip sequence. Trip 1 SEF
49
1B
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) SEF settings are used to selectively block the instantaneous elements of sensitive earth fault protection elements for a circuit breaker trip sequence. Trip 2 SEF
49
1C
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) SEF settings are used to selectively block the instantaneous elements of sensitive earth fault protection elements for a circuit breaker trip sequence. Trip 3 SEF
49
1D
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) SEF settings are used to selectively block the instantaneous elements of sensitive earth fault protection elements for a circuit breaker trip sequence.
330
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
Menu Text
Col
Row
Default Setting
Available Options
Description Trip 4 SEF
49
1E
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) SEF settings are used to selectively block the instantaneous elements of sensitive earth fault protection elements for a circuit breaker trip sequence. Trip 5 SEF
49
1F
Block Inst Prot
0=No Block 1=Block Inst Prot
The Trip (n) SEF settings are used to selectively block the instantaneous elements of sensitive earth fault protection elements for a circuit breaker trip sequence. Man Close on Flt
49
20
Lockout
0=No Lockout 1=Lockout
This setting decides whether the the AR should lockout or not after a Manual Close on Fault operation. Trip AR Inactive
49
21
No Lockout
0=No Lockout 1=Lockout
When AR is inactive (Non-auto, or Live Line mode), this setting determines whether The AR should be locked out or not. Reset Lockout by
49
22
Interface
0= Interface 1=Select NonAuto
This setting is used to determine the method by which the Lockout is reset. AR on Man Close
49
24
Inhibited
0=Enabled 1=Inhibited
If this is set to 'Enabled', autoreclosing can be initiated immediately on circuit breaker closure, overriding the settings AR Inhibit Time, Man Close on Flt and Manual Close. Sys Check Time
49
25
5
From 0.01s to 9999s step 0.01s
This setting sets the amount of time set for System Checks for Autoreclose operation. AR Skip Shot 1
49
26
Disabled
0 = Disabled or 1 = Enabled
When enabled this setting allows the autoreclose sequence counter to be incremented by one via a DDB input signal. This will therefore decrease the number of available re-close shots. AR INITIATION
49
28
The settings under this sub-heading relate to Autoreclose initiation I>1 AR
49
29
Initiate Main AR
0=No Action 1=Initiate Main AR
This setting determines impact of the first stage overcurrent protection on AR operation. I>2 AR
49
2A
Initiate Main AR
0=No Action 1=Initiate Main AR
This setting determines impact of the second stage overcurrent protection on AR operation. I>3 AR
49
2B
Initiate Main AR
0=No Action 1=Initiate Main AR 2=Block AR
This setting determines impact of the third stage overcurrent protection on AR operation. I>4 AR
49
2C
Initiate Main AR
0=No Action 1=Initiate Main AR 2=Block AR
This setting determines impact of the fourth stage overcurrent protection on AR operation. IN1>1 AR
49
2D
Initiate Main AR
0=No Action 1=Initiate Main AR
This setting determines impact of the first stage measured earth fault overcurrent protection on AR operation. IN1>2 AR
49
2E
Initiate Main AR
0=No Action 1=Initiate Main AR
This setting determines impact of the second stage measured earth fault overcurrent protection on AR operation.
P14D-B/G/L/Z-TM-EN-1
331
Chapter 8 - Autoreclose
Menu Text
P14D
Col
Row
Default Setting
Available Options
Description IN1>3 AR
49
2F
Initiate Main AR
0=No Action 1=Initiate Main AR 2=Block AR
This setting determines impact of the third stage measured earth fault overcurrent protection on AR operation. IN1>4 AR
49
30
Initiate Main AR
0=No Action 1=Initiate Main AR 2=Block AR
This setting determines impact of the fourth stage measured earth fault overcurrent protection on AR operation. IN2>1 AR
49
31
No Action
0=No Action 1=Initiate Main AR
This setting determines impact of the first stage derived earth fault overcurrent protection on AR operation. IN2>2 AR
49
32
No Action
0=No Action 1=Initiate Main AR
This setting determines impact of the second stage derived earth fault overcurrent protection on AR operation. IN2>3 AR
49
33
No Action
0=No Action 1=Initiate Main AR 2=Block AR
This setting determines impact of the third stage derived earth fault overcurrent protection on AR operation. IN2>4 AR
49
34
No Action
0=No Action 1=Initiate Main AR 2=Block AR
This setting determines impact of the fourth stage derived earth fault overcurrent protection on AR operation. ISEF>1 AR
49
35
No Action
0=No Action 1=Initiate Main AR 2=Initiate SEF AR 3=Block AR
This setting determines impact of the first stage sensitive earth fault overcurrent protection on AR operation. ISEF>2 AR
49
36
No Action
0=No Action 1=Initiate Main AR 2=Initiate SEF AR 3=Block AR
This setting determines impact of the second stage sensitive earth fault overcurrent protection on AR operation. ISEF>3 AR
49
37
No Action
0=No Action 1=Initiate Main AR 2=Initiate SEF AR 3=Block AR
This setting determines impact of the third stage sensitive earth fault overcurrent protection on AR operation. ISEF>4 AR
49
38
No Action
0=No Action 1=Initiate Main AR 2=Initiate SEF AR 3=Block AR
This setting determines impact of the fourth stage sensitive earth fault overcurrent protection on AR operation. Ext Prot
49
3C
No Action
0=No Action 1=Initiate Main AR
This setting determines if external protection inputs initiates auto-reclose. This must be mapped in programmable scheme logic. I>5 AR
49
3D
Initiate Main AR
0=No Action 1=Initiate Main AR
This setting determines impact of the fifth stage overcurrent protection on AR operation.
332
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
Menu Text
Col
Row
Default Setting
Available Options
Description I>6 AR
49
3E
Initiate Main AR
0=No Action 1=Initiate Main AR 2=Block AR
This setting determines impact of the sixth stage overcurrent protection on AR operation. SYSTEM CHECKS
49
40
The settings under this sub-heading relate to Autoreclose system checks AR with ChkSyn
49
41
Disabled
0 = Disabled or 1 = Enabled
This setting enables/disables autoreclose with check synchronisation for Check Sync stage 1 (CS1) AR with SysSyn
49
42
Disabled
0 = Disabled or 1 = Enabled
This setting enables/disables autoreclose with check synchronisation for Check Sync stage 2 (CS2) Live/Dead Ccts
49
43
Disabled
0 = Disabled or 1 = Enabled
When enabled, this setting will produce an "AR Check Ok" DDB signal when the Live/Dead Ccts DDB signal is high. No System Checks
49
44
Enabled
0 = Disabled or 1 = Enabled
When enabled this setting completely disables system checks thus allowing autoreclose initiation without system checks. SysChk on Shot 1
49
45
Enabled
0 = Disabled or 1 = Enabled
This setting is used to enable/disable system checks for the first auto-reclose shot.
P14D-B/G/L/Z-TM-EN-1
333
Chapter 8 - Autoreclose
10
SETTING GUIDELINES
10.1
NUMBER OF SHOTS
P14D
There are no clear cut rules for defining the number of shots for a particular application. Generally medium voltage systems use only two or three shot Autoreclose schemes. However, in certain countries, for specific applications, a four-shot scheme is not uncommon. A four-shot scheme has the advantage that the final dead time can be set sufficiently long to allow any thunderstorms to before reclosing for the final time. This arrangement prevents unnecessary lockout for consecutive transient faults. Typically, the first trip, and sometimes the second, will result from instantaneous protection. Since most faults are transient, the subsequent trips will be time delayed, all with increasing dead times to clear semipermanent faults. An important consideration is the ability of the circuit breaker to perform several trip-close operations in quick succession and the affect of these operations on the circuit maintenance period. On EHV transmission circuits with high fault levels, only one re-closure is normally applied, because of the damage that could be caused by multiple re-closures.
10.2
DEAD TIMER SETTING
The choice of dead time is dependent on the system. The main factors that can influence the choice of dead time are: ● ● ● ● ● ●
Stability and synchronism requirements Operational convenience Load The type of circuit breaker Fault deionising time The protection reset time
10.2.1
STABILITY AND SYNCHRONISM REQUIREMENTS
It may be that the power transfer level on a specific feeder is such that the systems at either end of the feeder could quickly fall out of synchronism if the feeder is opened. If this is the case, it is usually necessary to reclose the feeder as quickly as possible to prevent loss of synchronism. This is called high speed autoreclosing (HSAR). In this situation, the dead time setting should be adjusted to the minimum time necessary. This time setting should comply with the minimum dead time limitations imposed by the circuit breaker and associated protection, which should be enough to allow complete deionisation of the fault path and restoration of the full voltage withstand level. Typical HSAR dead time values are between 0.3 and 0.5 seconds. On a closely interconnected transmission system, where alternative power transfer paths usually hold the overall system in synchronism even when a specific feeder opens, or on a radial supply system where there are no stability implications, it is often preferred to leave a feeder open for a few seconds after fault clearance. This allows the system to stabilise, and reduces the shock to the system on re-closure. This is called slow or delayed auto-reclosing (DAR). The dead time setting for DAR is usually selected for operational convenience.
10.2.2
OPERATIONAL CONVENIENCE
When HSAR is not required, the dead time chosen for the first re-closure following a fault trip is not critical. It should be long enough to allow any resulting transients resulting to decay, but not so long as to cause major inconvenience to consumers who are affected by the loss of the feeder. The setting chosen often depends on service experience with the specific feeder.
334
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 8 - Autoreclose
Typical first shot dead time settings on 11 kV distribution systems are 5 to 10 seconds. In situations where two parallel circuits from one substation are carried on the same towers, it is often arranged for the dead times on the two circuits to be staggered, e.g. one at 5 seconds and the other at 10 seconds, so that the two circuit breakers do not reclose simultaneously following a fault affecting both circuits. For multi-shot Autoreclose cycles, the second and subsequent shot dead times are usually longer than the first shot, to allow time for semi-permanent faults to burn clear, and for the CB to recharge. Typical second and third shot dead time settings are 30 seconds and 60 seconds respectively.
10.2.3
LOAD REQUIREMENTS
Some types of electrical load might have specific requirements for minimum and/or maximum dead time, to prevent damage and minimise disruption. For example, synchronous motors are only capable of tolerating extremely short supply interruptions without losing synchronism. In practise it is desirable to disconnect the motor from the supply in the event of a fault; the dead time would normally be sufficient to allow a controlled shutdown. Induction motors, on the other hand, can withstand supply interruptions up to typically 0.5 seconds and re-accelerate successfully.
10.2.4
CIRCUIT BREAKER
For HSAR, the minimum dead time of the power system will depend on the minimum time delays imposed by the circuit breaker during a tripping and reclose operation. After tripping, time must be allowed for the mechanism to reset before applying a closing pulse, otherwise the circuit breaker might fail to close correctly. This resetting time will vary depending on the circuit breaker, but is typically 0.1 seconds. Once the mechanism has reset, a CB Close signal can be applied. The time interval between energising the closing mechanism and making the s is called the closing time. A solenoid closing mechanism may take up to 0.3 seconds. A spring-operated breaker, on the other hand, can close in less than 0.1 seconds. Where HSAR is required, for the majority of medium voltage applications, the circuit breaker mechanism reset time itself dictates the minimum dead time. This would be the mechanism reset time plus the CB closing time. A solenoid mechanism is not suitable for high speed Autoreclose as the closing time is generally too long. For most circuit breakers, after one re-closure, it is necessary to recharge the closing mechanism energy source before a further re-closure can take place. Therefore the dead time for second and subsequent shots in a multi-shot sequence must be set longer than the spring or gas pressure recharge time.
10.2.5
FAULT DEIONISATION TIME
For HSAR, the fault deionising time may be the most important factor when considering the dead time. This is the time required for ionised air to disperse around the fault position so that the insulation level of the air is restored. You cannot accurately predict this, but you can obtain an approximation from the following formula: Deionising time = (10.5 + ((system voltage in kV)/34.5))/frequency Examples: At 66 kV 50 Hz, the deionising time is approximately 0.25 s At 132 kV 60 Hz, the deionising time is approximately 0.29 s
10.2.6
PROTECTION RESET TIME
It is essential that any time-graded protection fully resets during the dead time, so that correct time discrimination will be maintained after reclosing on to a fault. For HSAR, instantaneous reset of protection is required. However at distribution level, where the protection is predominantly made up of overcurrent and earth fault devices, the protection reset time may not be instantaneous. In the event that the circuit breaker recloses on to a fault and the protection has not fully reset, discrimination may be lost with the downstream
P14D-B/G/L/Z-TM-EN-1
335
Chapter 8 - Autoreclose
P14D
protection. To avoid this condition the dead time must be set in excess of the slowest reset time of either the local device or any downstream protection. Typical 11/33 kV dead time settings in the UK are as follows: 1st dead time = 5 - 10 seconds 2nd dead time = 30 seconds 3rd dead time = 60 - 180 seconds 4th dead time = 1 - 30 minutes Note: A 4th dead time is uncommon in the UK, however this may be common in other countries such as South Africa.
10.3
RECLAIM TIMER SETTING
A number of factors influence the choice of the reclaim timer: ● Supply continuity: Large reclaim times can result in unnecessary lockout for transient faults. ● Fault incidence/Past experience: Small reclaim times may be required where there is a high incidence of lightning strikes to prevent unnecessary lockout for transient faults. ● Spring charging time: For HSAR the reclaim time may be set longer than the spring charging time to ensure there is sufficient energy in the circuit breaker to perform a trip-close-trip cycle. For delayed Autoreclose there is no need as the dead time can be extended by an extra CB healthy check window time if there is insufficient energy in the CB. If there is insufficient energy after the check window time the IED will lockout. ● Switchgear maintenance: Excessive operation resulting from short reclaim times can mean shorter maintenance periods. A minimum reclaim time of more than 5 seconds may be needed to allow the circuit breaker time to recover after a trip and close before it can perform another trip-close-trip cycle. This time will depend on the circuit breaker's duty rating. The reclaim time must be long enough to allow any time-delayed protection initiating Autoreclose to operate. Failure to do so would result in premature resetting of the Autoreclose scheme and re-enabling of instantaneous protection. If this condition arose, a permanent fault would effectively look like a number of transient faults, resulting in continuous autoreclosing, unless additional measures are taken such as excessive fault frequency lockout protection. Sensitive earth fault protection is applied to detect high resistance earth faults and usually has a long time delay, typically 10 - 15 seconds. This longer time may have to be taken into consideration, if autoreclosing from SEF protection. High resistance earth faults are rarely transient and may be a danger to the public. It is therefore common practise to block Autoreclose by operation of sensitive earth fault protection and lockout the circuit breaker. A typical 11/33 kV reclaim time in the UK is 5 - 10 seconds. This prevents unnecessary lockout during thunderstorms. However, reclaim times of up to 60 - 180 seconds may be used elsewhere in the world.
336
P14D-B/G/L/Z-TM-EN-1
MONITORING AND CONTROL CHAPTER 9
Chapter 9 - Monitoring and Control
338
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 9 - Monitoring and Control
CHAPTER OVERVIEW
As well as providing a range of protection functions, the product includes comprehensive monitoring and control functionality. This chapter contains the following sections: Chapter Overview Records Disturbance Recorder Measurements I/O Functions CB Condition Monitoring Circuit Breaker Control CB State Monitoring Voltage Transformer Supervision Current Transformer Supervision Pole Dead Function DC Supply Monitor Fault Locator System Checks Trip Circuit Supervision
339 340 357 359 368 381 384 391 393 398 400 402 405 407 416
P14D-B/G/L/Z-TM-EN-1
339
Chapter 9 - Monitoring and Control
2
P14D
RECORDS
The IED logs three different types of record. These are Event, Fault and Maintenance records, which are stored in the IED's non-volatile memory. It is important to log records because this allows you to establish the sequence of events that occurred, for example following a particular power system condition. The device is capable of storing up to: ● 2048 event records ● 10 Fault records ● 10 maintenance records When the available space is exhausted, the oldest record is automatically overwritten by the new one. The IED's internal clock provides a time tag for each event, to a resolution of 1 ms. The VIEW RECORDS column contains details of these Event, Fault and Maintenance records, which can be displayed on the IED's front , although it is far easier to view them using the settings application software.
2.1
EVENT RECORDS
Event records are generated when certain events happen. A change in any digital input signal or protection element output signal causes an event record to be created. These events are generated by the protection software and immediately time stamped. They are then transferred to non-volatile memory for storage. In extreme cases, it is possible for the buffer to overflow under avalanche conditions. If this occurs, a maintenance record is generated to indicate this loss of information. You can control which events cause an event record to be logged in the RECORD CONTROL column. The following table provides details of this control for all event types. Menu Text
Col
Row
Default Setting
Available Options
Description RECORD CONTROL
0B
00
This column contains settings for Record Controls. Alarm Event
0B
04
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the generation of an event on alarm. Disabling this setting means that no event is generated for alarms. Relay O/P Event
0B
05
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the generation of an event for a change of state of output relay . Disabling this setting means that no event will be generated for any change in logic output state. Opto Input Event
0B
06
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the generation of an event for a change of state of opto-input. Disabling this setting means that no event will be generated for any change in logic input state. General Event
0B
07
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the generation of general events. Disabling this setting means that no general events are generated. Fault Rec Event
0B
08
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the generation of fault record events. Disabling this setting means that no event will be generated for any fault that produces a fault record. Maint Rec Event
0B
09
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the generation of maintenance record events. Disabling this setting means that no event will be generated for any occurrence that produces a maintenance record. Protection Event
0B
0A
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the generation of protection events. Disabling this setting means that any operation of protection elements will not be logged as an event.
340
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 9 - Monitoring and Control
Col
Row
Default Setting
Available Options
Description DDB 31 - 0
0B
40
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 63 - 32
0B
41
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 95 - 64
0B
42
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 127 - 96
0B
43
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 159 - 128
0B
44
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 191 - 160
0B
45
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 223 - 192
0B
46
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 255 - 224
0B
47
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 287 - 256
0B
48
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 319 - 288
0B
49
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 351 - 320
0B
4A
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 383 - 352
0B
4B
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event)
P14D-B/G/L/Z-TM-EN-1
341
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description DDB 415 - 384
0B
4C
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 447 - 416
0B
4D
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 479 - 448
0B
4E
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 511 - 480
0B
4F
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 543 - 512
0B
50
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 575 - 544
0B
51
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 607 - 576
0B
52
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 639 - 608
0B
53
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 671 - 640
0B
54
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 703 - 672
0B
55
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 735 - 704
0B
56
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 767 - 736
0B
57
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event)
342
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 9 - Monitoring and Control
Col
Row
Default Setting
Available Options
Description DDB 799 - 768
0B
58
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 831 - 800
0B
59
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 863 - 832
0B
5A
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 895 - 864
0B
5B
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 927 - 896
0B
5C
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 959 - 928
0B
5D
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 991 - 960
0B
5E
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1023 - 992
0B
5F
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1055 - 1024
0B
60
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1087 - 1056
0B
61
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1119 - 1088
0B
62
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1151 - 1120
0B
63
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event)
P14D-B/G/L/Z-TM-EN-1
343
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description DDB 1183 - 1152
0B
64
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1215 - 1184
0B
65
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1247 - 1216
0B
66
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1279 - 1248
0B
67
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1311 - 1280
0B
68
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1343 - 1312
0B
69
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1375 - 1344
0B
6A
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1407 - 1376
0B
6B
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1439 - 1408
0B
6C
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1471 - 1440
0B
6D
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1503 - 1472
0B
6E
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1535 - 1504
0B
6F
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event)
344
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 9 - Monitoring and Control
Col
Row
Default Setting
Available Options
Description DDB 1567 - 1536
0B
70
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1599 - 1568
0B
71
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1631 - 1600
0B
72
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1663 - 1632
0B
73
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1695 - 1664
0B
74
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1727 - 1696
0B
75
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1759- 1728
0B
76
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1791- 1760
0B
77
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1823 - 1792
0B
78
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1855 - 1824
0B
79
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1887 - 1856
0B
7A
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1919 - 1888
0B
7B
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event)
P14D-B/G/L/Z-TM-EN-1
345
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description DDB 1951 - 1920
0B
7C
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 1983 - 1952
0B
7D
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 2015 - 1984
0B
7E
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event) DDB 2047 - 2016
0B
7F
0xFFFFFFFF
32-bit binary flag (data type G27) 1 = event recording Enabled 0 = event recording Disabled
These signals can be included or excluded from being stored as a Courier event record (assuming the DDB is capable of creating an event)
You can view the event records using the settings application software or with the front HMI. You select the event to be viewed on the LCD with the Select Event cell in the VIEW RECORDS column. A value of '0' corresponds to the latest event, '1' the next latest and so on. The following subsequent cells display details pertaining to the chosen event. Not all cells are relevant in all cases. The cells displayed depend on the type of event. ● ● ● ● ● ●
Menu Cell Ref: indicates the event type Time & Date: indicates the time and date the event occurred Record Text: displays the event description (2 lines of 16 characters) Record Value: displays a 32 bit binary number representing the event Evt Iface Source: displays the interface on which the event was logged Evt Access Level: records the access level of the interface that initiated the event. This access level is displayed in this cell. ● Evt Extra Info: provides ing information for the event and can vary between the different event types. ● Evt Unique ID: displays the unique event ID associated with the event. ● Reset indication: resets the trip LED indications provided that the relevant protection element has reset.
2.2
EVENT TYPES
There are several different types of event: ● ● ● ● ● ● ● ●
346
Opto-input events (Change of state of opto-input) events (Change of state of output relay ) Alarm events Protection events (starts and trips) Fault record notifications Maintenance report notifications Security Events Platform Events
P14D-B/G/L/Z-TM-EN-1
P14D
2.2.1
Chapter 9 - Monitoring and Control
OPTO-INPUT EVENTS
If one or more of the opto-inputs has changed state since the last time the protection algorithm ran, the new logical state is logged as an event. Details of the event are displayed in the VIEW RECORDS column. A Time and Date stamp is always associated with the event in question and this is always displayed first. The event type description shown in the Record Text cell for this type of event is always 'Logic Inputs #' where # is the batch number of the opto-inputs. This is '1', for the first batch of 32 opto-inputs and '2' for the second batch of 32 opto-inputs (if applicable). The event value shown in the Record Value cell for this type of event is a binary string of data type G8 depicting their logical states, whereby the LSB (on the right) corresponds to the first opto-input. The same information is also shown in the Opto I/P Status cell in the SYSTEM DATA column.
2.2.2
EVENTS
If one or more of the output relays has changed state since the last time the protection algorithm ran, the new logical state is logged as an event. Details of the event are displayed in the VIEW RECORDS column, A Time and Date stamp is always associated with the event in question and this is always displayed first The event type description shown in the Record Text cell for this type of event is always 'Output s #' where # is the batch number of the relay output s. This is '1', for the first batch of 32 output s and '2' for the second batch of 32 output s (if applicable). The event value shown in the Record Value cell for this type of event is a binary string of data type G9 depicting their logical states, whereby the LSB (on the right) corresponds to the first output . The same information is also shown in the Relay O/P Status cell in the SYSTEM DATA column.
2.2.3
ALARM EVENTS
The IED logs any alarm conditions it generates as individual events. Details of the event are displayed in the VIEW RECORDS column. A Time and Date stamp is always associated with the event in question and this is always displayed first The event type description shown in the Record Text cell for this type of event is dependent on the alarm type of which there are many. These are defined in data types G96-1, G96-2 and G228 as shown below: The same information is also shown in the Alarm Status 1, Alarm Status 2 and Alarm Status 3 cells in the SYSTEM DATA column. Note: Alarm Status 1 is duplicated in cells 22 and 50.
The event value is not shown in the Record Value cell for this type of event. It is intended for use by the extraction software. Data Type G96-1: Product Alarm Status 1 Event Text
Bit Number
Description
Bit 1
Product Alarm Status 1 (2 s)
Unused
Bit 2
Unused
Unused
Bit 3
Unused
Setting group via opto invalid
Bit 4
SG-opto Invalid ON/OFF
Protection Disabled
Bit 5
Prot'n Disabled ON/OFF
Frequency out of range
Bit 6
F out of Range ON/OFF
VTS Alarm
P14D-B/G/L/Z-TM-EN-1
347
Chapter 9 - Monitoring and Control
Bit Number
P14D
Event Text
Description
Bit 7
VT Fail Alarm ON/OFF
CTS Alarm
Bit 8
CT Fail Alarm ON/OFF
CB Trip Fail Protection
Bit 9
CB Fail Alarm ON/OFF
Broken current Maintenance Alarm
Bit 10
I^ Maint Alarm ON/OFF
Broken current Lockout Alarm
Bit 11
I^ Lockout Alarm ON/OFF
No of CB Ops Maintenance Alarm
Bit 12
CB Ops Maint ON/OFF
No of CB Ops Lockout Alarm
Bit 13
CB Ops Lockout ON/OFF
CB Op Time Maintenance Alarm
Bit 14
CB Op Time Maint ON/OFF
CB Op Time Lockout Alarm
Bit 15
CB Op Time Lock ON/OFF
Excessive Fault Frequency Lockout Alarm
Bit 16
Fault Freq Lock ON/OFF
CB Status Alarm
Bit 17
CB Status Alarm ON/OFF
CB Fail Trip Control
Bit 18
Man CB Trip Fail ON/OFF
CB Fail Close Control
Bit 19
Man CB Cls Fail ON/OFF
No Healthy Control Close
Bit 20
Man CB Unhealthy ON/OFF
No C/S control close
Bit 21
Man No Checksync ON/OFF
A/R Lockout
Bit 22
A/R Lockout ON/OFF
A/R CB Not healthy
Bit 23
A/R CB Unhealthy ON/OFF
A/R No Checksync
Bit 24
A/R No Checksync ON/OFF
System Split
Bit 25
System Split ON/OFF
UV Block
Bit 26
UV Block ON/OFF
Definable Alarm 1 (Self Reset)
Bit 27
SR Alarm 1 ON/OFF
Definable Alarm 2 (Self Reset)
Bit 28
SR Alarm 2 ON/OFF
Definable Alarm 3 (Self Reset)
Bit 29
SR Alarm 3 ON/OFF
Definable Alarm 4 (Self Reset)
Bit 30
SR Alarm 4 ON/OFF
Definable Alarm 5 (Self Reset)
Bit 31
SR Alarm 5 ON/OFF
Definable Alarm 6 (Self Reset)
Bit 32
SR Alarm 6 ON/OFF
Definable Alarm 7 (Self Reset)
Data Type G96-2: Product Alarm Status 2 Bit Number
Event Text
Description
Bit 1
Unused
Unused
Bit 2
Unused
Unused
Bit 3
Unused
Unused
Bit 4
Unused
Unused
Bit 5
SR Alarm 8 ON/OFF
Definable Alarm 8 (Self Reset)
Bit 6
SR Alarm 9 ON/OFF
Definable Alarm 9 (Self Reset)
Bit 7
SR Alarm 10 ON/OFF
Definable Alarm 10 (Self Reset)
Bit 8
SR Alarm 11 ON/OFF
Definable Alarm 11 (Self Reset)
Bit 9
SR Alarm 12 ON/OFF
Definable Alarm 12 (Self Reset)
Bit 10
SR Alarm 13 ON/OFF
Definable Alarm 13 (Self Reset)
Bit 11
SR Alarm 14 ON/OFF
Definable Alarm 14 (Self Reset)
Bit 12
SR Alarm 15 ON/OFF
Definable Alarm 15 (Self Reset)
Bit 13
SR Alarm 16 ON/OFF
Definable Alarm 16 (Self Reset)
Bit 14
SR Alarm 17 ON/OFF
Definable Alarm 17 (Self Reset)
348
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Bit Number
Event Text
Description
Bit 15
MR Alarm 18 ON/OFF
Definable Alarm 18 (Latched)
Bit 16
MR Alarm 19 ON/OFF
Definable Alarm 19 (Latched)
Bit 17
MR Alarm 20 ON/OFF
Definable Alarm 20 (Latched)
Bit 18
MR Alarm 21 ON/OFF
Definable Alarm 21 (Latched)
Bit 19
MR Alarm 22 ON/OFF
Definable Alarm 22 (Latched)
Bit 20
MR Alarm 23 ON/OFF
Definable Alarm 23 (Latched)
Bit 21
MR Alarm 24 ON/OFF
Definable Alarm 24 (Latched)
Bit 22
MR Alarm 25 ON/OFF
Definable Alarm 25 (Latched)
Bit 23
MR Alarm 26 ON/OFF
Definable Alarm 26 (Latched)
Bit 24
MR Alarm 27 ON/OFF
Definable Alarm 27 (Latched)
Bit 25
MR Alarm 28 ON/OFF
Definable Alarm 28 (Latched)
Bit 26
MR Alarm 29 ON/OFF
Definable Alarm 29 (Latched)
Bit 27
MR Alarm 30 ON/OFF
Definable Alarm 30 (Latched)
Bit 28
MR Alarm 31 ON/OFF
Definable Alarm 31 (Latched)
Bit 29
MR Alarm 32 ON/OFF
Definable Alarm 32 (Latched)
Bit 30
MR Alarm 33 ON/OFF
Definable Alarm 33 (Latched)
Bit 31
MR Alarm 34 ON/OFF
Definable Alarm 34 (Latched)
Bit 32
MR Alarm 35 ON/OFF
Definable Alarm 35 (Latched)
Data Type G228: Product Alarm Status 3 Bit Number
Event Text
Description
Bit 1
Unused
Unused
Bit 2
Unused
Unused
Bit 3
Unused
Unused
Bit 4
GOOSE IED Absent
GOOSE IED Absent
Bit 5
NIC Not Fitted
NIC Not Fitted
Bit 6
NIC No Response
NIC No Response
Bit 7
NIC Fatal Error
NIC Fatal Error
Bit 8
Unused
Unused
Bit 9
Bad T/IP Cfg.
Bad T/IP Cfg.
Bit 10
Unused
Unused
Bit 11
NIC Link Fail
NIC Link Fail
Bit 12
NIC SW Mis-Match
NIC SW Mis-Match
Bit 13
IP Addr Conflict
IP Addr Conflict
Bit 14
Unused
Unused
Bit 15
Unused
Unused
Bit 16
Unused
Unused
Bit 17
Unused
Unused
Bit 18
Unused
Unused
Bit 19
Bad DNP Settings
Bad DNP Settings
Bit 20
Unused
Unused
Bit 21
Unused
Unused
Bit 22
Unused
Unused
P14D-B/G/L/Z-TM-EN-1
349
Chapter 9 - Monitoring and Control
Bit Number
P14D
Event Text
Description
Bit 23
Unused
Unused
Bit 24
Unused
Unused
Bit 25
Unused
Unused
Bit 26
Unused
Unused
Bit 27
Unused
Unused
Bit 28
Unused
Unused
Bit 29
Unused
Unused
Bit 30
Unused
Unused
Bit 31
Unused
Unused
Bit 32
Unused
Unused
2.2.4
PROTECTION EVENTS
The IED logs protection starts and trips as individual events. Details of the event are displayed in the VIEW RECORDS column. A Time and Date stamp is always associated with the event in question and this is always displayed first. The event type description shown in the Record Text cell for this type of event is dependent on the protection event that occurred. Each time a protection event occurs, a DDB signal changes state. It is the name of this DDB signal followed by 'ON' or 'OFF' that appears in the Record Text cell. The event value is not shown in the Record Value cell for this type of event. It is intended for use by the extraction software. However, the binary strings can be viewed in the COMMISSION TESTS column in the relevant DDB batch cells.
2.2.5
FAULT RECORD EVENTS
An event record is created each time a fault record is generated. This event record is different from the Fault Record itself. The event record simply states that a fault record was generated, but contains no details of the fault. Details of the event are displayed in the VIEW RECORDS column. A Time and Date stamp is always associated with the event in question and this is always displayed first. The event type description shown in the Record Text cell for this type of event is just 'Fault Record'.
2.2.6
MAINTENANCE EVENTS
Internal failures detected by the self-monitoring circuitry are logged as maintenance records. An event record is created each time this happens. Details of the event are displayed in the VIEW RECORDS column. A Time and Date stamp is always associated with the event in question and this is always displayed first The event type description shown in the Record Text cell for this type of event is always 'Maint Recorded.' The Record Value cell also provides a unique binary code, which should be noted.
2.2.7
SECURITY EVENTS
An event record is generated each time a setting is executed, which requires an access level. A Time and Date stamp is always associated with the event in question and this is always displayed first. The event type description shown in the Record Text cell displays the type of change. These are as follows:
350
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Event Value
Event Text
Description
0
Logged In
A has logged in
1
Logged Out
A has logged out
2
P/Word Set Blank
A blank has been set
3
P/Word Not NERC
The is not NERC compliant
4
Changed
The has changed
5
Blocked
The has been blocked
6
P/Word Unblocked
The has been unblocked
7
P/W Ent When Blk
The has been entered while it is blocked
8
Inval PW Entered
An invalid has been entered
9
P/Word Timed Out
The has timed out
10
Rcvy P/W Entered
The recovery has been entered
11
IED Sec Code Rd
The IED security code has been read
12
IED Sec Code Exp
The IED security code timer has expired
13
Port Disabled
A port has been disabled
14
Port Enabled
A port has been enabled
15
Def Dsp Not NERC
The default display is not NERC compliant
16
PSL Stng D/Load
PSL settings have been ed to the IED
17
DNP Stng D/Load
DNP settings have been ed to the IED
18
Trace Dat D/Load
Trace Data has been ed to the IED
19
IED Confg D/Load
A configuration file has been ed to the IED
20
Crv D/Load
A curve has been ed to the IED
21
Setng Grp D/Load
A settings group has been ed to the IED
22
DR Settng D/Load
A Disturbance Recorder setting has been ed to the IED
23
PSL Stng
PSL settings have been ed from the IED
24
DNP Stng
DNP settings have been ed from the IED
25
Trace Dat
Trace Data has been ed from the IED
26
IED Confg
A configuration file has been ed from the IED
27
Crv
A curve has been ed from the IED
28
PSL Confg
A PSL configuration has been ed from the IED
29
Settings
Settings have been ed from the IED
30
Events Extracted
Events have been extracted
31
Actv. Grp Desel. By "Interface"
The active group has been deselected by an interface
32
Actv. Grp Select By "Interface"
The active group has been selected by an interface
33
Actv. Grp Desel. By Opto
The active group has been deselected by a digital input
34
Actv. Grp Select By Opto
The active group has been selected by a digital input
35
C & S Changed
A control and setting has changed
36
DR Changed
A Disturbance Recorder setting has changed
37
Settings Changed
Settings have been changed
38
Def Set Restored
The default setting has been restored
39
Def Crv Restored
The default curve has been restored
40
Power On
The power has been switched on
41
App ed
An application has been ed to the IED
42
IRIG-B Set None
IRIG-B interface has been set to "None"
P14D-B/G/L/Z-TM-EN-1
351
Chapter 9 - Monitoring and Control
Event Value
P14D
Event Text
Description
43
IRIG-B Set Port1
IRIG-B interface has been set to "RP1"
44
IRIG-B Set Port2
IRIG-B interface has been set to "RP2"
2.2.8
PLATFORM EVENTS
There is a group of events that come under the classification "General Events". A Time and Date stamp is always associated with the event in question and this is always displayed first. The event type description shown in the Record Text cell displays the type of change. These are as follows: Event Value
Event Text
Description
0
Alarms Cleared
The alarm log has been cleared
1
Events Cleared
The events log has been cleared
2
Faults Cleared
The fault log has been cleared
3
Maint Cleared
The maintenance log has been cleared
4
IRIG-B Active
IRIG-B is active
5
IRIG-B Inactive
IRIG-B is inactive
6
Time Synch
The time has been synchronised
7
Indication Reset
The LED indications have been reset
14
NIC Link Fail
The Network Interface Card has failed
15
Dist Rec Cleared
The disturbance records have been cleared
16
IO Upgrade OK
The I/O has been upgraded successfully
2.3
FAULT RECORDS
A fault record is triggered by the Fault REC TRIG signal DDB, which is assigned in the PSL. If there are any fault records, these will appear automatically in the VIEW RECORDS column. You can select the fault record in the Select Fault cell in the VIEW RECORDS column. A value of '0' corresponds to the latest fault record. Information about the fault follows in the subsequent cells. The time stamp assigned to the fault record itself is more accurate than the corresponding stamp of the event record, because the event is logged some time after the actual fault record is generated. The fault measurements in the fault record are given at the time of the protection Start. The fault recorder does not stop recording until the Start or Trip resets. Note: We recommend that you set the triggering to ‘self reset’ and not 'latching'. This is because if you use a latching , the fault record would not be generated until the has been fully reset.
2.4
MAINTENANCE RECORDS
Internal failures detected by the self-monitoring circuitry, such as watchdog failure are logged as maintenance records. If there are any maintenance records, these will appear automatically in the VIEW RECORDS column. You can select the maintenance record in the Select Maint cell in the VIEW RECORDS column. A value of '0' corresponds to the latest maintenance record. The subsequent cells Maint Text, Maint Type, and Maint Data display details pertaining to the chosen maintenance record, whereby: Maint Text: displays a description of the maintenance record Maint Type: indicates the type of maintenance record Event Value 6
352
Event Text
Description
FPGA Health Err There is a Field Programmable Gate Array error
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Event Value
Event Text
Description
7
IO Card Error
There is an I/O card error
9
Code Fail
There is a code verification failure
14
Software Failure
There is a general software failure
15
H/W Fail
There is a hardware verification failure
16
Non Standard
There is a non-standard error
17
Ana. Sample Fail There is a failure with the analogue signal sampling
18
NIC Soft Error
22
PSL Latch Reset A PSL latch has been reset
23
Control IP Reset
A control input has been reset
24
Fn Keys Reset
A function key has been reset
25
SR Gates Reset
An SR gate has been reset
26
System Error
There is a system error
27
Solicited Reboot
The device has ben requested to reboot.
28
Unrec'ble Error
There is an unrecoverable internal error. The device will reboot after the maintenance record has been created
29
Lockout Request
A lockout has been requested. This is generated whenever maintenance access is gained through the USB port
30
IO Upgrade Fail
There has been an I/O upgrade failure. This can be caused by a faulty I/O card, or the boot loader enable bit on the micro-controller being disabled.
31
Application Fail
An application has failed
32
System Restart
Not used
33
Unknown Error
There is an unknown error
34
FPGA Failure
The Field Programmable Gate Array has failed
35
Upgrade Mode Req
Upgrade mode has been requested. This is generated whenever maintenance access is gained through the USB port
36
Invalid MAC Addr The device has an invalid MAC address
There is a Network Interface Card error
Maint Data: displays the error code of the maintenance record The maintenance records are as follows:
VIEW RECORDS COLUMN
2.5
Menu Text
Col
Row
Default Setting
Available Options
Description VIEW RECORDS
01
00
This column contains information about records. Most of these cells are not editable. Select Event [0...n]
01
01
0
From 0 to 2048 step 1
This setting selects the required event record. A value of 0 corresponds to the latest event, 1 the second latest and so on. Menu Cell Ref
01
02
(From Record)
<Event type>
03
(From Record)
This cell indicates the type of event Time & Date
01
This cell shows the Time & Date of the event, given by the internal Real Time Clock. Record Text
01
04
Not Settable
This cell shows the description of the event - up to 32 Characters over 2 lines.
P14D-B/G/L/Z-TM-EN-1
353
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description Record Value
01
05
Not Settable
This cell displays a 32 bit binary Flag representing the event. Select Fault [0...n]
01
06
0
From 0 to 9 step 1
This setting selects the required fault record from those stored. A value of 0 corresponds to the latest fault and so on. Faulted Phase
01
07
08
<Start signal status>
This cell displays the faulted phase. Start Elements 1
01
This cell displays the status of the first set of 32 start signals. Start Elements 2
01
09
<Start signal status>
This cell displays the status of the second set of 32 start signals. Start Elements 3
01
0A
<Start signal status>
This cell displays the status of the third set of 32 start signals. Start Elements 4
01
0B
<Start signal status>
This cell displays the status of the fourth set of 32 start signals. Trip Elements 1
01
0C
<Start signal status>
This cell displays the status of the first set of 32 trip signals. Trip Elements 2
01
0D
<Start signal status>
This cell displays the status of the second set of 32 trip signals. Trip Elements 3
01
0E
<Start signal status>
This cell displays the status of the third set of 32 trip signals. Trip Elements 4
01
0F
<Start signal status>
This cell displays the status of the fourth set of 32 trip signals. Fault Alarms
01
10
This cell displays the status of the fault alarm signals. Fault Time
01
11
This cell displays the time and date of the fault Active Group
01
12
This cell displays the active settings group System Frequency
01
13
<System frequency>
This cell displays the system frequency Fault Duration
01
14
This cell displays the duration of the fault time CB Operate Time
01
15
This cell displays the CB operate time IED Trip Time
01
16
This cell displays the time from protection start to protection trip Fault Location
01
17
This cell displays the fault location in metres. Fault Location
01
18
This cell displays the fault location in miles. Fault Location
01
19
This cell displays the fault location in ohms.
354
P14D-B/G/L/Z-TM-EN-1
P14D
Menu Text
Chapter 9 - Monitoring and Control
Col
Row
Default Setting
Available Options
Description Fault Location
01
1A
This cell displays the fault location in percentage. IA
01
1B
This cell displays the phase A current IB
01
1C
This cell displays the phase B current IC
01
1D
This cell displays the phase C current VAB
01
1E
This cell displays VA with respect to VB VBC
01
1F
This cell displays VB with respect to VC VCA
01
20
This cell displays VC with respect to VA IN Measured
01
21
This cell displays the value of measured neutral current IN Derived
01
22
This cell displays the value of derived neutral current IN Sensitive
01
23
This cell displays the value of sensitive neutral current IREF Diff
01
24
This cell displays the value of Restricted Earth Fault differential current IREF Bias
01
25
This cell displays the value of Restricted Earth Fault bias current VAN
01
26
This cell displays VA with respect to Neutral VBN
01
27
This cell displays VB with respect to Neutral VCN
01
28
This cell displays VC with respect to Neutral VN Derived
01
29
Not Settable
This cell displays the derived Earth fault voltage VN Measured
01
29
Not Settable
This cell displays the measured Earth fault voltage DC Supply Mag
01
30
Not Settable
This cell displays the Auxiliary Supply Voltage level Select Maint [0...n]
01
F0
Manual override to select a fault record.
From 0 to 9 step 1
This setting selects the required maintenance report from those stored. A value of 0 corresponds to the latest report. Maint Text
01
F1
<Maintenance record description>
This cell displays the description of the maintenance record Maint Type
01
F2
Not Settable
This is the type of maintenance record
P14D-B/G/L/Z-TM-EN-1
355
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description Maint Data
01
F3
Not Settable
This is the maintenance record data (error code) Evt Iface Source
01
FA
This cell displays the interface on which the event was logged Evt Access Level
01
FB
<Event access level>
Any security event that indicates that it came from an interface action, such as disabling a port, will also record the access level of the interface that initiated the event. This access level is displayed in this cell. Evt Extra Info
01
FC
<Extra event information>
This cell provides ing information for the event and can vary between the different event types. Evt Unique Id
01
FE
<Event ID>
This cell displays the unique event ID associated with the event. Reset Indication
01
FF
No
0=No 1=Yes
This command resets the trip LED indications provided that the relevant protection element has reset.
356
P14D-B/G/L/Z-TM-EN-1
P14D
3
Chapter 9 - Monitoring and Control
DISTURBANCE RECORDER
The disturbance recorder can record the waveforms of the calibrated analogue channels, plus the values of the digital signals. The disturbance recorder is supplied with data once per cycle, and collates the received data into a disturbance record. The disturbance records can be extracted using application software or the SCADA system, which can also store the data in COMTRADE format, allowing the use of other packages to view the recorded data. The integral disturbance recorder has an area of memory specifically set aside for storing disturbance records. The number of records that can be stored is dependent on the recording duration. The maximum total recording time is 94.5 seconds, whereby the minimum duration is 0.1 s and the maximum duration is 10.5 s. When the available memory is exhausted, the oldest records are overwritten by the newest ones. The disturbance recorder stores the samples that are taken at a rate of 24 samples per cycle. Each disturbance record consists of 8 analogue data channels and 32 digital data channels. The relevant CT and VT ratios for the analogue channels are also extracted to enable scaling to primary quantities. Note: If a CT ratio is set less than unity, the device will choose a scaling factor of zero for the appropriate channel.
The DISTURBANCE RECORDER menu column is summarised in the following table: Menu Text
Col
Row
Default Setting
Available Options
Description DISTURB RECORDER
0C
00
This column contains settings for the Disturbance Recorder Duration
0C
01
1.5
0.1s to 10.5s step 0.01s
33.3
0 to 100 step 0.1
This setting sets the overall recording time. Trigger Position
0C
02
This setting sets the trigger point as a percentage of the duration. For example, the default setting, which is set to 33.3% (of 1.5s) gives 0.5s prefault and 1s post fault recording times. Trigger Mode
0C
03
Single
0 = Single or 1 = Extended
When set to single mode, if a further trigger occurs whilst a recording is taking place, the recorder will ignore the trigger. However, if this has been set to Extended, the post trigger timer will be reset to zero, thereby extending the recording time.
Analog Channel 1 to 9
0C
04 to 0C
VA
0=VA 1=VB 2=VC 3=V Checksync or VN 4=IA 5=IB 6=IC 7=IN-ISEF 8=Frequency 9=Unused
This setting selects any available analogue input to be assigned to this channel. Digital Input 1 to 32
0C
0D to 4B (even) Relay 1
See Data Types - G32
The digital channels may monitor any of the opto-inputs, output relay s and other internal digital signals, such as protection starts, LEDs etc. This setting assigns the digital channel to any one of these. Input 1 to 32 Trigger
0C
0E to 4C (odd)
No Trigger
0 = No Trigger, 1 = Trigger L/H, 2 = Trigger H/L
This setting defines whether the digital input is triggered and if so, the trigger polarity (low to high or high to low).
P14D-B/G/L/Z-TM-EN-1
357
Chapter 9 - Monitoring and Control
P14D
The fault recording times are set by a combination of the Duration and Trigger Position cells. The Duration cell sets the overall recording time and the Trigger Position cell sets the trigger point as a percentage of the duration. For example, the default settings show that the overall recording time is set to 1.5 s with the trigger point being at 33.3% of this, giving 0.5 s pre-fault and 1 s post fault recording times. With the Trigger Mode set to 'Single', if further triggers occurs whilst a recording is taking place, the recorder will ignore the trigger. However, with the Trigger Mode set to 'Extended', the post trigger timer will be reset to zero, thereby extending the recording time. You can select any of the IED's analogue inputs as analogue channels to be recorded. You can also map any of the opto-inputs output s to the digital channels. In addition, you may also map a number of internal DDB signals such as Starts and LEDs to digital channels. You may choose any of the digital channels to trigger the disturbance recorder on either a low to high or a high to low transition, via the Input Trigger cell. The default settings are such that any dedicated trip output s will trigger the recorder. It is not possible to view the disturbance records locally via the front LCD. You must extract these using suitable software such as MiCOM S1 Agile.
358
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
4
MEASUREMENTS
4.1
MEASURED QUANTITIES
The device measures directly and calculates a number of system quantities, which are updated every second. You can view these values in the MEASUREMENTS columns or with the MiCOM S1 Agile Measurement Viewer. Depending on the model, the device may measure and display some or more of the following quantities: ● ● ● ● ● ●
Measured currents and calculated sequence and RMS currents Measured voltages and calculated sequence and RMS voltages Power and energy quantities Peak, fixed and rolling demand values Frequency measurements Others measurements
4.1.1
MEASURED AND CALCULATED CURRENTS
The device measures phase-to-phase and phase-to-neutral current values. The values are produced by sampling the analogue input quantities, converting them to digital quantities and using special algorithms to present the magnitude and phase values. Sequence quantities are produced by processing the measured values. These are also displayed as magnitude and phase angle values. RMS phase voltage and current values are calculated using the sum of the samples squared over a cycle of sampled data These measurements are contained in the MEASUREMENTS 1 column.
4.1.2
MEASURED AND CALCULATED VOLTAGES
The device measures phase-to-phase and phase-to-neutral voltage values. The values are produced by sampling the analogue input quantities, converting them to digital quantities and using special algorithms to present the magnitude and phase values. Sequence quantities are produced by processing the measured values. These are also displayed as magnitude and phase angle values. RMS phase voltage and current values are calculated using the sum of the samples squared over a cycle of sampled data. These measurements are contained in the MEASUREMENTS 1 column.
4.1.3
POWER AND ENERGY QUANTITIES
Using the measured voltages and currents the device calculates the apparent, real and reactive power quantities. These are produced on a phase by phase basis together with three-phase values based on the sum of the three individual phase values. The g of the real and reactive power measurements can be controlled using the measurement mode setting. The four options are defined in the table below: Measurement Mode
Parameter
g
0 (Default)
Export Power Import Power Lagging Vars Leading VArs
+ – + –
1
Export Power Import Power Lagging Vars Leading VArs
– + + –
2
Export Power Import Power Lagging Vars Leading VArs
+ – – +
P14D-B/G/L/Z-TM-EN-1
359
Chapter 9 - Monitoring and Control
P14D
Measurement Mode
Parameter Export Power Import Power Lagging Vars Leading VArs
3
g – + – +
The device also calculates the per-phase and three-phase power factors. These power values are also used to increment the total real and reactive energy measurements. Separate energy measurements are maintained for the total exported and imported energy. The energy measurements are incremented up to maximum values of 1000 GWhr or 1000 GVARhr at which point they will reset to zero, it is also possible to reset these values using the menu or remote interfaces using the Reset demand cell. These measurements are contained in the MEASUREMENTS 2 column.
4.1.4
DEMAND VALUES
The device produces fixed, rolling and peak demand values. It is possible to reset these quantities using the Reset demand cell. The fixed demand value is the average value of a quantity over the specified interval. Values are produced for each phase current and for three phase real and reactive power. The fixed demand values displayed are those for the previous interval. The values are updated at the end of the fixed demand period. The rolling demand values are similar to the fixed demand values, the difference being that a sliding window is used. The rolling demand window consists of a number of smaller sub-periods. The resolution of the sliding window is the sub-period length, with the displayed values being updated at the end of each of the sub-periods. Peak demand values are produced for each phase current and the real and reactive power quantities. These display the maximum value of the measured quantity since the last reset of the demand values. These measurements are contained in the MEASUREMENTS 2 column.
4.1.5
FREQUENCY MEASUREMENTS
The device produces a range of frequency statistics and measurements relating to the Frequency Protection function. These include Check synchronisation and Slip frequency measurements found in the MEASUREMENTS 1 column, Rate of Change of Frequency measurements found in the MEASUREMENTS 3 column, and Frequency Protection statistics found in the FREQ STAT column. The device produces the slip frequency measurement by measuring the rate of change of phase angle between the bus and line voltages, over a one-cycle period. The slip frequency measurement assumes the bus voltage to be the reference phasor.
4.1.6
OTHER MEASUREMENTS
Depending on the model, the device produces a range of other measurements such as 2nd harmonic, thermal, SEF power, impedance and additional frequency measurements. These measurements are contained in the MEASUREMENTS 3 column.
4.2
MEASUREMENT SETUP
You can define the way measurements are set up and displayed using the MEASURE'T SETUP column, as shown below:
360
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description MEASURE'T SETUP
0D
00
This column contains settings for the measurement setup
Default Display
0D
01
0 = Banner, 1 = 3Ph + N Current, 2 = 3Ph Voltage, 3 = Power, 4 = Date and Time, 5 = Description, 6 = Plant Reference, 7 = Frequency, 8 = Access Level 9 = DC Supply Mag
Banner
This setting is used to select the default display from a range of options. Local Values
0D
02
Primary
0 = Primary or 1 = Secondary
This setting controls whether local measured values (via HMI or front port) are displayed as primary or secondary quantities. Remote Values
0D
03
Primary
0 = Primary or 1 = Secondary
This setting controls whether remote measured values (via rear comms ports) are displayed as primary or secondary quantities.
Measurement Ref
0D
04
0 = VA, 1 = VB, 2 = VC, 3 = IA, 4 = IB, 5 = IC
VA
This setting sets the phase reference for all angular measurements (for Measurements 1 only). Measurement Mode
0D
05
0
from 0 to 3 in steps of 1
This setting is used to control the g of the real and reactive power quantities. Fix Dem Period
0D
06
30
From 1m to 99m step 1m
This setting defines the length of the fixed demand window in minutes Roll Sub Period
0D
07
30
From 1m to 99m step 1m
This setting is used to set the length of the window used for the calculation of rolling demand quantities (in minutes). Num Sub Periods
0D
08
1
1 to 15 step 1
This setting is used to set the resolution of the rolling sub window. Distance Unit
0D
09
Miles
0 = Kilometres or 1 = Miles
This setting is used to select the unit of distance for fault location purposes. Fault Location
0D
0A
Distance
0 = Distance, 1 = Ohms, 2 = % of Line
This setting sets the way the fault location is displayed - in of distance, impedance, or percentage of line length. Remote 2 Values
0D
0B
Primary
0 = Primary or 1 = Secondary
The setting defines whether the values measured via the Second Rear Communication port are displayed in primary or secondary .
4.3
MEASUREMENT TABLES Menu Text
Col
Row
Default Setting
Available Options
Description MEASUREMENTS 1
02
00
This column contains measurement parameters IA Magnitude
P14D-B/G/L/Z-TM-EN-1
02
01
Not Settable
361
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description IA Magnitude IA Phase Angle
02
02
Not Settable
02
03
Not Settable
02
04
Not Settable
02
05
Not Settable
02
06
Not Settable
02
07
Not Settable
02
08
Not Settable
02
09
Not Settable
02
0A
Not Settable
02
0B
Not Settable
02
0C
Not Settable
02
0D
Not Settable
02
0E
Not Settable
02
0F
Not Settable
02
10
Not Settable
02
11
Not Settable
02
12
Not Settable
02
14
Not Settable
02
15
Not Settable
02
16
Not Settable
02
17
Not Settable
IA Phase Angle IB Magnitude IB Magnitude IB Phase Angle IB Phase Angle IC Magnitude IC Magnitude IC Phase Angle IC Phase Angle IN Measured Mag IN Measured Magnitude IN Measured Ang IN Measured Phase Angle IN Derived Mag IN Derived Magnitude IN Derived Angle IN Derived Phase Angle ISEF Magnitude ISEF Magnitude ISEF Angle ISEF Phase Angle I1 Magnitude I1 Magnitude I2 Magnitude I2 Magnitude I0 Magnitude I0 Magnitude IA RMS IA RMS IB RMS IB RMS IC RMS IC RMS VAB Magnitude VAB Magnitude VAB Phase Angle VAB Phase Angle VBC Magnitude VBC Magnitude VBC Phase Angle
362
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description VBC Phase Angle VCA Magnitude
02
18
Not Settable
02
19
Not Settable
02
1A
Not Settable
02
1B
Not Settable
02
1C
Not Settable
02
1D
Not Settable
02
1E
Not Settable
02
1F
Not Settable
02
22
Not Settable
02
22
Not Settable
02
23
Not Settable
02
23
Not Settable
02
24
Not Settable
02
25
Not Settable
02
26
Not Settable
02
26
Not Settable
02
27
Not Settable
02
28
Not Settable
02
29
Not Settable
02
2D
Not Settable
02
2E
Not Settable
VCA Magnitude VCA Phase Angle VCA Phase Angle VAN Magnitude VAN Magnitude VAN Phase Angle VAN Phase Angle VBN Magnitude VBN Magnitude VBN Phase Angle VBN Phase Angle VCN Magnitude VCN Magnitude VCN Phase Angle VCN Phase Angle VN Derived Mag VN Derived Magnitude VN Measured Mag VN Measured Magnitide VN Derived Ang VN Derived Phase Angle VN Measured Ang VN Measured Phase Angle V1 Magnitude V1 Magnitude V2 Magnitude V2 Magnitude V0 Magnitude V0 Magnitude V0 Magnitude V0 Magnitude VAN RMS VAN RMS VBN RMS VBN RMS VCN RMS VCN RMS Frequency Frequency C/S Voltage Mag
P14D-B/G/L/Z-TM-EN-1
363
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description Check Synchronisation Voltage Magnitude C/S Voltage Ang
02
2F
Not Settable
Check Synchronisation Voltage Phase Angle C/S Bus-Line Ang
02
30
Not Settable
Check Synchronisation Bus-to-Line Phase Angle Slip Frequency
02
31
Not Settable
02
40
Not Settable
02
41
Not Settable
02
42
Not Settable
02
43
Not Settable
02
44
Not Settable
02
45
Not Settable
02
46
Not Settable
02
47
Not Settable
02
48
Not Settable
02
49
Not Settable
02
4A
Not Settable
02
4A
Not Settable
02
4B
Not Settable
Slip Frequency I1 Magnitude I1 Magnitude I1 Phase Angle I1 Phase Angle I2 Magnitude I2 Magnitude I2 Phase Angle I2 Phase Angle I0 Magnitude I0 Magnitude I0 Phase Angle I0 Phase Angle V1 Magnitude V1 Magnitude V1 Phase Angle V1 Phase Angle V2 Magnitude V2 Magnitude V2 Phase Angle V2 Phase Angle V0 Magnitude V0 Magnitude V0 Magnitude V0 Magnitude V0 Phase Angle V0 Phase Angle
4.4
MEASUREMENT TABLE 2 Menu Text
Col
Row
Default Setting
Available Options
Description MEASUREMENTS 2
03
00
This column contains measurement parameters A Phase Watts
03
01
Not Settable
A Phase Watts
364
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description B Phase Watts
03
02
Not Settable
03
03
Not Settable
03
04
Not Settable
03
05
Not Settable
03
06
Not Settable
03
07
Not Settable
03
08
Not Settable
03
09
Not Settable
03
0A
Not Settable
03
0B
Not Settable
03
0C
Not Settable
03
0E
Not Settable
03
0F
Not Settable
03
10
Not Settable
03
11
Not Settable
03
12
Not Settable
03
13
Not Settable
03
14
Not Settable
03
15
Not Settable
03
16
Not Settable
17
Not Settable
B Phase Watts C Phase Watts C Phase Watts A Phase VArs A Phase VArs B Phase VArs B Phase VArs C Phase VArs C Phase VArs A Phase VA A Phase VA B Phase VA B Phase VA C Phase VA C Phase VA 3 Phase Watts 3 Phase Watts 3 Phase VArs 3 Phase VArs 3 Phase VA 3 Phase VA 3Ph Power Factor 3 Phase Power Factor APh Power Factor A Phase Power Factor BPh Power Factor B Phase Power Factor h Power Factor C Phase Power Factor 3Ph WHours Fwd 3 Phase Watt Hours Forward 3Ph WHours Rev 3 Phase Watt Hours Reverse 3Ph VArHours Fwd 3 Phase VAr Hours Forward 3Ph VArHours Rev 3 Phase VAr Hours Reverse 3Ph W Fix Demand
3 Phase Watts Fixed Demand 3Ph VArs Fix Dem
03
3 Phase VArs Fixed Demand
P14D-B/G/L/Z-TM-EN-1
365
Chapter 9 - Monitoring and Control
Menu Text
Col
P14D
Row
Default Setting
Available Options
Description IA Fixed Demand
03
18
Not Settable
03
19
Not Settable
03
1A
Not Settable
03
1B
Not Settable
1C
Not Settable
03
1D
Not Settable
03
1E
Not Settable
03
1F
Not Settable
03
20
Not Settable
03
21
Not Settable
03
22
Not Settable
03
23
Not Settable
03
24
Not Settable
03
25
IA Fixed Demand IB Fixed Demand IB Fixed Demand IC Fixed Demand IC Fixed Demand 3 Ph W Roll Dem
3 Phase Watts Rolling Demand 3Ph VArs RollDem
03
3 Phase VArs Rolling Demand IA Roll Demand IA Rolling Demand IB Roll Demand IB Rolling Demand IC Roll Demand IC Rolling Demand 3Ph W Peak Dem
3 Phase Watts Peak Demand 3Ph VAr Peak Dem 3 Phase VArs Peak Demand IA Peak Demand IA Peak Demand IB Peak Demand IB Peak Demand IC Peak Demand IC Peak Demand Reset Demand
No
0 = No or 1 = Yes
This command resets all the demand cells
4.5
MEASUREMENT TABLE 3 Menu Text
Col
Row
Default Setting
Available Options
Description MEASUREMENTS 3
04
00
This column contains measurement parameters Highest Phase I
04
01
Not Settable
04
02
Not Settable
04
03
Highest Phase current Thermal State Thermal State Reset Thermal
No
0 = No or 1 = Yes
This command resets the Thermal State IREF Diff
366
04
04
Not Settable
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description Retricted Earth Fault differential curent IREF Bias
04
05
Not Settable
04
0C
Not Settable
04
0D
Not Settable
04
0D
Not Settable
04
0E
Not Settable
04
0F
Not Settable
04
10
Not Settable
04
11
Not Settable
04
12
Not Settable
04
13
Not Settable
04
14
Not Settable
04
15
Not Settable
Retricted Earth Fault bias curent I2/I1 Ratio I2/I1 Ratio SEF Power Sensitive Earth Fault power SEF Power Sensitive Earth Fault power df/dt Rate of change of frequency IA 2ndHarm IA 2nd Harmonic IB 2ndHarm IB 2nd Harmonic IC 2ndHarm IC 2nd Harmonic APh Sen Watts A Phse Sensitive Watts APh Sen Vars A Phase Sensitive VArs APh Power Angle A Phase Power Angle Z1 Mag
Positive Sequence Impedance Magnitude Z1 Ang
04
16
Not Settable
17
Not Settable
04
18
Not Settable
04
19
Not Settable
04
1A
Not Settable
04
1B
Not Settable
04
1C
Not Settable
04
20
Not Settable
Positive Sequence Impedance Angle ZA Mag
04
Phase A Impedance Magnitude ZA Ang Phase A Impedance Angle ZB Mag
Phase B Impedance Magnitude ZB Ang Phase B Impedance Angle ZC Mag
Phase C Impedance Magnitude ZC Ang Phase C Impedance Angle DC Supply Mag
Auxiliary Supply Voltage level
P14D-B/G/L/Z-TM-EN-1
367
Chapter 9 - Monitoring and Control
5
I/O FUNCTIONS
5.1
FUNCTION KEYS
P14D
On models housed in 30TE cases or larger, a number of programmable function keys are available. This allows you to assign function keys to control functionality via the programmable scheme logic (PSL). Each function key is associated with a programmable tri-colour LED, which you can program to give the desired indication on activation of the function key. These function keys can be used to trigger any function that they are connected to as part of the PSL. The function key commands can be found in the FUNCTION KEYS column. Each function key is associated with a DDB signal as shown in the DDB table. You can map these DDB signals to any function available in the PSL. The Fn Key Status cell displays the status (energised or de-energised) of the function keys by means of a binary string, where each bit represents a function key starting with bit 0 for function key 1. Each function key has three settings associated with it, as shown: ● Fn Key (n) Mode, which allows you to configure the key as toggled or normal ● Fn Key (n), which enables or disables the function key ● Fn Key (n) label, which allows you to define the function key text that is displayed When the Fn Key (n) Mode cell is set to ‘Toggle’, the function key DDB signal output will remain in the set state until a reset command is given. In the ‘Normal’ mode, the function key DDB signal will remain energised for as long as the function key is pressed and will then reset automatically. In this mode, a minimum pulse duration can be programmed by adding a minimum pulse timer to the function key DDB output signal. The Fn Key (n) cell is used to enable (unlock) or disable the function key signals in PSL. The Lock setting has been provided to prevent further activation on subsequent key presses. This allows function keys that are set to ‘Toggled’ mode and their DDB signal active ‘high’, to be locked in their active state thus preventing any further key presses from deactivating the associated function. Locking a function key that is set to the “Normal” mode causes the associated DDB signals to be permanently off. This safety feature prevents any inadvertent function key presses from activating or deactivating critical functions. The Fn Key Label cell makes it possible to change the text associated with each individual function key. This text will be displayed when a function key is accessed in the function key menu, or it can be displayed in the PSL. The status of all function keys are recorded in non-volatile memory, in case of auxiliary supply interruption. Note: The device only recognises a single function key press at a time.
Note: A key press duration of at least 200 ms is required before it is recognised in PSL. This deglitching feature avoids accidental double presses.
5.1.1 Ordinal
FUNCTION KEY DDB SIGNALS Signal Name
Source
Type
Response
Description 712
368
Function Key 1
Software
Function Key
Protection event
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Ordinal
Signal Name
Source
Type
Response
Description DDB signal indicates that Function key 1 is active 713
Function Key 2
Software
Function Key
Protection event
Function Key
Protection event
DDB signal indicates that Function key 2 is active 714
Function Key 3
Software
DDB signal indicates that Function key 3 is active
5.1.2
FUNCTION KEY SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description FUNCTION KEYS
17
00
This column contains the function key definitions (only available for 30TE case). Fn Key Status
17
01
0
Binary flag: 0 = energised 1 = de-energised
This cell displays the status of each function key Fn Key 1
17
02
Unlocked
0 = Disabled 1 = Unlocked 2 = Locked
This setting activates function key 1. The ‘Lock’ setting allows a function key, which is in toggle mode, to be locked in its current active state. Fn Key 1 Mode
17
03
Toggled
0 = Normal or 1 = Toggled
This setting sets the function key mode. In ‘Toggle’ mode, a single key press set sand latches the function key output to ‘high’ or ‘low’ in the PSL. In ‘Normal’ mode the function key output remains high as long as key is pressed. Fn Key 1 Label
17
04
Function Key 1
ASCII text (characters 32 to 163 inclusive)
This setting lets you change the function key text to something more suitable for the application. Fn Key 2
17
05
Unlocked
0 = Disabled 1 = Unlocked 2 = Locked
This setting activates function key 2. The ‘Lock’ setting allows a function key, which is in toggle mode, to be locked in its current active state. Fn Key 2 Mode
17
06
Normal
0 = Normal or 1 = Toggled
This setting sets the function key mode. In ‘Toggle’ mode, a single key press set sand latches the function key output to ‘high’ or ‘low’ in the PSL. In ‘Normal’ mode the function key output remains high as long as key is pressed. Fn Key 2 Label
17
07
Function Key 2
ASCII text (characters 32 to 163 inclusive)
This setting lets you change the function key text to something more suitable for the application. Fn Key 3
17
08
Unlocked
0 = Disabled 1 = Unlocked 2 = Locked
This setting activates function key 3. The ‘Lock’ setting allows a function key, which is in toggle mode, to be locked in its current active state. Fn Key 3 Mode
17
09
Normal
0 = Normal or 1 = Toggled
This setting sets the function key mode. In ‘Toggle’ mode, a single key press set sand latches the function key output to ‘high’ or ‘low’ in the PSL. In ‘Normal’ mode the function key output remains high as long as key is pressed. Fn Key 3 Label
17
0A
Function Key 3
ASCII text (characters 32 to 163 inclusive)
This setting lets you change the function key text to something more suitable for the application.
P14D-B/G/L/Z-TM-EN-1
369
Chapter 9 - Monitoring and Control
5.2
P14D
LEDS
Depending on the model, a number of LEDs are used. Some are fixed function LEDs, some are programmable, and for devices with function keys there are LEDs associated with each function key.
5.2.1
FIXED FUNCTION LEDS
Four fixed-function LEDs on the left-hand side of the front indicate the following conditions. ● Trip (Red) switches ON when the IED issues a trip signal. It is reset when the associated fault record is cleared from the front display. Also the trip LED can be configured as self-resetting. ● Alarm (Yellow) flashes when the IED s an alarm. This may be triggered by a fault, event or maintenance record. The LED flashes until the alarms have been accepted (read), then changes to constantly ON. When the alarms are cleared, the LED switches OFF. ● Out of service (Yellow) is ON when the IED's protection is unavailable. ● Healthy (Green) is ON when the IED is in correct working order, and should be ON at all times. It goes OFF if the unit’s self-tests show there is an error in the hardware or software. The state of the healthy LED is reflected by the watchdog s at the back of the unit.
5.2.2
PROGRAMABLE LEDS
The device has a number of programmable LEDs. All of the programmable LEDs on the unit are tri-colour and can be set to RED, YELLOW or GREEN. In the 20TE case, four programmable LEDs are available. In 30TE, eight are available.
5.2.3
FUNCTION KEY LEDS
Adjacent to the function keys are programmable tri-colour LEDs. These should be associated with their respective function keys.
5.2.4
TRIP LED LOGIC
When a trip occurs, the trip LED is illuminated. It is possible to reset this with a number of ways: ● Directly with a reset command (by pressing the Clear Key) ● With a reset logic input ● With self-resetting logic You enable the automatic self-resetting with the Sys Fn Links cell in the SYSTEM DATA column. A '0' disables self resetting and a '1' enables self resetting. The reset occurs when the circuit is reclosed and the Any Pole Dead signal has been reset for three seconds providing the Any Start signal is inactive. The reset is prevented if the Any Start signal is active after the breaker closes. This is useful when used in conjunction with the Autoreclose logic, as it will prevent unwanted trip flags being displayed after a successful reclosure of the breaker. The Trip LED logic is as follows:
370
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Trip Command Out
S
Reset
R
Trip LED Trigger
Q
1
Reset Relays/LED
Key:
Sys Fn Links Enable Self Reset
HMI Key
&
Disable Self Reset
External DDB Signal
Setting cell
Any Pole Dead
Setting value
Any Start
SR Latch
S Q
Timer
R
AND gate
&
OR gate
1
V01211
Figure 106: Trip LED logic
5.2.5 Ordinal
LED DDB SIGNALS Signal Name
Source
Type
Response
Description 640
LED1 Red
Software
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
DDB signal indicates that the red LED is active 641
LED1 Grn
Software
DDB signal indicates that the green LED is active 642
LED2 Red
Software
DDB signal indicates that the red LED is active 643
LED2 Grn
Software
DDB signal indicates that the green LED is active 644
LED3 Red
Software
DDB signal indicates that the red LED is active 645
LED3 Grn
Software
DDB signal indicates that the green LED is active 646
LED4 Red
Software
DDB signal indicates that the red LED is active 647
LED4 Grn
Software
DDB signal indicates that the green LED is active 648
LED5 Red(30TE)
Software
DDB signal indicates that the red LED is active 649
LED5 Grn(30TE)
Software
DDB signal indicates that the green LED is active 650
LED6 Red(30TE)
Software
DDB signal indicates that the red LED is active 651
LED6 Grn(30TE)
Software
DDB signal indicates that the green LED is active 652
LED7 Red(30TE)
Software
DDB signal indicates that the red LED is active
P14D-B/G/L/Z-TM-EN-1
371
Chapter 9 - Monitoring and Control
Ordinal
Signal Name
P14D
Source
Type
Response
Description 653
LED7 Grn(30TE)
Software
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
Tri-colour LED
No response
DDB signal indicates that the green LED is active 654
LED8 Red(30TE)
Software
DDB signal indicates that the red LED is active 655
LED8 Grn(30TE)
Software
DDB signal indicates that the green LED is active 656
FnKey LED1 Red
Software
DDB signal indicates that the red Function Key LED is active 657
FnKey LED1 Grn
Software
DDB signal indicates that the green Function Key LED is active 658
FnKey LED2 Red
Software
DDB signal indicates that the red Function Key LED is active 659
FnKey LED2 Grn
Software
DDB signal indicates that the green Function Key LED is active 660
FnKey LED3 Red
Software
DDB signal indicates that the red Function Key LED is active 661
FnKey LED3 Grn
Software
DDB signal indicates that the green Function Key LED is active
5.2.6
LED CONDITIONERS
When driving an LED, the driving signal has to first be conditioned. We need to define certain properties such as whether it should be latched or not. This is defined in the PSL Editor (on page 502), which is described in the Setting Applications Software chapter. A different set of DDB signals is provided for the purposes of connecting signals such as trips, starts and alarms, if these signals are to drive the LEDs. The names of these DDB signals are shown below. Ordinal
Signal Name
Source
Type
Response
Description 676
LED1 Con R
Programmable Scheme Logic
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
This DDB signal drives the red LED Conditioner 1 677
LED1 Con G
Programmable Scheme Logic
This DDB signal drives the green LED Conditioner 1 678
LED2 Con R
Programmable Scheme Logic
This DDB signal drives the red LED Conditioner 2 679
LED2 Con G
Programmable Scheme Logic
This DDB signal drives the green LED Conditioner 2 680
LED3 Con R
Programmable Scheme Logic
This DDB signal drives the red LED Conditioner 3 681
LED3 Con G
Programmable Scheme Logic
This DDB signal drives the green LED Conditioner 3 682
LED4 Con R
Programmable Scheme Logic
This DDB signal drives the red LED Conditioner 4 683
372
LED4 Con G
Programmable Scheme Logic
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Ordinal
Signal Name
Source
Type
Response
Description This DDB signal drives the green LED Conditioner 4 684
LED5 Con R(30TE)
Programmable Scheme Logic
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
Tri-colour LED Conditioner
No response
This DDB signal drives the red LED Conditioner 5 685
LED5 Con G(30TE)
Programmable Scheme Logic
This DDB signal drives the green LED Conditioner 5 686
LED6 Con R(30TE)
Programmable Scheme Logic
This DDB signal drives the red LED Conditioner 6 687
LED6 Con G(30TE)
Programmable Scheme Logic
This DDB signal drives the green LED Conditioner 6 688
LED7 Con R(30TE)
Programmable Scheme Logic
This DDB signal drives the red LED Conditioner 7 689
LED7 Con G(30TE)
Programmable Scheme Logic
This DDB signal drives the green LED Conditioner 7 690
LED8 Con R(30TE)
Programmable Scheme Logic
This DDB signal drives the red LED Conditioner 8 691
LED8 Con G(30TE)
Programmable Scheme Logic
This DDB signal drives the green LED Conditioner 8 692
FnKey LED1 ConR
Programmable Scheme Logic
This DDB signal drives the red Function Key LED Conditioner 1 693
FnKey LED1 ConG
Programmable Scheme Logic
This DDB signal drives the green Function Key LED Conditioner 1 694
FnKey LED2 ConR
Programmable Scheme Logic
This DDB signal drives the red Function Key LED Conditioner 2 695
FnKey LED2 ConG
Programmable Scheme Logic
This DDB signal drives the green Function Key LED Conditioner 2 696
FnKey LED3 ConR
Programmable Scheme Logic
This DDB signal drives the red Function Key LED Conditioner 3 697
FnKey LED3 ConG
Programmable Scheme Logic
This DDB signal drives the red Function Key LED Conditioner 3
5.3
OPTO-INPUTS
Depending on the model, a number of opto-inputs are available. The use of these opto-inputs depends on the application. There are a number of settings associated with the opto-inputs.
5.3.1
OPTO-INPUT CONFIGURATION
Menu Text
Col
Row
Default Setting
Available Options
Description OPTO CONFIG
11
00
This column contains opto-input configuration settings Global Nominal V
11
01
48/54V
0 = 24-27V, 1 = 30-34V, 2 = 48-54V, 3 = 110-125V, 4 = 220-250V or 5 = Custom
This setting sets the nominal DC voltage for all opto-inputs. The Custom setting allows you to set each opto-input to any voltage value individually.
P14D-B/G/L/Z-TM-EN-1
373
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description Opto Input 1
11
02
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 1 Opto Input 2
11
03
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 2 Opto Input 3
11
04
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 3 Opto Input 4
11
05
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 4 Opto Input 5
11
06
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 5 Opto Input 6
11
07
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 6 Opto Input 7
11
08
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 7 Opto Input 8
11
09
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 8 Opto Input 9
11
0A
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 9 Opto Input 10
11
0B
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 10 Opto Input 11
11
0C
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 11 Opto Input 12
11
0D
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 12 Opto Input 13
11
0E
48/54V
0 = 24/27V, 1 = 30/34V, 2 = 48/54V, 3 = 110/125V or 4 = 220/250V
This cell sets the nominal voltage for opto-input 13 Opto Filter Cntl
11
50
0xFFFFFFFF
Binary flag (data type G9): 0 = Off, 1 = Energised
This setting determines whether the in-built noise filter is off or on for each opto-input. Characteristic
11
80
Standard 60%-80%
0 = Standard 60% to 80% or 1 = 50% to 70%
This setting selects the opto-inputs' pick-up and drop-off characteristics. Opto 9 Mode
11
90
Normal
0 = Normal, 1 = TCS
This setting selects the opto-input's mode of operation; either normal opto or Trip Circuit Supervision (TCS). Valid for I/O option C only.
374
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description Opto 10 Mode
11
91
Normal
0 = Normal, 1 = TCS
This setting selects the opto-input's mode of operation; either normal opto or Trip Circuit Supervision (TCS). Valid for I/O option C only. Opto 11 Mode
11
92
Normal
0 = Normal, 1 = TCS
This setting selects the opto-input's mode of operation; either normal opto or Trip Circuit Supervision (TCS). Valid for I/O option C only.
5.3.2
OPTO-INPUT LABELS
Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 INPUT LABELS
4A
00
This column contains settings for the opto-input Labels Opto Input 1
4A
01
Input L1
ASCII text
Input L2
ASCII text
Input L3
ASCII text
Input L4
ASCII text
Input L5
ASCII text
Input L6
ASCII text
Input L7
ASCII text
Input L8
ASCII text
Input L9
ASCII text
Input L10
ASCII text
This setting defines the label for opto-input 1 Opto Input 2
4A
02
This setting defines the label for opto-input 2 Opto Input 3
4A
03
This setting defines the label for opto-input 3 Opto Input 4
4A
04
This setting defines the label for opto-input 4 Opto Input 5
4A
05
This setting defines the label for opto-input 5 Opto Input 6
4A
06
This setting defines the label for opto-input 6 Opto Input 7
4A
07
This setting defines the label for opto-input 7 Opto Input 8
4A
08
This setting defines the label for opto-input 8 Opto Input 9
4A
09
This setting defines the label for opto-input 9 Opto Input 10
4A
0A
This setting defines the label for opto-input 10 Opto Input 11
4A
0B
Input L11
ASCII text
This setting defines the label for opto-input 11 Opto Input 12
4A
0C
Input L12
ASCII text
This setting defines the label for opto-input 12 Opto Input 13
4A
0D
Input L13
ASCII text
This setting defines the label for opto-input 13
5.3.3
OPTO-INPUT DDB SIGNALS
Depending on the model there are up to 13 opto-inputs available. These are connected to DDB signals starting with DDB 32 as follows. The default names are provided, but note that these can be configured in the I/P LABELS column.
P14D-B/G/L/Z-TM-EN-1
375
Chapter 9 - Monitoring and Control
Ordinal
Signal Name
P14D
Source
Type
Response
Description 32
Input L1
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
Software
Opto-input
Opto-input change event
DDB signal connected to opto-input 1 33
Input L2
DDB signal connected to opto-input 2 34
Input L3
DDB signal connected to opto-input 3 35
Input L4
DDB signal connected to opto-input 4 36
Input L5
DDB signal connected to opto-input 5 37
Input L6
DDB signal connected to opto-input 6 38
Input L7
DDB signal connected to opto-input 7 39
Input L8
DDB signal connected to opto-input 8 40
Input L9
DDB signal connected to opto-input 9 41
Input L10
DDB signal connected to opto-input 10 42
Input L11
DDB signal connected to opto-input 11 43
Input L12
DDB signal connected to opto-input 12 44
Input L13
DDB signal connected to opto-input 13
5.3.4
ENHANCED TIME STAMPING
Each opto-input sample is time stamped within a tolerance of +/- 1 ms with respect to the Real Time Clock. These time stamps are used for the opto event logs and for the disturbance recording. The device needs to be synchronised accurately to an external clock source such as an IRIG-B signal or a master clock signal provided in the relevant data protocol. For both the filtered and unfiltered opto-inputs, the time stamp of an opto-input change event is the sampling time at which the change of state occurred. If a mixture of filtered and unfiltered opto-inputs change state at the same sampling interval, these state changes are reported as a single event. The enhanced opto-input event time stamping is consistent across all the implemented protocols. The GOOSE messages are published in a timely manner and are not delayed by any event filtering mechanisms.
5.4
OUTPUT RELAYS
Depending on the model, a number of relay outputs are available. The use of these relay outputs depend on the application. There are a number of settings associated with the relay outputs.
5.4.1
OUTPUT RELAY LABELS
In the O/P LABELS column, you can define the DDB signal names for the output relays.
376
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 OUTPUT LABELS
4B
00
This column contains settings for the output relay labels Relay 1
4B
01
Output R1
ASCII text
This setting defines the label for output relay 1 Relay 2
4B
02
Output R2
ASCII text
This setting defines the label for output relay 2 Relay 3
4B
03
Output R3
ASCII text
This setting defines the label for output relay 3 Relay 4
4B
04
Output R4
ASCII text
This setting defines the label for output relay 4 Relay 5
4B
05
Output R5
ASCII text
This setting defines the label for output relay 5 Relay 6
4B
06
Output R6
ASCII text
This setting defines the label for output relay 6 Relay 7
4B
07
Output R7
ASCII text
This setting defines the label for output relay 7 Relay 8
4B
08
Output R8
ASCII text
This setting defines the label for output relay 8 Relay 9
4B
09
Output R9
ASCII text
This setting defines the label for output relay 9 Relay 10
4B
0A
Output R10
ASCII text
This setting defines the label for output relay 10 Relay 11
4B
0B
Output R11
ASCII text
This setting defines the label for output relay 11 Relay 12
4B
0C
Output R12
ASCII text
This setting defines the label for output relay 12
5.4.2
OUTPUT RELAY DDB SIGNALS
Depending on the model there are up to 12 output relays available. These are connected to DDB signals starting with number 0 as follows. The default names are provided, but note that these can be configured in the O/P LABELS column. Ordinal
Signal Name
Source
Type
Response
Description 0
Output R1
Software
Output Relay
Output relay change event
Output Relay
Output relay change event
Output Relay
Output relay change event
Output Relay
Output relay change event
Output Relay
Output relay change event
DDB signal connected to output relay 1 1
Output R2
Software
DDB signal connected to output relay 2 2
Output R3
Software
DDB signal connected to output relay 3 3
Output R4
Software
DDB signal connected to output relay 4 4
Output R5
P14D-B/G/L/Z-TM-EN-1
Software
377
Chapter 9 - Monitoring and Control
Ordinal
P14D
Signal Name
Source
Type
Response
Description DDB signal connected to output relay 5 5
Output R6
Software
Output Relay
Output relay change event
Output Relay
Output relay change event
Output Relay
Output relay change event
Output Relay
Output relay change event
Output Relay
Output relay change event
Output Relay
Output relay change event
Output Relay
Output relay change event
DDB signal connected to output relay 6 6
Output R7
Software
DDB signal connected to output relay 7 7
Output R8
Software
DDB signal connected to output relay 8 8
Output R9
Software
DDB signal connected to output relay 9 9
Output R10
Software
DDB signal connected to output relay 10 10
Output R11
Software
DDB signal connected to output relay 11 11
Output R12
Software
DDB signal connected to output relay 12
5.4.3
OUTPUT RELAY CONDITIONERS
When driving an output relay, the driving signal has to first be conditioned. We need to define certain properties such as, pickup time, dropoff time, dwell and whether it is a pulsed or latched output. This is all defined in the PSL Editor, which is described in the Setting Applications Software (on page 493) chapter. A different set of DDB signals is provided for the purposes of connecting signals such as trip and start commands and alarms, if these signals are to drive the output relays. The names of these DDB signals are shown below. Ordinal
Signal Name
Source
Type
Response
Description 72
Relay Cond 1
Programmable Scheme Logic
Output Conditioner
No response
Output Conditioner
No response
Output Conditioner
No response
Output Conditioner
No response
Output Conditioner
No response
Output Conditioner
No response
Output Conditioner
No response
Output Conditioner
No response
Output Conditioner
No response
DDB signal connected to output relay conditioner 1 73
Relay Cond 2
Programmable Scheme Logic
DDB signal connected to output relay conditioner 2 74
Relay Cond 3
Programmable Scheme Logic
DDB signal connected to output relay conditioner 3 75
Relay Cond 4
Programmable Scheme Logic
DDB signal connected to output relay conditioner 4 76
Relay Cond 5
Programmable Scheme Logic
DDB signal connected to output relay conditioner 5 77
Relay Cond 6
Programmable Scheme Logic
DDB signal connected to output relay conditioner 6 78
Relay Cond 7
Programmable Scheme Logic
DDB signal connected to output relay conditioner 7 79
Relay Cond 8
Programmable Scheme Logic
DDB signal connected to output relay conditioner 8 80
Relay Cond 9
Programmable Scheme Logic
DDB signal connected to output relay conditioner 9
378
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Ordinal
Signal Name
Source
Type
Response
Description 81
Relay Cond 10
Programmable Scheme Logic
Output Conditioner
No response
Output Conditioner
No response
Output Conditioner
No response
DDB signal connected to output relay conditioner 10 82
Relay Cond 11
Programmable Scheme Logic
DDB signal connected to output relay conditioner 11 83
Relay Cond 12
Programmable Scheme Logic
DDB signal connected to output relay conditioner 12
5.5
CONTROL INPUTS
The control inputs are software switches, which can be set or reset locally or remotely. These inputs can be used to trigger any PSL function to which they are connected. There are three setting columns associated with the control inputs.
5.5.1
CONTROL INPUT SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description CONTROL INPUTS
12
00
This column contains settings for the type of control input Ctrl I/P Status 1
12
01
Binary flag (data type G202): 0 = Reset, 1 = Set
0x00000000
This cell sets or resets the first batch of 32 Control Inputs by scrolling and changing the status of selected bits. Alternatively, each of the 32 Control inputs can be set and reset using the individual Control Input cells. Ctrl I/P Status 2
12
02
Binary flag (data type G262): 0 = Reset, 1 = Set
0x00000000
This cell sets or resets the first batch of 32 Control Inputs by scrolling and changing the status of selected bits. Alternatively, each of the 32 Control inputs can be set and reset using the individual Control Input cells. Control Inputs 1 to 64
12
10 to No Operation 4F
0 = No Operation, 1 = Set , 2 = Reset
These commands set or reset Control Inputs 1 to 64
5.5.2
CONTROL INPUT CONFIGURATION
Menu Text
Col
Row
Default Setting
Available Options
Description CTRL I/P CONFIG
13
00
This column contains configuration settings for the control inputs. Hotkey Enabled 1
13
01
0xFFFFFFFF
Binary flag (data type G233): 0 = not assigned, 1 = assigned
This setting allows the control inputs to be individually assigned to the Hotkey menu. The hotkey menu allows the control inputs to be set, reset or pulsed without the need to enter the CONTROL INPUTS column. Hotkey Enabled 2
13
02
0xFFFFFFFF
Binary flag (data type G263): 0 = not assigned, 1 = assigned
This setting allows the control inputs to be individually assigned to the Hotkey menu. The hotkey menu allows the control inputs to be set, reset or pulsed without the need to enter the CONTROL INPUTS column. Control Inputs 1 to 64
13
P14D-B/G/L/Z-TM-EN-1
10 to ED (evens)
Latched
0 = Latched or 1 = Pulsed
379
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting configures the control input as either ‘latched’ or ‘pulsed’. Ctrl Commands 1 to 64
13
11 to EE (odds)
SET/RESET
0 = On/Off, 1 = Set/Reset, 2 = In/Out, 3 = Enabled/Disabled
This setting allows you to select the text to be displayed on the hotkey menu.
5.5.3
CONTROL INPUT LABELS
In the CTRL I/P LABELS column, you can define the DDB signal names for the control inputs. Menu Text
Col
Row
Default Setting
Available Options
Description CTRL I/P LABELS
29
00
This column contains settings for the Control Input Labels Control Inputs 1 to 64
29
01 to 40
Control Input (n)
Extended ASCII text (characters 32 to 234 inclusive)
In this cell you can enter a text label to describe the control input. This text is displayed when a control input is accessed by the hotkey menu and in the programmable scheme logic description of the control input.
5.5.4
CONTROL INPUT DDB SIGNALS
There are 64 control inputs available. These are connected to DDB signals starting with number 800 and 1233 as follows. The default names are provided, but note that these can be configured in the CTRL I/P LABELS column. Ordinal
Signal Name
Source
Type
Response
Description 800 to 831
Control Input (n)
Software
Control
Protection event
Software
Control
Protection event
This DDB signal is a control input signal 1233 to 1264
Control Input (n)
This DDB signal is a control input signal
380
P14D-B/G/L/Z-TM-EN-1
P14D
6
Chapter 9 - Monitoring and Control
CB CONDITION MONITORING
The device records various statistics related to each circuit breaker trip operation, allowing an accurate assessment of the circuit breaker condition to be determined. The circuit breaker condition monitoring counters are incremented every time the device issues a trip command. These statistics are available in the CB CONDITION column and are shown below. The menu cells shown are counter values only, and cannot be set directly. The counters may be reset, however, during maintenance. This is achieved with the setting Reset CB Data. Note: When in Commissioning test mode the CB condition monitoring counters are not updated.
6.1
CB CONDITION MEASUREMENTS Menu Text
Col
Row
Default Setting
Available Options
Description CB CONDITION
06
00
This column contains CB condition monitoring measured parameters CB Operations
06
01
Not Settable
This cell displays the number of CB Operations Total IA Broken
06
02
Not Settable
This cell displays the total broken IA since the last maintenance procedure Total IB Broken
06
03
Not Settable
This cell displays the total broken IB since the last maintenance procedure Total IC Broken
06
04
Not Settable
This cell displays the total broken IC since the last maintenance procedure CB Operate Time
06
05
Not Settable
This cell displays the CB Operate Time Reset CB Data
06
06
No
0 = No or 1 = Yes
This cell resets the CB condition monitoring data
6.2
CB MONITOR SETUP Menu Text
Col
Row
Default Setting
Available Options
Description CB MONITOR SETUP
10
00
This column contains Circuit Breaker monitoring parameters Broken I^
10
01
2
1 to 2 step 0.1
This setting sets the factor to be used for the cumulative brokent current counter calculation. This factor is set according to the type of Circuit Breaker used. I^ Maintenance
10
02
Alarm Disabled
0 = Alarm Disabled or 1 = Alarm Enabled
This setting determines whether an alarm is raised or not when the cumulative broken current maintenance counter threshold is exceeded. I^ Maintenance
10
03
1000
From 1 * NM1 to 25000 * NM1 step 1 * NM1
This setting determines the threshold for the cumulative broken current maintenance counter. I^ Lockout
10
P14D-B/G/L/Z-TM-EN-1
04
Alarm Disabled
0 = Alarm Disabled or 1 = Alarm Enabled
381
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting determines whether an alarm will be raised or not when the cumulative broken current lockout counter threshold is exceeded. I^ Lockout
10
05
2000
From 1 * NM1 to 25000 * NM1 step 1 * NM1
This setting determines the threshold for the cumulative broken current lockout counter. No. CB Ops Maint
10
06
Alarm Disabled
0 = Alarm Disabled or 1 = Alarm Enabled
This setting activates the 'number of CB operations' maintenance alarm. No. CB Ops Maint
10
07
10
1 to 10000 step 1
This setting sets the threshold for the 'Number of CB operations' alarm. No. CB Ops Lock
10
08
Alarm Disabled
0 = Alarm Disabled or 1 = Alarm Enabled
This setting activates the 'number of CB operations' lockout alarm. No. CB Ops Lock
10
09
20
1 to 10000 step 1
This setting sets the threshold for the 'number of CB operations' lockout. Note: The IED can be set to lockout the autoreclose function on reaching a second operations threshold. CB Time Maint
10
0A
Alarm Disabled
0 = Alarm Disabled or 1 = Alarm Enabled
This setting activates the 'CB operate time' maintenance alarm. CB Time Maint
10
0B
0.1
From 0.005s to 0.5s step 0.001s
This setting sets the threshold for the allowable accumulated CB interruption time before maintenance should be carried out CB Time Lockout
10
0C
Alarm Disabled
0 = Alarm Disabled or 1 = Alarm Enabled
This setting activates the 'CB operate time' lockout alarm. CB Time Lockout
10
0D
0.2
From 0.005s to 0.5s step 0.001s
This setting sets the threshold for the allowable accumulated CB interruption time before lockout. Fault Freq Lock
10
0E
Alarm Disabled
0 = Alarm Disabled or 1 = Alarm Enabled
This setting enables or disables the 'excessive fault frequency' alarm. Fault Freq Count
10
0F
10
From 1 to 9999 step 1
This setting sets a 'CB frequent operations' counter that monitors the number of operations over a set time period. Fault Freq Time
10
10
3600
From 0s to 9999s step 1s
This setting sets the time period over which the CB operations are to be monitored. Should the set number of trip operations be accumulated within this time period, an alarm can be raised.
6.3
APPLICATION NOTES
6.3.1
SETTING THE THRESHOLDS FOR THE TOTAL BROKEN CURRENT
Where power lines are protected by oil circuit breakers (OCBs), changing of the oil s for a significant proportion of the switchgear maintenance costs. Often, oil changes are performed after a fixed number of CB fault operations. However, this may result in premature maintenance where fault currents tend to be low, because oil degradation may be slower than would normally be expected. The Total Current Accumulator (I^ counter) cumulatively stores the total value of the current broken by the circuit breaker providing a more accurate assessment of the circuit breaker condition. The dielectric withstand of the oil generally decreases as a function of I2t, where ‘I’ is the broken fault current and ‘t’ is the arcing time within the interrupter tank. The arcing time cannot be determined accurately, but is generally dependent on the type of circuit breaker being used. Instead, you set a factor (Broken I^) with a value between 1 and 2, depending on the circuit breaker. Most circuit breakers would have this value set to '2', but for some types of circuit breaker, especially those operating on higher voltage systems, a value of 2 may be too high. In such applications Broken I^ may be set lower, typically 1.4 or 1.5.
382
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
The setting range for Broken I^ is variable between 1.0 and 2.0 in 0.1 steps. Note: Any maintenance program must be fully compliant with the switchgear manufacturer’s instructions.
6.3.2
SETTING THE THRESHOLDS FOR THE NUMBER OF OPERATIONS
Every circuit breaker operation results in some degree of wear for its components. Therefore routine maintenance, such as oiling of mechanisms, may be based on the number of operations. Suitable setting of the maintenance threshold will allow an alarm to be raised, indicating when preventative maintenance is due. Should maintenance not be carried out, the device can be set to lockout the autoreclose function on reaching a second operations threshold (No. CB ops Lock). This prevents further reclosure when the circuit breaker has not been maintained to the standard demanded by the switchgear manufacturer’s maintenance instructions. Some circuit breakers, such as oil circuit breakers (OCBs) can only perform a certain number of fault interruptions before requiring maintenance attention. This is because each fault interruption causes carbonising of the oil, degrading its dielectric properties. The maintenance alarm threshold (setting No. CB Ops. Maint) may be set to indicate the requirement for oil dielectric testing, or for more comprehensive maintenance. Again, the lockout threshold No. CB Ops Lock may be set to disable autoreclosure when repeated further fault interruptions could not be guaranteed. This minimises the risk of oil fires or explosion.
6.3.3
SETTING THE THRESHOLDS FOR THE OPERATING TIME
Slow CB operation indicates the need for mechanism maintenance. Alarm and lockout thresholds (CB Time Maint and CB Time Lockout) are provided to enforce this. They can be set in the range of 5 to 500 ms. This time relates to the interrupting time of the circuit breaker.
6.3.4
SETTING THE THRESHOLDS FOR EXCESSSIVE FAULT FREQUENCY
Persistent faults will generally cause autoreclose lockout, with subsequent maintenance attention. Intermittent faults such as clashing vegetation may repeat outside of any reclaim time, and the common cause might never be investigated. For this reason it is possible to set a frequent operations counter, which allows the number of operations Fault Freq Count over a set time period Fault Freq Time to be monitored. A separate alarm and lockout threshold can be set.
P14D-B/G/L/Z-TM-EN-1
383
Chapter 9 - Monitoring and Control
7
P14D
CIRCUIT BREAKER CONTROL
There are several types of circuit breaker; ● ● ● ●
CBs with no auxiliary s CBs with 52A s (where the auxiliary follows the state of the CB) CBs with 52B s (where the auxiliary is in the opposite state the state of the CB) CBs with both 52A and 52B s
Circuit Breaker control is only possible if the circuit breaker in question provides auxiliary s. The CB Status Input cell in the CB CONTROL column must be set to the type of circuit breaker. If no CB auxiliary s are available then this cell should be set to 'None', and no CB control will be possible. For local control, the CB control by cell should be set accordingly. The output can be set to operate following a time delay defined by the setting Man Close Delay. One reason for this delay is to give personnel time to safely move away from the circuit breaker following a CB close command. The length of the trip and close control pulses can be set via the Trip Pulse Time and Close Pulse Time settings respectively. These should be set long enough to ensure the breaker has completed its open or close cycle before the pulse has elapsed. If an attempt to close the breaker is being made, and a protection trip signal is generated, the protection trip command overrides the close command. The Reset Lockout by setting is used to enable or disable the resetting of lockout automatically from a manual close after the time set by Man Close RstDly. If the CB fails to respond to the control command (indicated by no change in the state of CB Status inputs) a CB Failed to Trip or CB Failed to Close alarm is generated after the relevant trip or close pulses have expired. These alarms can be viewed on the LCD display, remotely, or can be assigned to output s using the programmable scheme logic (PSL). Note: The CB Healthy Time and Sys Check time set under this menu section are applicable to manual circuit breaker operations only. These settings are duplicated in the AUTORECLOSE menu for autoreclose applications.
The Lockout Reset and Reset Lockout by settings are applicable to CB Lockouts associated with manual circuit breaker closure, CB Condition monitoring (Number of circuit breaker operations, for example) and autoreclose lockouts. The device includes the following options for control of a single circuit breaker: ● ● ● ● ●
7.1
Local control using the IED menu Local control using the Hotkeys Local control using the function keys Local control using opto-inputs Remote control using remote communication
LOCAL CONTROL USING THE IED MENU
You can control manual trips and closes with the CB Trip/Close command in the SYSTEM DATA column. This can be set to 'No Operation', 'Trip', or 'Close' accordingly. For this to work you have to set the CB control by cell to option 1 'Local', option 5 'Opto+Local', or option 7 'Opto+Local+Remote' in the CB CONTROL column.
384
P14D-B/G/L/Z-TM-EN-1
P14D
7.2
Chapter 9 - Monitoring and Control
LOCAL CONTROL USING THE DIRECT ACCESS KEYS
The hotkeys allow you to manually trip and close the CB without the need to enter the SYSTEM DATA column. For this to work you have to set the CB control by cell to option 1 'Local', option 5 'Opto+Local', or option 7 'Opto+Local+Remote' in the CB CONTROL column. CB control using the hotkey is achieved by pressing the right-hand button directly below LCD screen. This button is only enabled if: ● The CB Control by setting is set to one of the options where local control is possible (option 1,3,5, or 7) ● The CB Status Input is set to '52A', '52B', or 'Both 52A and 52B' If the CB is currently closed, the command text on the bottom right of the LCD screen will read 'Trip'. Conversely, if the CB is currently open, the command text will read 'Close' If you execute a 'Trip', a screen with the CB status will be displayed once the command has been completed. If you execute a 'Close', a screen with a timing bar will appear while the command is being executed. This screen also gives you the option to cancel or restart the close procedure. The time delay is determined by the Man Close Delay setting in the CB CONTROL menu. When the command has been executed, a screen confirming the present status of the circuit breaker is displayed. You are then prompted to select the next appropriate command or exit. If no keys are pressed for a period of 25 seconds while waiting for the command confirmation, the device will revert to showing the CB Status. If no key presses are made for a period of 25 seconds while displaying the CB status screen, the device will revert to the default screen. To avoid accidental operation of the trip and close functionality, the hotkey CB control commands are disabled for 10 seconds after exiting the hotkey menu. The direct access functionality is summarised graphically below: Default Display HOTKEY
CB CTRL
Hotkey Menu CB open
CB closed
EXECUTE
EXECUTE
CLOSED
CB TRIP
OPEN
CB CLOSE
TRIP
EXIT
CONFIRM
CANCEL
EXIT
CLOSE
CANCEL
CONFIRM
EXECUTE CLOSE 30 secs
CANCEL
RESTART
E01209
Figure 107: Direct Access menu navigation
P14D-B/G/L/Z-TM-EN-1
385
Chapter 9 - Monitoring and Control
7.3
P14D
LOCAL CONTROL USING THE FUNCTION KEYS
You can also use the function keys to allow direct control of the circuit breaker. This has the advantage over hotkeys, that the LEDs associated with the function keys can indicate the status of the CB. The default PSL is set up such that Function key 2 initiates a trip and Function key 3 initiates a close. For this to work you have to set the CB control by cell to option 5 'Opto+Local', or option 7 'Opto+Local+Remote' in the CB CONTROL column. The default PSL logic for the function key mappings is shown below. As you can see, function keys 2 and 3 have already been assigned to CB control in the default PSL. Function Key 1
Blk Rmt. CB Ops FnKey LED1 Red
Function Key 2
Init Trip CB FnKey LED2 Red FnKey LED2 Green
Function Key 3
Init Close CB 1
Close in Prog
FnKey LED3 Red FnKey LED3 Green Key: External DDB Signal OR gate
1
NOT gate
V02025
Figure 108: Default function key PSL The programmable function key LEDs have been mapped such that they will indicate yellow whilst the keys are activated.
7.4
LOCAL CONTROL USING THE OPTO-INPUTS
Certain applications may require the use of push buttons or other external signals to control the various CB control operations. It is possible to connect such push buttons and signals to opto-inputs and map these to the relevant DDB signals. For this to work, you have to set the CB control by cell to option 2 'Remote', option 4 'opto', option 5 'Opto +Local', option 6 'Opto+Remote', or option 7 'Opto+Local+Remote' in the CB CONTROL column. The following DDB signals would be used for such purposes: Ordinal
English Text
Source
Type
Response Function
Description 232
Init Trip CB
Programmable Scheme Logic
PSL Output
No response
PSL Output
No response
PSL Output
No response
This DDB signals the circuit breaker to open 233
Init Close CB
Programmable Scheme Logic
This DDB signals the circuit breaker to open 234
Reset Close Dly
Programmable Scheme Logic
This DDB signal resets the Manual CB Close Time Delay
386
P14D-B/G/L/Z-TM-EN-1
P14D
7.5
Chapter 9 - Monitoring and Control
REMOTE CONTROL
Remote CB control can be achieved by setting the CB Trip/Close cell in the SYSTEM DATA column to trip or close by using a Courier command to the rear interface RP1. For this to work, you have to set the CB control by cell to option 2 'Remote', option 3 'Local+Remote', option 6 ' Opto+remote', or option 7 'Opto+Local+Remote' in the CB CONTROL column. We recommend that you allocate separate relay output s for remote CB control and protection tripping. This allows you to select the control outputs using a simple local/remote selector switch as shown below. Where this feature is not required the same output (s) can be used for both protection and remote tripping.
Protection Trip Trip
Remote Control Trip
Close Remote Control Close
Local Remote
Trip
Close
E01207
Figure 109: Remote Control of Circuit Breaker
7.6
SYNCHRONISATION CHECK
Where the check synchronism function is set, this can be enabled to supervise manual circuit breaker Close commands. A circuit breaker Close command will only be issued if the Check Synchronisation criteria are satisfied. A time delay can be set with the setting Sys Check time. If the Check Synchronisation criteria are not satisfied within the time period following a Close command the device will lockout and alarm.
7.7
CB HEALTHY CHECK
A CB Healthy check is also available if required. This facility accepts an input to one of the opto-inputs to indicate that the breaker is capable of closing (e.g. that it is fully charged). A time delay can be set with the setting CB Healthy Time. If the CB does not indicate a healthy condition within the time period following a Close command, the device will lockout and alarm.
P14D-B/G/L/Z-TM-EN-1
387
Chapter 9 - Monitoring and Control
7.8
P14D
CB CONTROL LOGIC CB Control Disabled
Opto
Local
Opto + Local
Remote
Opto + Remote
Local + Remote
Opto + Remote + Local
HMI Trip
1
&
1
Enable opto-initiated CB trip and close
Control Trip S
&
Init Trip CB
Q
&
R
&
Man CB Trip Fail
1
Init close CB
Close in Prog Delayed control close time
HMI Close
S
&
Control Close
Q
AR In Progress
Close pulse
&
R
1
S
Auto Close
Q
Pulsed output latched in HMI
R
&
AR models only Reset Close Dly
CB Cls Fail
1
Trip Command In
1
1
Ext. Trip 3ph Control Trip CB Open 3ph
1
CB Closed 3ph CB healthy window
&
Man CB Unhealthy
CB Healthy C/S window Voltage models only
&
Man No Checksync
Man Check Synch
Key:
Pulse / Latch
HMI key
Timer
External DDB Signal AND gate
Setting cell Setting value
SR Latch
&
OR gate
1
S Q R
V01208
Figure 110: CB Control logic
CB CONTROL SETTINGS
7.9
Menu Text
Col
Row
Default Setting
Available Options
Description CB CONTROL
07
00
This column controls the circuit Breaker Control configuration
388
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description
CB Control by
07
01
Disabled
0=Disabled 1=Local 2=Remote 3=Local+Remote 4=Opto 5=Opto+local 6=Opto+Remote 7=Opto+Remote+local
This setting selects the type of circuit breaker control to be used Close Pulse Time
07
02
0.5
From 0.1s to 50s step 0.01s
This setting defines the duration of the close pulse within which the CB should close when a close command is issued. Trip Pulse Time
07
03
0.5
From 0.1s to 5s step 0.01s
This setting defines the duration of the trip pulse within which the CB should trip when a manual or protection trip command is issued. Man Close Delay
07
05
10
From 0.01s to 600s step 0.01s
This setting defines the delay time before the close pulse is executed. CB Healthy Time
07
06
5
From 0.01s to 9999s step 0.01s
This setting defines the time period in which a CB needs to indicate a healthy condition before it closes. If the CB does not indicate a healthy condition in this time period following a close command then the IED will lockout and alarm. Sys Check Time
07
07
5
From 0.01s to 9999s step 0.01s
This setting sets a time delay for manual closure with System Check Synchronizing. If the System Check Synchronizing criteria are not satisfied in this time period following a close command, the IED will lockout and produce an alarm. Lockout Reset
07
08
No
0 = No or 1 = Yes
This command resets the AutoReclose Lockout. Reset Lockout by
07
09
CB Close
0= Interface 1=CB Close
This setting defines whether the AutoReclose Lockout signal is to be reset by the interface or a CB Closed signal. Man Close RstDly
07
0A
5
From 0.1s to 600s step 0.01s
This setting sets the time delay before the Lockout state can be reset following a manual closure. Autoreclose Mode
07
0B
No Operation
0=No Operation 1=Auto 2=Non Auto
This command changes the Autoreclose mode AR Status
07
0E
This cell displays the Autoreclose - In Service or Out of Service Total Reclosures
07
0F
This cell displays the number of successful reclosures. Reset Total AR
07
10
No
0 = No or 1 = Yes
This command allows you to to reset the autoreclose counters. CB Status Input
07
11
None
0=None 1=52A 2=52B 3=Both 52A and 52B
Setting to define the type of circuit breaker s that will be used for the circuit breaker control logic. Form A s match the status of the circuit breaker primary s, form B are opposite to the breaker status. 1 Shot Clearance
07
12
Not Settable
This cell displays the total number of successful clearances after 1 shot 2 Shot Clearance
07
P14D-B/G/L/Z-TM-EN-1
13
Not Settable
389
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This cell displays the total number of successful clearances after 2 shots 3 Shot Clearance
07
14
Not Settable
This cell displays the total number of successful clearances after 3 shots 4 Shot Clearance
07
15
Not Settable
This cell displays the total number of successful clearances after 4 shots Persistent Fault
07
16
Not Settable
This cell displays the total number of unsuccessful clearances after which the Autorclose went into lockout. Shot1 Recloses
07
20
Not Settable
This cell displays the total number of single-shot shot reclose attempts Shot234 Recloses
07
21
Not Settable
This cell displays the total number of multi-shot reclose attempts
390
P14D-B/G/L/Z-TM-EN-1
P14D
8
Chapter 9 - Monitoring and Control
CB STATE MONITORING
CB State monitoring is used to the open or closed state of a circuit breaker. Most circuit breakers have auxiliary s through which they transmit their status (open or closed) to control equipment such as IEDs. These auxiliary s are known as: ● 52A for s that follow the state of the CB ● 52B for s that are in opposition to the state of the CB All our devices can be set to monitor both of these types of circuit breaker. If the state is unknown for some reason, an alarm can be raised. Some CBs provide both sets of s. If this is the case, these s will normally be in opposite states. Should both sets of s be open, this would indicate one of the following conditions: ● Auxiliary s/wiring defective ● Circuit Breaker (CB) is defective ● CB is in isolated position Should both sets of s be closed, only one of the following two conditions would apply: ● Auxiliary s/wiring defective ● Circuit Breaker (CB) is defective If any of the above conditions exist, an alarm will be issued after a 5 s time delay. An output can be assigned to this function via the programmable scheme logic (PSL). The time delay is set to avoid unwanted operation during normal switching duties. In the CB CONTROL column there is a setting called CB Status Input. This cell can be set at one of the following four options: ● ● ● ●
None 52A 52B Both 52A and 52B
Where ‘None’ is selected no CB status is available. Where only 52A is used on its own then the device will assume a 52B signal from the absence of the 52A signal. Circuit breaker status information will be available in this case but no discrepancy alarm will be available. The above is also true where only a 52B is used. If both 52A and 52B are used then status information will be available and in addition a discrepancy alarm will be possible, according to the following table: Auxiliary Position
CB State Detected
Action
52A
52B
Open
Closed
Breaker open
Circuit breaker healthy
Closed
Open
Breaker closed
Circuit breaker healthy
Closed
Closed
CB failure
Alarm raised if the condition persists for greater than 5s
Open
Open
State unknown
Alarm raised if the condition persists for greater than 5s
P14D-B/G/L/Z-TM-EN-1
391
Chapter 9 - Monitoring and Control
8.1
P14D
CB STATE MONITORING LOGIC Key: External DDB Signal Setting cell CB Status Input
Setting value None 52A
AND gate
&
XOR gate
X1
OR gate
1
52B Both 52A and 52B
& CB Aux 3ph(52-A)
&
1
&
CB Closed 3 ph
1 Plant Status CB1 Closed
X1
&
&
CB1 Open
1
1
CB Open 3 ph
&
X1
&
CB Status Alarm
CB Aux 3ph(52-B)
V01200
Figure 111: CB State Monitoring logic
392
P14D-B/G/L/Z-TM-EN-1
P14D
9
Chapter 9 - Monitoring and Control
VOLTAGE TRANSFORMER SUPERVISION
The Voltage Transformer Supervision (VTS) function is used to detect failure of the AC voltage inputs to the IED. This may be caused by internal voltage transformer faults, overloading, or faults on the wiring, which usually results in one or more of the Voltage Transformer (VT) fuses blowing. If there is a failure of the AC voltage input, the IED could misinterpret this as a failure of the actual phase voltages on the power system, which could result in unnecessary tripping of a circuit breaker. The VTS logic is designed to prevent such a situation by detecting voltage input failures, which are not caused by power system phase voltage failure, and automatically adjusting the configuration of associated protection elements. A time-delayed alarm output is also available. The following scenarios should be considered regarding the failure of the VT inputs. ● Loss of one or two-phase voltages ● Loss of all three-phase voltages under load conditions ● Absence of three-phase voltages upon line energisation
9.1
LOSS OF ONE ORTWO PHASE VOLTAGES
If the power system voltages are healthy, no Negative Phase Sequence current will be present. If however, one or two of the AC voltage inputs are missing, there will be Negative Phase Sequence voltage present, even if the actual power system phase voltages are healthy. VTS works by using these criteria; that is by detecting Negative Phase Sequence (NPS) voltage without the presence of Negative Phase Sequence current. This, however, works only for the case when one or two voltage inputs are lost. VTS cannot operate during system fault conditions because of the presence of NPS current.
9.2
LOSS OF ALL THREE PHASE VOLTAGES
If all three voltage inputs are lost, there will be no Negative Phase Sequence quantities present to operate the VTS function. However, under such circumstances, the collapse of all three of the system phase voltages would be apparent, because this would be accompanied by a change in the phase currents. If loss of the three voltage inputs is detected without a corresponding change in any of the phase currents, then a VTS condition will be raised. Any changes in phase currents are detected by comparing the present value with that of one cycle previously.
9.3
ABSENCE OF ALL THREE PHASE VOLTAGES ON LINE ENERGISATION
On line energisation there will be a change in the phase currents as a result of loading or line charging current for example. Under this condition we need an alternative method of detecting three-phase VT failure. The absence of measured voltage on all three phases on line energization can be as a result of two conditions: ● A three-phase VT failure ● A close-up three-phase fault. The first condition would require VTS to block the voltage-dependent function and the second would require tripping. To differentiate between these two conditions an overcurrent level detector is used. This will prevent a VTS block from being issued in case of a genuine fault. This element should be set in excess of any nonfault based currents on line energization (load, line charging current, transformer inrush current if applicable), but below the level of current produced by a close-up three-phase fault. If the line is now closed where a three-phase VT failure is present, the overcurrent detector will not operate and a VTS block will be applied. Closing onto a three-phase fault will result in operation of the overcurrent detector and prevent a VTS block being applied.
P14D-B/G/L/Z-TM-EN-1
393
Chapter 9 - Monitoring and Control
9.4
P14D
VTS IMPLEMENTATION
VTS is implemented in the SUPERVISION column of the relevant settings group, under the sub-heading VT SUPERVISION. The following settings are relevant for VT Supervision: ● VTS Status: determines whether the VTS Operate output will be a blocking output or an alarm indication only ● VTS PickupThresh: determines the threshold at which the phase voltage detectors pick up ● VTS Reset Mode: determines whether the Reset is to be manual or automatic ● VTS Time delay: determines the operating time delay ● VTS I> Inhibit: inhibits VTS operation in the case of a phase overcurrent fault ● VTS I2> Inhibit: inhibits VTS operation in the case of a negative sequence overcurrent fault
9.5
VTS LOGIC
This logic will only be enabled during a live line condition (as indicated by the pole dead logic) to prevent operation under dead system conditions (i.e. where no voltage will be present and the VTS I> Inhibit overcurrent element will not be picked up).
394
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
All Poles Dead
Key:
External DDB Signal
IA
Hardcoded threshold Setting cell
VTS I> Inhibit
Setting value
IB 1
S
SR Latch
VTS I> Inhibit
Q
Timer
R
IC AND gate
VTS I> Inhibit
&
OR gate
1
VA Comparator for Overvalues VTS PickupThresh VB &
1
VTS PickupThresh
S
&
Q
VC
1
R
&
VTS Slow Block
&
VTS Fast Block
1
VT Fail Alarm
VTS PickupThresh Delta IA 1
Hardcoded threshold Delta IB 1
&
S Q
Hardcoded threshold
R
Delta IC Hardcoded threshold V2 &
Hardcoded threshold I2
&
I2>(n) Current Set VTS Reset Mode Manual Auto
&
1
MCB/VTS
VTS Status Indication Blocking
&
Any Pole Dead
1
S Q R
& VTS Acc Ind
V01202
Figure 112: VTS logic As can be seen from the diagram, the VTS function is inhibited if: ● ● ● ●
An All Poles Dead DDB signal is present A phase overcurrent condition exists A Negative Phase Sequence current exists If the phase current changes over the period of 1 cycle
P14D-B/G/L/Z-TM-EN-1
395
Chapter 9 - Monitoring and Control
P14D
The VTS will operate if: ● All three of the input voltages are lower than the VTS Pickup threshold AND the function is not inhibited by any of the above criteria ● Negative Sequence Voltage is present AND the function is not inhibited by any of the above criteria The NPS voltage and current detection criteria (used for the case when one or two voltage inputs are lost) is inhibited if an Any Pole Dead signal is present.
9.6
VTS DDB SIGNALS
Ordinal
English Text
Source
Type
Response Function
Description 380
All Poles Dead
Software
PSL Input
No response
PSL Input
No response
PSL Output
No response
Hidden
No response
PSL Input
No response
This DDB signal indicates that all poles are dead 381
Any Pole Dead
Software
This DDB signal indicates that one or more of the poles is dead. 231
MCB/VTS
Programmable Scheme Logic
This DDB signal initiates a VTS condition from a 3phase miniature circuit breaker 385
VTS Acc Ind
Fixed Scheme Logic
This DDB signal indicates that the VTS accelerate function is active 350
VTS Fast Block
Software
This DDB signal is an instantaneously blocking output from the VTS which can block other functions 351
VTS Slow Block
Software
PSL Input
No response
This DDB signal is a purposely delayed output from the VTS which can block other functions 148
VT Fail Alarm
Software
PSL Input
Alarm self reset event
This DDB signal indicates a Voltage Transformer Fail condition
9.7
VTS SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 SUPERVISION
46
00
This column contains settings for Supervision. VT SUPERVISION
46
01
The setings under this sub-heading relate to Voltage Transformer Supervision (VTS). VTS Status
46
02
Blocking
0=Blocking 1=Indication
This setting determines which operations will occur upon VTS detection. • VTS provides alarm indication only. • VTS provides blocking of voltage dependent protection elements. VTS Reset Mode
46
03
Manual
0=Manual 1=Auto
There are two reset methods; Manual reset (via the front or remote communications), or Automatic reset (providing the VTS condition has been removed and the 3 phase voltages have been restored for more than 240ms. VTS Time Delay
46
04
5
From 1s to 10s step 0.1s
This setting that determines the operate time-delay upon detection of a VTS condition.
396
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description VTS I> Inhibit
46
05
10
From 0.08*I1 to 32*I1 step 0.01*I1
The setting is used to override a VTS blocking signal in the event of a phase fault occurring on the system that could trigger VTS logic. VTS I2> Inhibit
46
06
0.05
From 0.05*I1 to 0.5*I1 step 0.01*I1
The setting is used to override a voltage supervision block in the event of a fault occurring on the system with negative sequence current above this setting which could trigger the voltage supervision logic. VTS PickupThresh
46
0C
30
From 20*V1 to 120*V1 step 1*V1
This setting sets the threshold for the VTS element.
P14D-B/G/L/Z-TM-EN-1
397
Chapter 9 - Monitoring and Control
10
P14D
CURRENT TRANSFORMER SUPERVISION
The Current Transformer Supervision function (CTS) is used to detect failure of the AC current inputs to the IED. This may be caused by internal current transformer faults, overloading, or faults on the wiring. If there is a failure of the AC current input, the IED could misinterpret this as a failure of the actual phase currents on the power system, which could result in unnecessary tripping of a circuit breaker. Also, interruption in the AC current circuits can cause dangerous CT secondary voltages to be generated.
10.1
CTS IMPLEMENTATION
If the power system currents are healthy, no zero sequence voltage could be derived. If, however, one or more of the AC current inputs are missing, a zero sequence current would be derived, even if the actual power system phase currents are healthy. CTS works by using these criteria; that is by detecting a derived zero sequence current in the absence of a corresponding derived zero sequence voltage. The voltage transformer connection used must be able to refer zero sequence voltages from the primary to the secondary side. Therefore, this element should only be enabled where the VT is of a five-limb construction, or comprises three single-phase units with the primary star point earthed. The CTS function is implemented in the SUPERVISION column of the relevant settings group, under the sub-heading CT SUPERVISION. The following settings are relevant for CT Supervision: ● ● ● ●
CTS Status: to disable or enable CTS CTS VN< Inhibit: inhibits CTS if the zero sequence voltage exceeds this setting CTS IN> Set: determines the level of zero sequence current CTS Time delay: determines the operating time delay
CTS LOGIC
10.2
IN2 CTS Block
CTS IN> Set & VN CTS VN< Inhibit
CTS Fail Alarm
Key:
External DDB Signal Hardcoded threshold Setting cell Setting value Comparator for Overvalues
AND gate
Timer
&
OR gate
1
V01203
Figure 113: CTS logic diagram If the derived earth fault current (zero sequence current) exceeds the threshold set by CTS IN> Set, a CTS block DDB signal is produced, provided it is not inhibited. the signal is inhibited if the residual voltage is less than the threshold set by CTS VN< Inhibit. A CTS alarm is generated after a short time delay defined by the setting CTS Time Delay.
398
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
10.3
CTS DDB SIGNALS
Ordinal
Signal Name
Source
Type
Response
Description 149
CT Fail Alarm
Software
PSL Input
Alarm self reset event
PSL Input
No response
This DDB signal indicates a Current Transformer Fail condition 352
CTS Block
Software
This DDB signal is an instantaneously blocking output from the CTS which can block other functions
10.4
CTS SETTINGS Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 SUPERVISION
46
00
This column contains settings for Supervision. CT SUPERVISION
46
07
The setings under this sub-heading relate to Current Transformer Supervision (CTS). CTS Status
46
08
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables CT Supervision. CTS VN< Inhibit
46
09
5
0.5V to 22V step 0.5V
This setting is used to inhibit the CTS element should the zero sequence voltage exceed this threshold. The setting is only visible if CTS Mode is not disabled. CTS IN> Set
46
0A
0.1
From 0.08*I1 to 4*I1 step 0.01*I1
This setting determines the level of zero sequence current that must be present for a valid current transformer supervision condition. The setting is visible if CTS Mode is not disabled CTS Time Delay
46
0B
5
From 0s to 10s step 1s
This setting sets the operate time delay for the CTS element. VTS PickupThresh
46
0C
30
From 20*V1 to 120*V1 step 1*V1
This setting sets the threshold for the VTS element.
10.5
APPLICATION NOTES
10.5.1
SETTING GUIDELINES
The residual voltage setting, CTS VN< Inhibit and the residual current setting, CTS IN> Set, should be set to avoid unwanted operation during healthy system conditions. For example: ● CTS VN< Inhibit should be set to 120% of the maximum steady state residual voltage. ● CTS IN> Set will typically be set below minimum load current. ● CTS Time Delay is generally set to 5 seconds. Where the magnitude of residual voltage during an earth fault is unpredictable, the element can be disabled to prevent protection elements being blocked during fault conditions.
P14D-B/G/L/Z-TM-EN-1
399
Chapter 9 - Monitoring and Control
11
P14D
POLE DEAD FUNCTION
The Pole Dead Logic is used to indicate that one or more phases of the line are dead. It can also be used to block operation of underfrequency and undervoltage elements where applicable. A Pole Dead condition is determined by measuring the line currents and/or voltages or by monitoring the status of the circuit breaker auxiliary s.
11.1
POLE DEAD LOGIC IA Hardcoded threshold
&
1
Pole A Dead
&
1
Pole B Dead
&
1
Pole C Dead
VA Hardcoded threshold IB Hardcoded threshold VB Hardcoded threshold IC Hardcoded threshold VC Hardcoded threshold
1
Any Pole Dead
&
All Poles Dead
VTS Slow Block CB Open
Key:
Energising quantity External DDB Signal
Comparator for undervalues AND gate
&
Hardcoded threshold OR gate
1
Timer
V01201
Figure 114: Pole Dead logic If both the line current and voltage fall below a certain threshold the device will initiate a Pole Dead condition. The undervoltage (V<) and undercurrent (I<) thresholds are hardcoded internally. If one or more poles are dead, the device will indicate which phase is dead and will also assert the Any Pole Dead DDB signal. If all phases are dead the Any Pole Dead signal would be accompanied by the All Poles Dead signal. If the VT fails, a VTS Slow Block signal is taken from the VTS logic to block the Pole Dead indications that would be generated by the undervoltage and undercurrent thresholds. However, the VTS logic will not block the Pole Dead indications if they are initiated by a CB Open 3ph signal. A CB Open 3ph signal automatically initiates a Pole Dead condition regardless of the current and voltage measurement.
400
P14D-B/G/L/Z-TM-EN-1
P14D
11.2 Ordinal
Chapter 9 - Monitoring and Control
POLE DEAD DDB SIGNALS Signal Name
Source
Type
Response
Description 378
CB Open 3 ph
Software
PSL Input
Protection event
PSL Input
No response
PSL Input
No response
This DDB signal indicates that the CB is open on all 3 phases 380
All Poles Dead
Software
This DDB signal indicates that all poles are dead 381
Any Pole Dead
Software
This DDB signal indicates that one or more of the poles is dead. 382
Pole Dead A
Software
PSL Input
No response
PSL Input
No response
PSL Input
No response
This DDB signal indicates that the A-phase pole is dead. 383
Pole Dead B
Software
This DDB signal indicates that the B-phase pole is dead. 384
Pole Dead C
Software
This DDB signal indicates that the C-phase pole is dead.
P14D-B/G/L/Z-TM-EN-1
401
Chapter 9 - Monitoring and Control
12
P14D
DC SUPPLY MONITOR
DC supply monitoring can be a very desirable feature for some applications. The nominal DC Station supply is 48 V DC, which is provided by a very large battery. It is sometimes possible for this nominal supply to fall below or rise above acceptable operational limits. An excessive supply voltage may for example be indicative of overcharging and too low a voltage supply may indicate that the battery is failing. In such cases it is very useful to have DC supply monitoring functionality on some devices, which are being driven by the supply. The P40 Agile products provide such functionality by measuring the auxiliary DC supply fed into the device and processing this information using settings to define certain limits. In addition, the DC Auxiliary Supply value can be displayed on the front LCD to a resolution of 0.1 V DC. The measuring range is from 19 V DC to 300 V DC.
12.1
DC SUPPLY MONITOR IMPLEMENTATION
The P40Agile products provide three DC supply monitoring zones; zone 1, zone 2, and zone 3. This allows you to have multiple monitoring criteria. Each zone must be configured to correspond to either an overvoltage condition or an undervoltage condition. A single zone cannot be configured to provide an alarm for both undervoltage and overvoltage conditions. Typically, you would configure zones 1 and 2 for undervoltage conditions, whereby the lowest limit is set very low, and zone 3 for an overvoltage condition whereby the upper limit is very high. This is best illustrated diagrammatically: Vdc3 upper limit Zone 3 (overvoltage)
Vdc3 lower limit Vdc nominal Vdc1 upper limit Zone 1 (undervoltage)
Vdc1 lower limit Vdc2 upper limit Zone 2 (undervoltage)
Vdc2 lower limit V01221
Figure 115: DC Supply Monitor zones It is possible to have overlapping zones whereby zone 2 upper limit is lower than zone 1 lower limit in the above example. The DC Supply Monitoring function is implemented using settings in the DC SUP. MONITOR column. There are three sets of settings; one for each of the zones. The settings allow you to: ● ● ● ●
402
Enable or disable the function for each zone Set a lower voltage limit for each zone Set an upper voltage limit for each zone Set a time delay for each zone
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
12.2
DC SUPPLY MONITOR LOGIC Vdc
Vdc 1 Start
Vdc1 Lower Limit
&
Vdc 1 Trip
Vdc Vdc1 Upper Limit Vdc1 Status
Key:
Energising quantity
Comparator for undervalues
External DDB Signal
Enabled
Comparator for overvalues
InhibitDC SupMon
AND gate
&
Timer
V01220
Figure 116: DC Supply Monitor logic The diagram shows the DC Supply Monitoring logic for stage 1 only. Stages 2 and 3 are identical in principle. The logic function will work when the setting the Vdc1 status cell to enabled and the DC Supply Monitoring inhibit signal (InhibitDC SupMon) is low. If the auxiliary supply voltage (Vdc) exceeds the lower limit AND falls below the upper limit, the voltage is in the unhealthy zone and a Start signal is generated.
12.3
DC SUPPLY MONITOR SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description DC SUP. MONITOR
2A
00
This column contains settings for DC Voltage Supply Supervision DC ZONE ONE
2A
01
The settings under this sub-heading apply to zone 1 Vdc1 Status
2A
02
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the DC Supply Monitoring supervision function for zone 1 Vdc1 Lower Limit
2A
03
88
From 19 to 300 step 1
This setting set the lower threshold for the ZONE setting. Vdc1 Upper Limit
2A
04
99
From 19 to 300 step 1
This setting sets the upper threshold for the ZONE setting. Vdc1 Timer
2A
05
0.4
From 0s to 7200s step 0.1s
This setting sets the pickup/dropoff for the trip signal of the ZONE Supply Monitoring. DC ZONE TWO
2A
11
The settings under this sub-heading apply to zone 2 Vdc2 Status
2A
12
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the DC Supply Monitoring supervision function for zone 2 Vdc2 Lower Limit
2A
13
77
From 19 to 300 step 1
This setting set the lower threshold for the ZONE setting. Vdc2 Upper Limit
2A
14
88
From 19 to 300 step 1
This setting sets the upper threshold for the ZONE setting. Vdc2 Timer
2A
P14D-B/G/L/Z-TM-EN-1
15
0.4
From 0s to 7200s step 0.1s
403
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description This setting sets the pickup/dropoff for the trip signal of the ZONE Supply Monitoring. DC ZONE THREE
2A
21
The settings under this sub-heading apply to zone 3 Vdc3 Status
2A
22
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the DC Supply Monitoring supervision function for zone 3 Vdc3 Lower Limit
2A
23
121
From 19 to 300 step 1
This setting set the lower threshold for the ZONE setting. Vdc3 Upper Limit
2A
24
238
From 19 to 300 step 1
This setting sets the upper threshold for the ZONE setting. Vdc3 Time Delay
2A
25
0.4
From 0s to 7200s step 0.1s
This setting sets the pickup/dropoff for the trip signal of the ZONE Supply Monitoring.
12.4 Ordinal
DC SUPPLY MONITOR DDB SIGNALS Signal Name
Source
Type
Response
Description 762
Vdc1 Start
Software
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
PSL Input
Protection event
This DDB signal is the DC Supply Monitoring Zone 1 Start signal 763
Vdc2 Start
Software
This DDB signal is the DC Supply Monitoring Zone 2 Start signal 764
Vdc3 Start
Software
This DDB signal is the DC Supply Monitoring Zone 3 Start signal 765
Vdc1 Trip
Software
This DDB signal is the DC Supply Monitoring Zone 1 Trip signal 766
Vdc2 Trip
Software
This DDB signal is the DC Supply Monitoring Zone 2 Trip signal 767
Vdc3 Trip
Software
This DDB signal is the DC Supply Monitoring Zone 3 Trip signal 768
InhibitDC SupMon
Programmable Scheme Logic
This DDB signal is the DC Supply Monitoring Inhibit Signal 769
DC Supply Fail
Software
This DDB signal is the DC Supply Monitoring Alarm Signal
404
P14D-B/G/L/Z-TM-EN-1
P14D
13
Chapter 9 - Monitoring and Control
FAULT LOCATOR
Some models provide fault location functionality. It is possible to identify the fault location by measuring the fault voltage and current magnitude and phases and presenting this information to a Fault Locator function. The fault locator is triggered whenever a fault record is generated, and the subsequent fault location data is included as part of the fault record. This information is also displayed in the Fault Location cell in the VIEW RECORDS column. This cell will display the fault location in metres, miles ohms or percentage, depending on the chosen units in the Fault Location cell of the MEASURE'T SETUP column. The Fault Locator uses 12 cycles of the analogue input signals to calculate the fault location. The result is included it in the fault record. The pre-fault and post-fault voltages are also presented in the fault record. The settings associated with the Fault Locator can be found in the FAULT LOCATOR column.
13.1
FAULT LOCATOR SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 FAULT LOCATOR
47
00
This column contains settings for Fault locator Line Length
47
01
16000
From 10 to 1000000 step 1
10
From 0.005 to 621 step 0.005
6
From 0.1*V1/I1 to 250*V1/I1 step 0.01*V1/I1
This setting sets the line length in metres. Line Length
47
02
This setting sets the line length in miles. Line Impedance
47
03
This setting sets the positive sequence line impedance in ohms Line Angle
47
04
70
From 20 to 85 step 1
This setting sets the positive sequence line impedance angle in degrees KZN Residual
47
05
1
From 0 to 7 step 0.01
This setting sets the residual compensating factor. KZN Res Angle
47
06
0
From -90 to 90 step 1
This setting sets the residual compensating factor angle.
13.2
FAULT LOCATOR SETTINGS EXAMPLE
Assuming the following data for the protected line: Parameter
Value
CT Ratio
1200/5
VT Ratio
230000/115
Line Length
10 km
Positive sequence line impedance ZL1 (per km|)
0.089+j0.476 Ohms/km
Zero sequence line impedance ZL0
0.34+j1.03 ohms/km
Zero sequence mutual impedance ZM0
0.1068+j0.5712 Ohms/km
P14D-B/G/L/Z-TM-EN-1
405
Chapter 9 - Monitoring and Control
P14D
The line impedance magnitude and angle settings are calculated as follows: ● Ratio of secondary to primary impedance = CT ratio/VT ratio = 0.12 ● Positive sequence line impedance ZL1 (total) = 0.12 x 10(0.484Ð79.4°) = 0.58 Ð79.4° ● Therefore set line length = 0.58 ● Line angle = 79° The residual impedance compensation magnitude and angle are calculated using the following formula:
KZn =
ZL0 − ZL1 ( 0.34 + j1.03) − ( 0.089 + j 0.476 ) 0.6∠65.2° = = = 0.41∠ − 14.2° 3ZL1 3 ( 0.484∠79.4° ) 1.45∠79.4°
Therefore the settings are: ● KZN Residual = 0.41 ● KZN Res Angle = -14
406
P14D-B/G/L/Z-TM-EN-1
P14D
14
Chapter 9 - Monitoring and Control
SYSTEM CHECKS
In some situations it is possible for both "bus" and "line" sides of a circuit breaker to be live when the circuit breaker is open - for example at the ends of a feeder that has a power source at each end. Therefore, it is normally necessary to check that the network conditions on both sides are suitable, before closing the circuit breaker. This applies to both manual circuit breaker closing and autoreclosing. If a circuit breaker were to be closed when the line and bus voltages are both live, with a large phase angle, frequency or magnitude difference between them, the system could be subjected to an unacceptable shock, resulting in loss of stability, and possible damage to connected machines. The System Checks functionality involves monitoring the voltages on both sides of a circuit breaker, and if both sides are live, performing a synchronisation check to determine whether any differences in voltage magnitude, phase angle or frequency are within permitted limits. The pre-closing system conditions for a given circuit breaker depend on the system configuration, and for autoreclosing, on the selected autoreclose program. For example, on a feeder with delayed autoreclosing, the circuit breakers at the two line ends are normally arranged to close at different times. The first line end to close usually has a live bus and a dead line immediately before reclosing. The second line end circuit breaker now sees a live bus and a live line. If there is a parallel connection between the ends of the tripped feeder the frequencies will be the same, but any increased impedance could cause the phase angle between the two voltages to increase. Therefore just before closing the second circuit breaker, it may be necessary to perform a synchronisation check, to ensure that the phase angle between the two voltages has not increased to a level that would cause unacceptable shock to the system when the circuit breaker closes. If there are no parallel interconnections between the ends of the tripped feeder, the two systems could lose synchronism altogether and the frequency at one end could "slip" relative to the other end. In this situation, the second line end would require a synchronism check comprising both phase angle and slip frequency checks. If the second line-end busbar has no power source other than the feeder that has tripped; the circuit breaker will see a live line and dead bus assuming the first circuit breaker has re-closed. When the second line end circuit breaker closes the bus will charge from the live line (dead bus charge).
14.1
SYSTEM CHECKS IMPLEMENTATION
The System Checks function is enabled or disabled by the System Checks setting in the CONFIGURATION column. If System Checks is disabled, the SYSTEM CHECKS menu becomes invisible, and a SysChks Inactive DDB signal is set. The System Checks function provides Live/Dead Voltage Monitoring, two stages of Check Synchronisation and System Split indication.
14.1.1
VOLTAGE MONITORING
The P40Agile voltage products have four voltage transformer inputs; three for a three-phase “Main VT” input and a measurement VT which can be used for System Check purposes. Depending on the primary system arrangement, the main three-phase VT may be located on either the busbar side or the line side of the circuit breaker, with the measurement VT being located on the other side. Therefore, the device has to be told the location of the main VT. This is done with the Main VT Location setting in the TRANS. RATIOS menu. The default setting is 'Line'. The measurement VT may be connected to either a phase-to-phase or phase to neutral voltage. The C/S Input setting in the TRANS. RATIOS menu should be set as appropriate. The settings in the VOLTAGE MONITORS sub-heading allow you to define the threshold at which a voltage is considered live, and a threshold at which the voltage is considered dead. These thresholds apply to both line and bus sides. If the measured voltage falls below the Dead Voltage setting, a DDB signal is generated
P14D-B/G/L/Z-TM-EN-1
407
Chapter 9 - Monitoring and Control
P14D
(Dead Bus, or Dead Line, depending on which side is being measured). If the measured voltage exceeds the Live Voltage setting, a DDB signal is generated (Live Bus, or Live Line, depending on which side is being measured).
14.1.2
CHECK SYNCHRONISATION
The device provides two stages of Check Synchronisation. The first stage (CS1) is designed for general use, whereby the frequencies and phase angles of both sides are compared and if the difference is within set limits, the circuit breaker is allowed to close. The second stage (CS2) is similar to stage, but has an additional adaptive setting. CS2 is used for cases where the two sides are out of synchronism and one frequency is slipping continuously with respect to another. If the closing time of the Circuit breaker is known, the close command can be issued at a definite point in the cycle such that the CB closes at the point when both sides are in phase. The settings specific to Check Synchronisation are found under the sub-heading CHECK SYNC in the SYSTEM CHECKS column. The only difference between the CS1 settings and the CS2 settings is that CS2 Slip Control setting has an option for predictive closure of CB ('Freq + CB Comp').
14.1.3
SYSTEM SPLIT
If the line side and bus side are of the same frequency (i.e. in synchronism) but have a large phase angle between them (180° +/- the set limits), the system is said to be 'Split'. If this is the case, the device will detect this and issue an alarm signal indicating this. The settings specific to System Split functionality are found under the sub-heading SYSTEM SPLIT in the SYSTEM CHECKS column.
408
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
14.2
SYSTEM CHECK LOGIC System Checks SysChks Inactive
Disabled Enabled
CS1 Criteria OK
VAN VBN
CS2 Criteria OK
VCN
SS Criteria OK
Select
VAB
CS1 Slip Freq >
VBC VCA
CS1 Slip Freq < VBus
CS2 Slip Freq > CS2 Slip Freq <
Key: External DDB Signal
CS Vline > Check Synchronisation Function
Internal caculation Internal function Setting cell Setting value
AND gate
&
OR gate
CS Vbus > CS Vline < CS Vbus < CS Vline > Vbus CS Vline < Vbus CS1 Fline > Fbus CS1 Fline < Fbus CS1 Angle not OK+
1
CS1 Angle not OKCS2 Fline > Fbus CS2 Fline < Fbus CS2 Angle not OK+ CS2 Angle not OKAngle rotating anticlockwise VTS Fast Block
Angle rotating clockwise 1
& & & &
CS1 Slipfreq>
&
CS1 Slipfreq<
&
CS2 Slipfreq>
&
CS2 Slipfreq<
&
CS Vline>
&
CS Vbus>
&
CS Vline<
&
CS Vbus<
&
CS Vline>Vbus
&
CS Vline
&
CS1 Fline>Fbus
&
CS1 Fline
&
CS1 Ang Not OK +
&
CS1 Ang Not OK -
&
CS2 Fline>Fbus
&
CS2 Fline
&
CS2 Ang Not OK +
&
CS2 Ang Not OK -
&
CS Ang Rot ACW
&
CS Ang Rot CW
F out of Range CS1 Status Enabled
&
Check Sync 1 OK
&
Check Sync 2 OK
&
System Split
CS1 Enabled CS2 Status Enabled
CS2 Enabled SS Status Enabled
SysSplit Enabled
V01205
Figure 117: System Check logic
P14D-B/G/L/Z-TM-EN-1
409
Chapter 9 - Monitoring and Control
14.3
P14D
SYSTEM CHECK PSL SysChks Inactive Check Sync 1 OK Check Sync 2 OK Man Check Synch
Live Line
&
Dead Bus
1
AR Sys Checks
&
Dead Line
Key: External DDB Signal
&
Live Bus
OR gate
1
AND gate
&
V02028
Figure 118: System Check PSL
14.4
SYSTEM CHECK SETTINGS
Menu Text
Col
Row
Default Setting
Available Options
Description GROUP 1 SYSTEM CHECKS
48
00
This column contains settings for the Voltage Monitors and the Check Synchronism function. VOLTAGE MONITORS
48
14
The settings under this sub-heading relate to Voltage Monitors Live Voltage
48
15
32
From 1*V1 to 132*V1 step 0.5*V1
This setting sets the minimum voltage threshold above which a line or bus is considered ‘Live’. Dead Voltage
48
16
13
From 1*V1 to 132*V1 step 0.5*V1
This setting sets the maximum voltage threshold below which a line or bus is considered ‘Dead’. CHECK SYNC.
48
17
The settings under this sub-heading relate to Check Synchronism. CS1 Status
48
18
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the first stage Check Synchronism element. CS1 Phase Angle
48
19
20
From 5 to 90 step 1
This setting sets the maximum phase angle difference between the line and bus voltage for the first stage Phase Angle check to be satisfactory. CS1 Slip Control
48
1A
Frequency
0=None 1=Timer 2=Frequency 3=Both
This setting determines whether the first stage Slip Control is by slip frequency, by timer, or a combination of both. CS1 Slip Freq
48
1B
0.05
From 0.01Hz to 1Hz step 0.01Hz
This seting sets the maximum frequency difference between the line and bus voltage for the for the first stage Slip Frequency check to be satisfactory. CS1 Slip Timer
48
1C
1
From 0s to 99s step 0.01s
This setting sets the minimum operate time delay for the first stage Check Syncrhonism element.
410
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
Default Setting
Available Options
Description CS2 Status
48
1D
Disabled
0 = Disabled or 1 = Enabled
This setting enables or disables the second stage Check Synchronism element. CS2 Phase Angle
48
1E
20
From 5 to 90 step 1
This setting sets the maximum phase angle difference between the line and bus voltage for the second stage Phase Angle check to be satisfactory.
CS2 Slip Control
48
1F
Frequency
0=None 1=Timer 2=Frequency 3=Timer + Freq 4=Freq + CB Comp
This setting determines whether the second stage Slip Control is by slip frequency, by timer, or a combination of both. CS2 Slip Freq
48
20
0.05
From 0.01Hz to 1Hz step 0.01Hz
This seting sets the maximum frequency difference between the line and bus voltage for the for the second stage Slip Frequency check to be satisfactory. CS2 Slip Timer
48
21
1
From 0s to 99s step 0.01s
This setting sets the minimum operate time delay for the second stage Check Syncrhonism element. CS Undervoltage
48
22
54
From 10 to 132 step 0.5
This setting sets the check sync undervoltage threshold CS Overvoltage
48
23
130
From 40 to 185 step 0.5
This setting sets the check sync overvoltage threshold CS Diff Voltage
48
24
6.5
From 1 to 132 step 0.5
This setting sets the maximum voltage magnitude difference between the line and bus, which is allowed for the check to be satisfactory.
CS Voltage Block
48
25
V<
0=None 1=V< 2=V> 3=Vdiff> 4=V< and V> 5=V< and Vdiff> 6=V> and Vdiff> 7=V< V> and Vdiff
This settng determines which condition or conditions must be satisfied in order for the Check Synchrnism condition to be satisfactory. The setting is an 8-bit binary string (data type G41). SYSTEM SPLIT
48
26
The settins under this sub-headin relate to System Split condition (System Split is where a line and bus are detected, which are not possible to synchronise). SS Status
48
27
Enabled
0 = Disabled or 1 = Enabled
This setting enables or disables the System Split function. SS Phase Angle
48
28
120
From 90 to 175 step 1
This setting sets the maximum phase angle difference between the line and bus voltage, which must be exceeded for the System Split condition to be satisfied. SS Under V Block
48
29
Enabled
0 = Disabled or 1 = Enabled
This setting activates the Undervoltage blocking. SS Undervoltage
48
2A
54
From 10 to 132 step 0.5
This setting sets an Undervoltage threshold above which the line and bus voltage must be, to satisfy the System Split condition. SS Timer
48
2B
1
From 0s to 99s step 0.01s
The System Split output remains set for as long as the System Split criteria are true, or for a minimum period equal to the System Split Timer setting, whichever is longer.
P14D-B/G/L/Z-TM-EN-1
411
Chapter 9 - Monitoring and Control
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description CB Close Time
48
2F
0.05
From 0s to 0.5s step 0.001s
This setting sets the CB closing time, from receipt of a CB close command until the main s touch.
14.5 Ordinal
SYSTEM CHECK DDB SIGNALS Signal Name
Source
Type
Response
Description 166
System Split
Software
PSL Input
Alarm self reset event
Software
PSL Input
No response
Software
PSL Input
No response
Software
PSL Input
No response
Software
PSL Input
No response
Software
PSL Input
No response
PSL Input
No response
PSL Input
No response
Programmable Scheme Logic
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
Programmable Scheme Logic
PSL Output
No response
Software
PSL Input
Protection event
This DDB signal is the System Split alarm 443
Live Line
This DDB signal indicates a Live Line 444
Dead Line
This DDB signal indicates a Dead Line 445
Live Bus
This DDB signal indicates a Live Bus 446
Dead Bus
This DDB signal indicates a Dead Bus 447
Check Sync 1 OK
This DDB signal indicates that Check Synchronism stage 1 (CS1) is OK 448
Check Sync 2 OK
Software
This DDB signal indicates that Check Synchronism stage 2 (CS2) is OK 449
SysChks Inactive
Software
This DDB signal indicates that all System Checks are inactive 450
CS1 Enabled
This DDB signal enables CS1 451
CS2 Enabled
This DDB signal enables CS2 452
SysSplit Enabled
This DDB signal enables System Split 471
CS1 Slipfreq>
This DDB signal indicates that the CS1 Slip frequency is above the set threshold 472
CS1 Slipfreq<
Software
PSL Input
No response
This DDB signal indicates that the CS1 Slip frequency is below the set threshold 473
CS2 Slipfreq>
Software
PSL Input
Protection event
This DDB signal indicates that the CS2 Slip frequency is above the set threshold 474
CS2 Slipfreq<
Software
PSL Input
No response
This DDB signal indicates that the CS2 Slip frequency is below the set threshold 489
CS Vline<
Software
PSL Input
No response
This DDB signal indicates that the line voltage is less than the Check Synchronism Undervoltage threshold 490
CS Vbus<
Software
PSL Input
No response
This DDB signal indicates that the bus voltage is less than the Check Synchronism Undervoltage threshold 491
412
CS Vline>
Software
PSL Input
No response
P14D-B/G/L/Z-TM-EN-1
P14D
Ordinal
Chapter 9 - Monitoring and Control
Signal Name
Source
Type
Response
Description This DDB signal indicates that the line voltage is more than the Check Synchronism Overvoltage threshold 492
CS Vbus>
Software
PSL Input
No response
This DDB signal indicates that the bus voltage is more than the Check Synchronism Overvoltage threshold 493
CS Vline>Vbus
Software
PSL Input
No response
This DDB signal indicates that the line voltage is greater than the bus voltage + the CS diff voltage setting 494
CS Vline
Software
PSL Input
No response
This DDB signal indicates that the bus voltage is greater than the line voltage + the CS diff voltage setting 495
CS1 Fline>Fbus
Software
PSL Input
No response
This DDB signal indicates that the line frequency is greater than the bus frequency + the CS1 slip frequency setting 496
CS1 Fline
Software
PSL Input
No response
This DDB signal indicates that the bus frequency is greater than the line frequency + the CS1 slip frequency setting 497
CS1 Ang Not OK +
Software
PSL Input
No response
This DDB signal indicates that the line angle has crossed 0 degrees into the 0 to 180 quadrant. 498
CS1 Ang Not OK -
Software
PSL Input
No response
This DDB signal indicates that the line angle has crossed 0 degrees into the 0 to -180 quadrant. 519
CS2 Fline>Fbus
Software
PSL Input
No response
This DDB signal indicates that the line frequency is greater than the bus frequency + the CS2 slip frequency setting 520
CS2 Fline
Software
PSL Input
No response
This DDB signal indicates that the bus frequency is greater than the line frequency + the CS2 slip frequency setting 521
CS2 Ang Not OK +
Software
PSL Input
No response
This DDB signal indicates that the line angle has crossed 0 degrees into the 0 to 180 quadrant. 522
CS2 Ang Not OK -
Software
PSL Input
No response
This DDB signal indicates that the line angle has crossed 0 degrees into the 0 to -180 quadrant. 523
CS Ang Rot ACW
Software
PSL Input
No response
This DDB signal indicates that the Line/Bus phase angle is rotating anti-clockwise 524
CS Ang Rot CW
Software
PSL Input
No response
This DDB signal indicates that the Line/Bus phase angle is rotating clockwise
14.6
APPLICATION NOTES
14.6.1
USE OF CHECK SYNC 2 AND SYSTEM SPLIT
Check Sync 2 (CS2) and System Split functions are included for situations where the maximum permitted slip frequency and phase angle for synchronism checks can change due to adverse system conditions. A typical application is on a closely interconnected system, where synchronism is normally retained when a feeder is tripped. But under some circumstances, with parallel interconnections out of service, the feeder ends can drift out of synchronism when the feeder is tripped. Depending on the system and machine characteristics, the conditions for safe circuit breaker closing could be, for example: Condition 1: For synchronized systems, with zero or very small slip: ● Slip 50 mHz; phase angle <30° Condition 2: For unsynchronized systems, with significant slip: ● Slip 250 mHz; phase angle <10° and decreasing
P14D-B/G/L/Z-TM-EN-1
413
Chapter 9 - Monitoring and Control
P14D
By enabling both CS1 and CS2, the device can be configured to allow CB closure if either of the two conditions is detected. For manual circuit breaker closing with synchronism check, some utilities might prefer to arrange the logic to check initially for condition 1 only. However, if a System Split is detected before the condition 1 parameters are satisfied, the device will switch to checking for condition 2 parameters instead, based on the assumption that a significant degree of slip must be present when system split conditions are detected. This can be arranged by suitable PSL logic, using the System Check DDB signals.
14.6.2
SLIP CONTROL
Slip control can be achieved by timer, by frequency or by both. The settings CS1 Slip Control and CS2 Slip Control are used to determine which type of slip control is to be used. As the device s direct measurement of frequency, you would normally use frequency only. If you are using Slip Control by Timer, the combination of Phase Angle and Timer settings determines an effective maximum slip frequency, calculated as:
2A/360T – for CS1 A/360T – for CS2 where: ● A = Phase Angle setting in degrees ● T = Slip Timer setting in seconds Examples For CS1, where the Phase Angle setting is 30° and the Timer setting is 3.3 s, the “slipping” vector has to remain within +/- 30° of the reference vector for at least 3.3 seconds. Therefore a synchronisation check output will not be given if the slip is greater than 2 x 30° in 3.3 seconds. Therefore, the maximum slip frequency = 2x30/360x3.3 = 0.0505 hz. For CS2, where the Phase Angle setting is 10° and the Timer setting is 0.1 sec., the slipping vector has to remain within 10° of the reference vector, with the angle decreasing, for 0.1 sec. When the angle es through zero and starts to increase, the synchronisation check output is blocked. Therefore an output will not be given if the slip is greater than 10° in 0.1 second. Therefore, the maximum slip frequency = 10/360x0.1 = 0.278 Hz. Slip control by Timer is not practical for “large slip/small phase angle” applications, because the timer settings required are very small, sometimes less than 0.1 seconds. For these situations, slip control by frequency is better. If Slip Control by Frequency + Timer is selected, for an output to be given, the slip frequency must be less than BOTH the set Slip Freq. value and the value determined by the Phase Angle and Timer settings.
14.6.3
PREDICTIVE CLOSURE OF CIRCUIT BREAKER
The setting CS2 Slip Control setting contains an option for compensating the time taken to close the CB. When set to provide CB Close Time compensation, a predictive approach is used to close the circuit breaker ensuring that closing occurs at close to 0º therefore minimising the impact to the power system. The actual closing angle is subject to the constraints of the existing product architecture, i.e. the protection task runs twice per power system cycle, based on frequency tracking over the frequency range of 40 Hz to 70 Hz.
14.6.4
VOLTAGE AND PHASE ANGLE CORRECTION
For the Check Synchronisation function, the device needs to convert measured secondary voltages into primary voltages. In some applications, VTs either side of the circuit breaker may have different VT Ratios. In such cases, a magnitude correction factor is required.
414
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
There are some applications where the main VT is on the HV side of a transformer and the Check Sync VT is on the LV side, or vice-versa. If the vector group of the transformer is not "0", the voltages are not in phase, so phase correction is also necessary. The correction factors are as follows and are located in the TRANS. RATIOS column: • C/S V kSM, where kSM is the voltage correction factor. • C/S Phase kSA, where kSA is the angle correction factor. Assuming C/S input setting is A-N, then: The line and bus voltage magnitudes are matched if Va sec = Vcs sec x C/S V kSA The line and bus voltage angles are matched if ÐVa sec = ÐVcs sec + C/S Phase kSA Note: Setting the correct VT ratios will not adjust the k factors and will have no impact on the Check Synchronisation functionality. The Check Synchronisation only takes into the k factors setting.
Note: The VT ratios have impacts on the presentation of the related measurements or settings in of primary or secondary values.
Note: The CS voltage settings in the SYSTEM CHECKS column are all referenced by the Main VT ratios.
Note: The C/S Bus-Line Ang measurement takes into the C/S Phase kSA setting.
The following application scenarios show where the voltage and angular correction factors are applied to match different VT ratios: Physical Ratios (ph-N Values) Scenario
Main VT Ratio Pri (kV)
Sec (V)
CS VT Ratio Pri (kV)
Sec (V)
CS Correction Factors
Setting Ratios Main VT Ratio (phph) Always Pri (kV)
Sec (V)
CS VT Ratio Pri (kV)
kSM
kSA
Sec (V)
1
220/√3
110/√3
132/√3
100/√3
220
110
132
100
1.1
30º
2
220/√3
110/√3
220/√3
110
220
110
127
110
0.577
0º
3
220/√3
110/√3
220/√3
110/3
220
110
381
110
1.732
0º
P14D-B/G/L/Z-TM-EN-1
415
Chapter 9 - Monitoring and Control
15
P14D
TRIP CIRCUIT SUPERVISION
In most protection schemes, the trip circuit extends beyond the IED enclosure and es through components such as links, relay s, auxiliary switches and other terminal boards. Such complex arrangements may require dedicated schemes for their supervision. There are two distinctly separate parts to the trip circuit; the trip path, and the trip coil. The trip path is the path between the IED enclosure and the CB cubicle. This path contains ancillary components such as cables, fuses and connectors. A break in this path is possible, so it is desirable to supervise this trip path and to raise an alarm if a break should appear in this path. The trip coil itself is also part of the overall trip circuit, and it is also possible for the trip coil to develop an open-circuit fault.
15.1
TRIP CIRCUIT SUPERVISION SCHEME 1
This scheme provides supervision of the trip coil with the CB open or closed, however, it does not provide supervision of the trip path whilst the breaker is open. Also, the CB status can be monitored when a selfreset trip is used. However, this scheme is incompatible with latched trip s, as a latched will short out the opto-input for a time exceeding the recommended Delayed Drop-off (DDO) timer setting of 400 ms, and therefore does not CB status monitoring. If you require CB status monitoring, further opto-inputs must be used. Note: A 52a CB auxiliary follows the CB position. A 52b auxiliary is the opposite.
+ve Trip Output Relay
Trip path
52A
Trip coil
Blocking diode 52B R1 V01214
Opto-input
Circuit Breaker
-ve
Figure 119: TCS Scheme 1 When the CB is closed, supervision current es through the opto-input, blocking diode and trip coil. When the CB is open, supervision current flows through the opto-input and into the trip coil via the 52b auxiliary . This means that Trip Coil supervision is provided when the CB is either closed or open, however Trip Path supervision is only provided when the CB is closed. No supervision of the trip path is provided whilst the CB is open (pre-closing supervision). Any fault in the trip path will only be detected on CB closing, after a 400 ms delay.
15.1.1
RESISTOR VALUES
The supervision current is a lot less than the current required by the trip coil to trip a CB. The opto-input limits this supervision current to less than 10 mA. If the opto-input were to be short-circuited however, it could be possible for the supervision current to reach a level that could trip the CB. For this reason, a resistor R1 is often used to limit the current in the event of a short-circuited opto-input. This limits the current to less than 60 mA. The table below shows the appropriate resistor value and voltage setting for this scheme. Resistor R1 (ohms)
Trip Circuit Voltage 24/27
416
620
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 9 - Monitoring and Control
Trip Circuit Voltage
Resistor R1 (ohms)
30/34
820
48/54
1.2 k
110/125
2.7 k
220/250
5.2 k
Warning: If your IED has Opto Mode settings (Opto 9 Mode, Opto 10 Mode, Opto 11 Mode) in the OPTO CONFIG column, these settings MUST be set to 'TCS'.
15.1.2
PSL FOR TCS SCHEME 1 0
Opto-input
0 straight
dropoff 400 &
50 pickup
0
Key: External DDB Signal Time Delay
Inverter
Latching
0
NC Output Relay
LED Alarm
& V01217
Figure 120: PSL for TCS Scheme 1 The opto-input can be used to drive a Normally Closed Output Relay, which in turn can be used to drive alarm equipment. The signal can also be inverted to drive a latching programmable LED and a alarm DDB signal. The DDO timer operates as soon as the opto-input is energised, but will take 400 ms to drop off/reset in the event of a trip circuit failure. The 400 ms delay prevents a false alarm due to voltage dips caused by faults in other circuits or during normal tripping operation when the opto-input is shorted by a self-reset trip . When the timer is operated the NC (normally closed) output relay opens and the LED and alarms are reset. The 50 ms delay on pick-up timer prevents false LED and alarm indications during the power up time, following a voltage supply interruption.
15.2
TRIP CIRCUIT SUPERVISION SCHEME 2
Much like TCS scheme 1, this scheme provides supervision of the trip coil with the breaker open or closed but does not provide pre-closing supervision of the trip path. However, using two opto-inputs allows the IED to correctly monitor the circuit breaker status since they are connected in series with the CB auxiliary s. This is achieved by asg Opto-input 1 to the 52a and Opto-input 2 to the 52b . Provided the Circuit Breaker Status setting in the CB CONTROL column is set to '52a and 52b', the IED will correctly monitor the status of the breaker. This scheme is also fully compatible with latched s as the supervision current will be maintained through the 52b when the trip is closed.
P14D-B/G/L/Z-TM-EN-1
417
Chapter 9 - Monitoring and Control
P14D
+ve Trip Output Relay
Trip coil
52A
Trip path
52B R1
Opto-input 1
R2
V01215
Circuit Breaker
-ve
Opto-input 2
Figure 121: TCS Scheme 2 When the breaker is closed, supervision current es through opto input 1 and the trip coil. When the breaker is open current flows through opto input 2 and the trip coil. As with scheme 1, no supervision of the trip path is provided whilst the breaker is open. Any fault in the trip path will only be detected on CB closing, after a 400 ms delay.
15.2.1
RESISTOR VALUES
As with scheme 1, optional resistors R1 and R2 can be added to prevent tripping of the CB if either optoinput is shorted. The table below shows the appropriate resistor value and voltage setting for this scheme. Trip Circuit Voltage
Resistor R1 and R2 (ohms)
24/27
620
30/34
820
48/54
1.2 k
110/125
2.7 k
220/250
5.2 k
Warning: If your IED has Opto Mode settings (Opto 9 Mode, Opto 10 Mode, Opto 11 Mode) in the OPTO CONFIG column, these settings MUST be set to 'TCS'.
15.2.2
PSL FOR TCS SCHEME 2 Opto-input 1
CB Aux 3ph (52A) 0
1
0 straight
dropoff 400
Opto-input 2
NC Output Relay CB Aux 3ph (52B)
& Key: External DDB Signal Time Delay
0
Inverter
&
OR gate
1
50 pickup
0
Latching
LED Alarm V01218
Figure 122: PSL for TCS Scheme 2 The PSL for this TCS scheme 2 is practically the same as that of TCS scheme 1. The main difference is that both opto-inputs must be low before a trip circuit fail alarm is given.
418
P14D-B/G/L/Z-TM-EN-1
P14D
15.3
Chapter 9 - Monitoring and Control
TRIP CIRCUIT SUPERVISION SCHEME 3
TCS Scheme 3 is designed to provide supervision of the trip coil with the breaker open or closed, but unlike TCS schemes 1 and 2, it also provides pre-closing supervision of the trip path. Since only one opto-input is used, this scheme is not compatible with latched trip s. If you require CB status monitoring, further opto-inputs must be used. +ve R3 Output Relay
Trip path
Trip coil
52A
R2 52B Opto-input
R1
Circuit Breaker
V01216
-ve
Figure 123: TCS Scheme 3 When the CB is closed, supervision current es through the opto-input, resistor R2 and the trip coil. When the CB is open, current flows through the opto-input, resistors R1 and R2 (in parallel), resistor R3 and the trip coil. Unlike schemes 1 and 2, supervision current is maintained through the trip path with the breaker in either state, therefore providing pre-closing supervision.
15.3.1
RESISTOR VALUES
As with TCS schemes 1 and 2, resistors R1 and R2 are used to prevent false tripping, if the opto-input is accidentally shorted. However, unlike the other two schemes, this scheme is dependent on the position and value of these resistors. Removing them would result in incomplete trip circuit monitoring. The table below shows the resistor values and voltage settings required for satisfactory operation. Trip Circuit Voltage
Resistor R1 and R2 (ohms)
Resistor R3
24/27
620
330
30/34
820
430
48/54
1.2 k
620
110/125
2.7 k
1.5 k
220/250
5.2 k
2.7 k
Warning: If your IED has Opto Mode settings (Opto 9 Mode, Opto 10 Mode, Opto 11 Mode) in the OPTO CONFIG column, these settings MUST be set to 'TCS'.
P14D-B/G/L/Z-TM-EN-1
419
Chapter 9 - Monitoring and Control
15.3.2
P14D
PSL FOR TCS SCHEME 3 0
Opto-input
0 straight
dropoff 400 50 pickup
&
NC Output Relay
Latching
0
Key: External DDB Signal Time Delay
0
LED Alarm
Inverter
& V01217
Figure 124: PSL for TCS Scheme 3
15.4
TRIP CIRCUIT SUPERVISION SCHEME 4
Scheme 4 is identical to that offered by MVAX31 (a Trip Circuit Supervision relay) and consequently is fully compliant with ENA Specification H7. To achieve this compliance, there are three settings in the OPTO CONFIG column. These settings (Opto 9 Mode, Opto 10 Mode and Opto 11 Mode) must be set to 'TCS' before the scheme can be used. Typically only two of these three opto-inputs would be used. In the diagram below, Opto-input 1 and Opto-input 2 would correlate to one of the above-mentioned optoinputs. +ve Output Relay
52 A
Trip path
Opto-input 2 R1 V01222
Trip coil
52 B
R2 Opto-input 1
Circuit Breaker
-ve
Figure 125: TCS Scheme 4 Under normal non-fault conditions, a current of 2 mA flows through one of the following paths: a) Post Close Supervision: When the CB is in a closed state, the current flows through R1, Opto-input 1, 52A and the trip coil. b) Pre-close Supervision: When the CB is in an open state, the current flows through R1, Opto-input 1, 52B, Opto-input 2 and the trip coil. c) Momentary Tripping with Self-reset : When a self-reset trip is in a closed state, the current flows through the trip , 52A and the trip coil. d) Tripping with Latched : When a latched trip is used and when it is in a closed state, the current flows through the trip , 52A, the trip coil, then changing to the path trip , R2, 52B, Opto-input 2 and the trip coil. A current of 2 mA through the Trip Coil is insufficient to cause operation of the Trip , but large enough to energise the opto-inputs. Under this condition both of the opto-inputs will output logic 1, so the output relay (TCS health) will be closed and the Alarm will be off. If a break occurs in the trip circuit, the current ceases to flow, resulting in both opto-inputs outputting logic 0. This will open the output relay and energise the alarm.
420
P14D-B/G/L/Z-TM-EN-1
P14D
15.4.1
Chapter 9 - Monitoring and Control
RESISTOR VALUES
The TCS opto-inputs sink a constant current of 2 mA.The values of external resistors R1 and R2 are chosen to limit the current to a maximum of 60 mA in the event that an opto-input becomes shorted. The values of these resistors depend on the trip circuit voltage. To achieve compliance with ENA Specification H7, we have carried out extensive testing and we recommended the following resistors values. Trip Circuit Voltage
Resistor R1 and R2 (ohms)
24/27
620
30/34
820
48/54
1.2 k
110/125
2.7 k
220/250
5.2 k
For the momentary tripping condition, none of the opto-inputs are energised. To tide over this normal CB operation, a drop-off time delay of about 400 ms is added in the PSL.
Warning: If your IED has Opto Mode settings (Opto 9 Mode, Opto 10 Mode, Opto 11 Mode) in the OPTO CONFIG column, these settings MUST be set to 'TCS'.
15.4.2
PSL FOR TCS SCHEME 4 Opto-input 1 0
1
dropoff 400
0 straight 0
NC Output Relay
Latching
LED
Opto-input 2 & Key: External DDB Signal Time Delay
Inverter
&
OR gate
1
50 pickup
0
Alarm
V01223
Figure 126: PSL for TCS Scheme 4
P14D-B/G/L/Z-TM-EN-1
421
Chapter 9 - Monitoring and Control
422
P14D
P14D-B/G/L/Z-TM-EN-1
SCADA COMMUNICATIONS CHAPTER 10
Chapter 10 - SCADA Communications
424
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 10 - SCADA Communications
CHAPTER OVERVIEW
The MiCOM products substation automation system and SCADA communications based on two communications technologies; serial and Ethernet. Serial communications has been around for a long time, and there are many substations still wired up this way. Ethernet is a more modern medium and all modern substation communications is based on this technology. Alstom Grid's MiCOM products both of these communication technologies. This chapter contains the following sections: Chapter Overview Communication Interfaces Serial Communication Standard Ethernet Communication Overview of Data Protocols Courier IEC 60870-5-103 DNP 3.0 MODBUS IEC 61850 Read Only Mode Time Synchronisation Demodulated IRIG-B SNTP Time Synchronsiation using the Communication Protocols Communication Settings
425 426 427 430 431 432 436 439 442 456 462 464 465 467 468 469
P14D-B/G/L/Z-TM-EN-1
425
Chapter 10 - SCADA Communications
2
P14D
COMMUNICATION INTERFACES
The MiCOM P40 Agile products have a number of standard and optional communication interfaces. The standard and optional hardware and protocols are summarised below: Port
Availability
Physical Layer
Use
Data Protocols
USB
Local settings Firmware
Courier
Rear serial port 1 Standard
RS485 / K-Bus
SCADA Remote settings IRIG-B
Courier, MODBUS, IEC 60870-5-103, DNP3.0
Rear serial port 2 Optional (order option)
RS485
SCADA Remote settings IRIG-B
Courier
Rear Ethernet port
Optional
Ethernet/copper
SCADA Remote settings
Courier, DNP3.0 over Ethernet, IEC 61850 (order option)
Rear Ethernet port
Optional
Ethernet/fibre
SCADA Remote settings
Courier or DNP3.0 over Ethernet (order option)
Front
Standard
Note: Optional communication boards are always fitted into slot C and only slot C. It is only possible to fit one optional communications board, therefore Serial and Ethernet communications are mutually exclusive.
426
P14D-B/G/L/Z-TM-EN-1
P14D
3
Chapter 10 - SCADA Communications
SERIAL COMMUNICATION
The physical layer standards that are used for serial communications for SCADA purposes are: ● Universal Serial Bus (USB) ● EIA(RS)485 (often abbreviated to RS485) ● K-Bus (a proprietary customization of RS485) USB is a relatively new standard, which replaces EIA(RS232) for local communication with the IED (for transferring settings and ing firmware updates) RS485 is similar to RS232 but for longer distances and it allows daisy-chaining and multi-dropping of IEDs. K-Bus is a proprietary protocol quite similar to RS485, but it cannot be mixed on the same link as RS485. Unlike RS485, K-Bus signals applied across two terminals are not polarised. It is important to note that these are not data protocols. They only describe the physical characteristics required for two devices to communicate with each other. For a description of the K-Bus standard see K-Bus (on page 428) and Alstom Grid's K-Bus interface guide reference R6509. A full description of the RS485 is available in the published standard.
3.1
UNIVERSAL SERIAL BUS
The USB port is used for connecting computers locally for the purposes of transferring settings, measurements and records to/from the computer to the IED and to firmware updates from a local computer to the IED.
3.2
EIA(RS)485 BUS
The RS485 two-wire connection provides a half-duplex, fully isolated serial connection to the IED. The connection is polarized but there is no agreed definition of which terminal is which. If the master is unable to communicate with the product, and the communication parameters match, then it is possible that the twowire connection is reversed. The RS485 bus must be terminated at each end with 120 Ω 0.5 W terminating resistors between the signal wires. The RS485 standard requires that each device be directly connected to the actual bus. Stubs and tees are forbidden. Loop bus and Star topologies are not part of the RS485 standard and are also forbidden. Two-core screened twisted pair cable should be used. The final cable specification is dependent on the application, although a multi-strand 0.5 mm2 per core is normally adequate. The total cable length must not exceed 1000 m. It is important to avoid circulating currents, which can cause noise and interference, especially when the cable runs between buildings. For this reason, the screen should be continuous and connected to ground at one end only, normally at the master connection point. The RS485 signal is a differential signal and there is no signal ground connection. If a signal ground connection is present in the bus cable then it must be ignored. At no stage should this be connected to the cable's screen or to the product’s chassis. This is for both safety and noise reasons. It may be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal level has an indeterminate state because the bus is not being actively driven. This can occur when all the slaves are in receive mode and the master is slow to turn from receive mode to transmit mode. This may be because the master is waiting in receive mode, in a high impedance state, until it has something to transmit. Jabber causes the receiving device(s) to miss the first bits of the first character in the packet, which results in the slave rejecting the message and consequently not responding. Symptoms of this are; poor response times
P14D-B/G/L/Z-TM-EN-1
427
Chapter 10 - SCADA Communications
P14D
(due to retries), increasing message error counts, erratic communications, and in the worst case, complete failure to communicate.
3.2.1
EIA(RS)485 BIASING REQUIREMENTS
Biasing requires that the signal lines be weakly pulled to a defined voltage level of about 1 V. There should only be one bias point on the bus, which is best situated at the master connection point. The DC source used for the bias must be clean to prevent noise being injected. Note: Some devices may be able to provide the bus bias, in which case external components would not be required.
6 – 9 V DC
180 Ω bias
120 Ω
Master
180 Ω bias 0V
120 Ω
Slave
Slave
Slave
V01000
Figure 127: RS485 biasing circuit Warning: It is extremely important that the 120 Ω termination resistors are fitted. Otherwise the bias voltage may be excessive and may damage the devices connected to the bus. As the field voltage is much higher than that required, Alstom Grid cannot assume responsibility for any damage that may occur to a device connected to the network as a result of incorrect application of this voltage. Ensure the field voltage is not used for other purposes, such as powering logic inputs, because noise may be ed to the communication network.
3.3
K-BUS
K-Bus is a robust signalling method based on RS485 voltage levels. K-Bus incorporates message framing, based on a 64 kbps synchronous HDLC protocol with FM0 modulation to increase speed and security. The rear interface is used to provide a permanent connection for K-Bus, which allows multi-drop connection. A K-Bus spur consists of up to 32 IEDs connected together in a multi-drop arrangement using twisted pair wiring. The K-Bus twisted pair connection is non-polarised. Two-core screened twisted pair cable should be used. The final cable specification is dependent on the application, although a multi-strand 0.5 mm2 per core is normally adequate. The total cable length must not exceed 1000 m. It is important to avoid circulating currents, which can cause noise and interference, especially when the cable runs between buildings. For this reason, the screen should be continuous and connected to ground at one end only, normally at the master connection point.
428
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
The K-Bus signal is a differential signal and there is no signal ground connection. If a signal ground connection is present in the bus cable then it must be ignored. At no stage should this be connected to the cable's screen or to the product’s chassis. This is for both safety and noise reasons. It is not possible to use a standard EIA(RS)232 to EIA(RS)485 converter to convert IEC 60870-5 FT1.2 frames to K-Bus. A protocol converter, namely the KITZ101, KITZ102 or KITZ201, must be used for this purpose. Please consult Alstom Grid for information regarding the specification and supply of KITZ devices. The following figure demonstrates a typical K-Bus connection.
IED
IED
IED
RS232
Computer
RS232-USB converter
K-Bus
KITZ protocol converter
V01001
Figure 128: Remote communication using K-Bus Note: An RS232-USB converter is only needed if the local computer does not provide an RS232 port.
Further information about K-Bus is available in the publication R6509: K-Bus Interface Guide, which is available on request.
P14D-B/G/L/Z-TM-EN-1
429
Chapter 10 - SCADA Communications
4
P14D
STANDARD ETHERNET COMMUNICATION
The Ethernet interface is required for either IEC 61850 or DNP3 over Ethernet (protocol must be selected at time of order). With either of these protocols, the Ethernet interface also offers communication with MiCOM S1 Studio for remote configuration and record extraction. Fibre optic connection is recommended for use in permanent connections in a substation environment, as it offers advantages in of noise rejection. The fibre optic port provides 100 Mbps communication and uses type LC connectors. The device can also be connected to either a 10Base-T or a 100Base-TX Ethernet hub or switch using the RJ45 port. The port automatically senses which type of hub is connected. Due to noise and interference reasons, this connection type is only recommended for short-term connections over a short distance. The pins on the RJ45connector are as follows: Pin
Signal name
Signal definition
1
TXP
Transmit (positive)
2
TXN
Transmit (negative)
3
RXP
Receive (positive)
4
-
Not used
5
-
Not used
6
RXN
Receive (negative)
7
-
Not used
8
-
Not used
430
P14D-B/G/L/Z-TM-EN-1
P14D
5
Chapter 10 - SCADA Communications
OVERVIEW OF DATA PROTOCOLS
The products s a wide range of protocols to make them applicable to many industries and applications. The exact data protocols ed by a particular product depend on its chosen application, but the following table gives a list of the data protocols that are typically available. SCADA data protocols Data Protocol
Layer 1 protocol
Description
Courier
K-Bus, RS485, Ethernet, USB
Standard for SCADA communications developed by Alstom Grid.
MODBUS
RS485
Standard for SCADA communications developed by Modicon.
IEC 60870-5-103
RS485
IEC standard for SCADA communications
DNP 3.0
RS485, Ethernet
Standard for SCADA communications developed by Harris. Used mainly in North America.
IEC 61850
Ethernet
IEC standard for substation automation. Facilitates interoperability.
The relationship of these protocols to the lower level physical layer protocols are as follows: IEC 60870-5-103 Data Protocols
Data Link Layer
MODBUS
IEC61850
DNP3.0
DNP3.0
Courier
Courier
Courier
Courier
EIA(RS)485
Ethernet
USB
K-Bus
Physical Layer
P14D-B/G/L/Z-TM-EN-1
Copper or Optical Fibre
431
Chapter 10 - SCADA Communications
6
P14D
COURIER
This section should provide sufficient detail to enable understanding of the Courier protocol at a level required by most s. For situations where the level of information contained in this manual is insufficient, further publications (R6511 and R6512) containing in-depth details about the protocol and its use, are available on request. Courier is an Alstom Grid proprietary communication protocol. Courier uses a standard set of commands to access a database of settings and data in the IED. This allows a master to communicate with a number of slave devices. The application-specific elements are contained in the database rather than in the commands used to interrogate it, meaning that the master station does not need to be preconfigured. Courier also provides a sequence of event (SOE) and disturbance record extraction mechanism.
6.1
PHYSICAL CONNECTION AND LINK LAYER
In the P40 Agile products, Courier can be used with three physical layer protocols: K-Bus, EIA(RS)485 and USB. Three connection options are available for Courier: ● The front USB port - for connection to Settings application software on, for example, a laptop ● Rear serial port 1 - for permanent SCADA connection via RS485 or K-Bus ● The optional rear serial port 2 - for permanent SCADA connection via RS485 or K-Bus The IED address and baud rate can be selected using the front menu or by a suitable application such as MiCOM S1 Agile.
6.2
COURIER DATABASE
The Courier database is two-dimensional and resembles a table. Each cell in the database is referenced by a row and column address. Both the column and the row can take a range from 0 to 255 (0000 to FFFF Hexadecimal. Addresses in the database are specified as hexadecimal values, for example, 0A02 is column 0A row 02. Associated settings or data are part of the same column. Row zero of the column has a text string to identify the contents of the column and to act as a column heading. The product-specific menu databases contain the complete database definition. This information is also presented in the Settings chapter.
6.3
SETTINGS CATEGORIES
There are two main categories of settings in protection IEDs: ● Control and settings ● Protection settings With the exception of the Disturbance Recorder settings, changes made to the control and settings are implemented immediately and stored in non-volatile memory. Changes made to the Protection settings and the Disturbance Recorder settings are stored in ‘scratchpad’ memory and are not immediately implemented. These need to be committed by writing to the Save Changes cell in the CONFIGURATION column.
6.4
SETTING CHANGES
Courier provides two mechanisms for making setting changes. Either method can be used for editing any of the settings in the database.
432
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
Method 1 This uses a combination of three commands to perform a settings change: First, enter Setting mode: This checks that the cell is settable and returns the limits. 1. 2. 3.
Preload Setting: This places a new value into the cell. This value is echoed to ensure that setting corruption has not taken place. The validity of the setting is not checked by this action. Execute Setting: This confirms the setting change. If the change is valid, a positive response is returned. If the setting change fails, an error response is returned. Abort Setting: This command can be used to abandon the setting change.
This is the most secure method. It is ideally suited to on-line editors because the setting limits are extracted before the setting change is made. However, this method can be slow if many settings are being changed because three commands are required for each change. Method 2 The Set Value command can be used to change a setting directly. The response to this command is either a positive confirm or an error code to indicate the nature of a failure. This command can be used to implement a setting more rapidly than the previous method, however the limits are not extracted. This method is therefore most suitable for off-line setting editors such as MiCOM S1 Agile, or for issuing preconfigured control commands.
6.5
SETTINGS TRANSFER
To transfer the settings to or from the IED, use the settings application software.
6.6
EVENT EXTRACTION
You can extract events either automatically (rear serial port only) or manually (either serial port). For automatic extraction, all events are extracted in sequential order using the standard Courier event mechanism. This includes fault and maintenance data if appropriate. The manual approach allows you to select events, faults, or maintenance data as desired.
6.6.1
AUTOMATIC EVENT RECORD EXTRACTION
This method is intended for continuous extraction of event and fault information as it is produced. It is only ed through the rear Courier port. When new event information is created, the Event bit is set in the Status byte. This indicates to the Master device that event information is available. The oldest, non-extracted event can be extracted from the IED using the Send Event command. The IED responds with the event data. Once an event has been extracted, the Accept Event command can be used to confirm that the event has been successfully extracted. When all events have been extracted, the Event bit is reset. If there are more events still to be extracted, the next event can be accessed using the Send Event command as before.
6.6.2
MANUAL EVENT RECORD EXTRACTION
The VIEW RECORDS column (location 01) is used for manual viewing of event, fault, and maintenance records. The contents of this column depend on the nature of the record selected. You can select events by event number and directly select a fault or maintenance record by number. Event Record Selection ('Select Event' cell: 0101) This cell can be set the number of stored events. For simple event records (Type 0), cells 0102 to 0105 contain the event details. A single cell is used to represent each of the event fields. If the event selected is a fault or maintenance record (Type 3), the remainder of the column contains the additional information.
P14D-B/G/L/Z-TM-EN-1
433
Chapter 10 - SCADA Communications
P14D
Fault Record Selection ('Select Fault' cell: 0105) This cell can be used to select a fault record directly, using a value between 0 and 4 to select one of up to five stored fault records. (0 is the most recent fault and 4 is the oldest). The column then contains the details of the fault record selected. Maintenance Record Selection ('Select Maint' cell: 01F0) This cell can be used to select a maintenance record using a value between 0 and 4. This cell operates in a similar way to the fault record selection. If this column is used to extract event information, the number associated with a particular record changes when a new event or fault occurs. Event Types The IED generates events under certain circumstances such as: ● ● ● ● ● ●
Change of state of output Change of state of opto-input Protection element operation Alarm condition Setting change entered/timed-out
Event Record Format The IED returns the following fields when the Send Event command is invoked: ● ● ● ●
Cell reference Time stamp Cell text Cell value
The Menu Database contains tables of possible events, and shows how the contents of the above fields are interpreted. Fault and Maintenance records return a Courier Type 3 event, which contains the above fields plus two additional fields: ● Event extraction column ● Event number These events contain additional information, which is extracted from the IED using the RECORDER EXTRACTION column B4. Row 01 of the RECORDER EXTRACTION column contains a Select Record setting that allows the fault or maintenance record to be selected. This setting should be set to the event number value returned in the record. The extended data can be extracted from the IED by ing the text and data from the column.
6.7
DISTURBANCE RECORD EXTRACTION
The stored disturbance records are accessible through the Courier interface. The records are extracted using the RECORDER EXTRACTION column (B4). The Select Record cell can be used to select the record to be extracted. Record 0 is the oldest nonextracted record. Older records which have been already been extracted are assigned positive values, while younger records are assigned negative values. To help automatic extraction through the rear port, the IED sets the Disturbance bit of the Status byte, whenever there are non-extracted disturbance records. Once a record has been selected, using the above cell, the time and date of the record can be read from the Trigger Time cell (B402). The disturbance record can be extracted using the block transfer mechanism from
434
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
cell B40B and saved in the COMTRADE format. The settings application software software automatically does this.
6.8
PROGRAMMABLE SCHEME LOGIC SETTINGS
The programmable scheme logic (PSL) settings can be ed from and ed to the IED using the block transfer mechanism. The following cells are used to perform the extraction: ● Domain cell (B204): Used to select either PSL settings ( or ) or PSL configuration data ( only) ● Sub-Domain cell (B208): Used to select the Protection Setting Group to be ed or ed. ● Version cell (B20C): Used on a to check the compatibility of the file to be ed. ● Transfer Mode cell (B21C): Used to set up the transfer process. ● Data Transfer cell (B120): Used to perform or . The PSL settings can be ed and ed to and from the IED using this mechanism. The settings application software MiCOM S1 Agile must be used to edit the settings. It also performs checks on the validity of the settings before they are transferred to the IED.
6.9
TIME SYNCHRONISATION
The time and date can be set using the time synchronization feature of the Courier protocol. The device will correct for the transmission delay. The time synchronization message may be sent as either a global command or to any individual IED address. If the time synchronization message is sent to an individual address, then the device will respond with a confirm message. If sent as a global command, the (same) command must be sent twice. A time synchronization Courier event will be generated/produced whether the time-synchronization message is sent as a global command or to any individual IED address. If the clock is being synchronized using the IRIG-B input then it will not be possible to set the device time using the Courier interface. An attempt to set the time using the interface will cause the device to create an event with the current date and time taken from the IRIG-B synchronized internal clock.
6.10
CONFIGURATION
To configure the IED for this protocol, please see the Configuration (on page 45) chapter.
P14D-B/G/L/Z-TM-EN-1
435
Chapter 10 - SCADA Communications
7
P14D
IEC 60870-5-103
The specification IEC 60870-5-103 (Telecontrol Equipment and Systems Part 5 Section 103: Transmission Protocols), defines the use of standards IEC 60870-5-1 to IEC 60870-5-5, which were designed for communication with protection equipment This section describes how the IEC 60870-5-103 standard is applied to the Px40 platform. It is not a description of the standard itself. The level at which this section is written assumes that the reader is already familiar with the IEC 60870-5-103 standard. This section should provide sufficient detail to enable understanding of the standard at a level required by most s. The IEC 60870-5-103 interface is a master/slave interface with the device as the slave device. The device conforms to compatibility level 2, as defined in the IEC 60870-5-103.standard. The following IEC 60870-5-103 facilities are ed by this interface: ● ● ● ● ● ● ● ●
7.1
Initialization (reset) Time synchronization Event record extraction General interrogation Cyclic measurements General commands Disturbance record extraction Private codes
PHYSICAL CONNECTION AND LINK LAYER
There is just one option for IEC 60870-5-103: ● Rear serial port 1- for permanent SCADA connection via RS485 The IED address and baud rate can be selected using the front menu or by a suitable application such as MiCOM S1 Agile.
7.2
INITIALISATION
Whenever the device has been powered up, or if the communication parameters have been changed a reset command is required to initialize the communications. The device will respond to either of the two reset commands; Reset CU or Reset FCB (Communication Unit or Frame Count Bit). The difference between the two commands is that the Reset CU command will clear any unsent messages in the transmit buffer, whereas the Reset FCB command does not delete any messages. The device will respond to the reset command with an identification message ASDU 5. The Cause of Transmission (COT) of this response will be either Reset CU or Reset FCB depending on the nature of the reset command. The content of ASDU 5 is described in the IEC 60870-5-103 section of the Menu Database, available from Alstom Grid separately if required. In addition to the above identification message, it will also produce a power up event.
7.3
TIME SYNCHRONISATION
The time and date can be set using the time synchronization feature of the IEC 60870-5-103 protocol. The device will correct for the transmission delay as specified in IEC 60870-5-103. If the time synchronization message is sent as a send/confirm message then the device will respond with a confirm message. A time synchronization Class 1 event will be generated/produced whether the time-synchronization message is sent as a send confirm or a broadcast (send/no reply) message.
436
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
If the clock is being synchronized using the IRIG-B input then it will not be possible to set the device time using the IEC 60870-5-103 interface. An attempt to set the time via the interface will cause the device to create an event with the current date and time taken from the IRIG-B synchronized internal clock.
7.4
SPONTANEOUS EVENTS
Events are categorized using the following information: ● Function type ● Information Number The IEC 60870-5-103 profile in the Menu Database contains a complete listing of all events produced by the device.
7.5
GENERAL INTERROGATION (GI)
The GI request can be used to read the status of the device, the function numbers, and information numbers that will be returned during the GI cycle. These are shown in the IEC 60870-5-103 profile in the Menu Database.
7.6
CYCLIC MEASUREMENTS
The device will produce measured values using ASDU 9 on a cyclical basis, this can be read from the device using a Class 2 poll (note ADSU 3 is not used). The rate at which the device produces new measured values can be controlled using the measurement period setting. This setting can be edited from the front menu or using MiCOM S1 Agile. It is active immediately following a change. The device transmits its measurands at 2.4 times the rated value of the analogue value.
7.7
COMMANDS
A list of the ed commands is contained in the Menu Database. The device will respond to other commands with an ASDU 1, with a cause of transmission (COT) indicating ‘negative acknowledgement’.
7.8
TEST MODE
It is possible to disable the device output s to allow secondary injection testing to be performed using either the front menu or the front serial port. The IEC 60870-5-103 standard interprets this as ‘test mode’. An event will be produced to indicate both entry to and exit from test mode. Spontaneous events and cyclic measured data transmitted whilst the device is in test mode will have a COT of ‘test mode’.
7.9
DISTURBANCE RECORDS
The disturbance records are stored in uncompressed format and can be extracted using the standard mechanisms described in IEC 60870-5-103. Note: IEC 60870-5-103 only s up to 8 records.
P14D-B/G/L/Z-TM-EN-1
437
Chapter 10 - SCADA Communications
7.10
P14D
COMMAND/MONITOR BLOCKING
The device s a facility to block messages in the monitor direction (data from the device) and also in the command direction (data to the device). Messages can be blocked in the monitor and command directions using one of the two following methods ● The menu command RP1 CS103Blocking in the COMMUNICATIONS column ● The DDB signals Monitor Blocked and Command Blocked
7.11
CONFIGURATION
To configure the IED for this protocol, please see the Configuration (on page 45) chapter.
438
P14D-B/G/L/Z-TM-EN-1
P14D
8
Chapter 10 - SCADA Communications
DNP 3.0
This section describes how the DNP 3.0 standard is applied to the Px40 platform. It is not a description of the standard itself. The level at which this section is written assumes that the reader is already familiar with the DNP 3.0 standard. The descriptions given here are intended to accompany the device profile document that is included in the Menu Database document. The DNP 3.0 protocol is not described here, please refer to the documentation available from the group. The device profile document specifies the full details of the DNP 3.0 implementation. This is the standard format DNP 3.0 document that specifies which objects; variations and qualifiers are ed. The device profile document also specifies what data is available from the device using DNP 3.0. The IED operates as a DNP 3.0 slave and s subset level 2, as described in the DNP 3.0 standard, plus some of the features from level 3. The DNP 3.0 protocol is defined and istered by the DNP s Group. For further information on DNP 3.0 and the protocol specifications, please see the DNP website (www.dnp.org).
8.1
PHYSICAL CONNECTION AND LINK LAYER
DNP 3.0 can be used with two physical layer protocols: EIA(RS)485, or Ethernet. Several connection options are available for DNP 3.0 ● Rear serial port 1 - for permanent SCADA connection via RS485 ● The rear Ethernet RJ45 port on the optional Ethernet board - for permanent SCADA Ethernet connection ● The rear Ethernet fibre port on the optional Ethernet board - for permanent SCADA Ethernet connection The IED address and baud rate can be selected using the front menu or by a suitable application such as MiCOM Agile. When using a serial interface, the data format is: 1 start bit, 8 data bits, 1 stop bit and optional configurable parity bit.
8.2
OBJECT 1 BINARY INPUTS
Object 1, binary inputs, contains information describing the state of signals in the IED, which mostly form part of the digital data bus (DDB). In general these include the state of the output s and opto-inputs, alarm signals, and protection start and trip signals. The ‘DDB number’ column in the device profile document provides the DDB numbers for the DNP 3.0 point data. These can be used to cross-reference to the DDB definition list. See the relevant Menu Database document. The binary input points can also be read as change events using Object 2 and Object 60 for class 1-3 event data.
8.3
OBJECT 10 BINARY OUTPUTS
Object 10, binary outputs, contains commands that can be operated using DNP 3.0. Therefore the points accept commands of type pulse on (null, trip, close) and latch on/off as detailed in the device profile in the relevant Menu Database document, and execute the command once for either command. The other fields are ignored (queue, clear, trip/close, in time and off time). There is an additional image of the Control Inputs. Described as Alias Control Inputs, they reflect the state of the Control Input, but with a dynamic nature. ● If the Control Input DDB signal is already SET and a new DNP SET command is sent to the Control Input, the Control Input DDB signal goes momentarily to RESET and then back to SET. ● If the Control Input DDB signal is already RESET and a new DNP RESET command is sent to the Control Input, the Control Input DDB signal goes momentarily to SET and then back to RESET.
P14D-B/G/L/Z-TM-EN-1
439
Chapter 10 - SCADA Communications
DNP Latch ON
P14D
DNP Latch ON
DNP Latch OFF
DNP Latch OFF
Control Input (Latched) Aliased Control Input (Latched) Control Input (Pulsed) Aliased Control Input (Pulsed)
The pulse width is equal to the duration of one protection iteration
V01002
Figure 129: Control input behaviour Many of the IED’s functions are configurable so some of the Object 10 commands described in the following sections may not be available. A read from Object 10 reports the point as off-line and an operate command to Object 12 generates an error response. Examples of Object 10 points that maybe reported as off-line are: ● ● ● ● ● ●
8.4
Activate setting groups: Ensure setting groups are enabled CB trip/close: Ensure remote CB control is enabled Reset NPS thermal: Ensure NPS thermal protection is enabled Reset thermal O/L: Ensure thermal overload protection is enabled Reset RTD flags: Ensure RTD Inputs is enabled Control inputs: Ensure control inputs are enabled
OBJECT 20 BINARY COUNTERS
Object 20, binary counters, contains cumulative counters and measurements. The binary counters can be read as their present ‘running’ value from Object 20, or as a ‘frozen’ value from Object 21. The running counters of object 20 accept the read, freeze and clear functions. The freeze function takes the current value of the object 20 running counter and stores it in the corresponding Object 21 frozen counter. The freeze and clear function resets the Object 20 running counter to zero after freezing its value. Binary counter and frozen counter change event values are available for reporting from Object 22 and Object 23 respectively. Counter change events (Object 22) only report the most recent change, so the maximum number of events ed is the same as the total number of counters. Frozen counter change events (Object 23) are generated whenever a freeze operation is performed and a change has occurred since the previous freeze command. The frozen counter event queues store the points for up to two freeze operations.
8.5
OBJECT 30 ANALOGUE INPUT
Object 30, analogue inputs, contains information from the IED’s measurements columns in the menu. All object 30 points can be reported as 16 or 32-bit integer values with flag, 16 or 32-bit integer values without flag, as well as short floating point values.
440
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
Analogue values can be reported to the master station as primary, secondary or normalized values (which takes into the IED’s CT and VT ratios), and this is settable in the COMMUNICATIONS column in the IED. Corresponding deadband settings can be displayed in of a primary, secondary or normalized value. Deadband point values can be reported and written using Object 34 variations. The deadband is the setting used to determine whether a change event should be generated for each point. The change events can be read using Object 32 or Object 60. These events are generated for any point which has a value changed by more than the deadband setting since the last time the data value was reported. Any analogue measurement that is unavailable when it is read is reported as offline. For example, the frequency would be offline if the current and voltage frequency is outside the tracking range of the IED. All Object 30 points are reported as secondary values in DNP 3.0 (with respect to CT and VT ratios).
8.6
OBJECT 40 ANALOGUE OUTPUT
The conversion to fixed-point format requires the use of a scaling factor, which is configurable for the various types of data within the IED such as current, voltage, and phase angle. All Object 40 points report the integer scaling values and Object 41 is available to configure integer scaling quantities.
8.7
OBJECT 50 TIME SYNCHRONISATION
Function codes 1 (read) and 2 (write) are ed for Object 50 (time and date) variation 1. The DNP Need Time function (the duration of time waited before requesting another time sync from the master) is ed, and is configurable in the range 1 - 30 minutes. If the clock is being synchronized using the IRIG-B input then it will not be possible to set the device time using the Courier interface. An attempt to set the time using the interface will cause the device to create an event with the current date and time taken from the IRIG-B synchronized internal clock.
8.8
CONFIGURATION
To configure the IED for this protocol, please see the Configuration (on page 45) chapter.
P14D-B/G/L/Z-TM-EN-1
441
Chapter 10 - SCADA Communications
9
P14D
MODBUS
This section describes how the MODBUS standard is applied to the Px40 platform. It is not a description of the standard itself. The level at which this section is written assumes that the reader is already familiar with the MODBUS standard. The MODBUS protocol is a master/slave protocol, defined and istered by the MODBUS Organization For further information on MODBUS and the protocol specifications, please seethe Modbus web site (www.modbus.org).
9.1
PHYSICAL CONNECTION AND LINK LAYER
Only one option is available for connecting MODBUS ● Rear serial port 1 - for permanent SCADA connection via EIA(RS)485 The MODBUS interface uses ‘RTU’ mode communication rather than ‘ASCII’ mode as this provides more efficient use of the communication bandwidth. This mode of communication is defined by the MODBUS standard. The IED address and baud rate can be selected using the front menu or by a suitable application such as MiCOM Agile. When using a serial interface, the data format is: 1 start bit, 8 data bits, 1 parity bit with 1 stop bit, or 2 stop bits (a total of 11 bits per character).
MODBUS FUNCTIONS
9.2
The following MODBUS function codes are ed: ● ● ● ● ● ● ● ● ●
01: Read Coil Status 02: Read Input Status 03: Read Holding s 04: Read Input s 06: Preset Single 08: Diagnostics 11: Fetch Communication Event Counter 12: Fetch Communication Event Log 16: Preset Multiple s 127 max
These are interpreted by the MiCOM IED in the following way: ● ● ● ● ● ●
01: Read status of output s (0xxxx addresses) 02: Read status of opto inputs (1xxxx addresses) 03: Read setting values (4xxxx addresses) 04: Read measured values (3xxxx addresses 06: Write single setting value (4xxxx addresses) 16: Write multiple setting values (4xxxx addresses)
9.3 MCode 01
442
RESPONSE CODES MODBUS Description Illegal Function Code
MiCOM Interpretation The function code transmitted is not ed by the slave.
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
MCode
MODBUS Description
MiCOM Interpretation
02
Illegal Data Address
The start data address in the request is not an allowable value. If any of the addresses in the range cannot be accessed due to protection then all changes within the request are discarded and this error response will be returned. Note: If the start address is correct but the range includes non–implemented addresses this response is not produced.
03
Illegal Value
A value referenced in the data field transmitted by the master is not within range. Other values transmitted within the same packet will be executed if inside range.
06
Slave Device Busy
The write command cannot be implemented due to the database being locked by another interface. This response is also produced if the software is busy executing a previous request.
9.4
MAPPING
The device s the following memory page references: ● ● ● ●
Memory Page: Interpretation 0xxxx: Read and write access of the output relays 1xxxx: Read only access of the opto inputs 3xxxx: Read only access of data
● 4xxxx: Read and write access of settings where xxxx represents the addresses available in the page (0 to 9999). A complete map of the MODBUS addresses ed by the device is contained in the relevant menu database, which is available on request. Note: The "extended memory file" (6xxxx) is not ed.
Note: MODBUS convention is to document addresses as ordinal values whereas the actual protocol addresses are literal values. The MiCOM relays begin their addresses at zero. Therefore, the first in a memory page is address zero. The second is address 1 and so on.
Note: The page number notation is not part of the address.
9.5
EVENT EXTRACTION
The device s two methods of event extraction providing either automatic or manual extraction of the stored event, fault, and maintenance records.
9.5.1
AUTOMATIC EVENT RECORD EXTRACTION
The automatic extraction facilities allow all types of record to be extracted as they occur. Event records are extracted in sequential order including any fault or maintenance data that may be associated with the event. The MODBUS master can determine whether the device has any events stored that have not yet been extracted. This is performed by reading the status 30001 (G26 data type). If the event bit of this is set then the device has non-extracted events available. To select the next event for sequential extraction, the master station writes a value of 1 to the record selection 40400 (G18 data type). The event data together with any fault/maintenance data can be read from the s specified below. Once
P14D-B/G/L/Z-TM-EN-1
443
Chapter 10 - SCADA Communications
P14D
the data has been read, the event record can be marked as having been read by writing a value of '2' to 40400.
9.5.2
MANUAL EVENT RECORD EXTRACTION
There are three s available to manually select stored records and three read-only s allowing the number of stored records to be determined. ● 40100: Select Event ● 40101: Select Fault ● 40102: Select Maintenance Record For each of the above s a value of 0 represents the most recent stored record. The following s can be read to indicate the numbers of the various types of record stored. ● 30100: Number of stored records ● 30101: Number of stored fault records ● 30102: Number of stored maintenance records Each fault or maintenance record logged causes an event record to be created. If this event record is selected, the additional s allowing the fault or maintenance record details will also become populated.
9.5.3
RECORD DATA
The location and format of the s used to access the record data is the same whether they have been selected using either automatic or manual extraction. Event Description
MODBUS Address
Length
Comments
Time and Date
30103
4
See G12 data type description
Event Type
30107
1
See G13 data type description
Event Value
30108
2
Nature of value depends on event type. This will contain the status as a binary flag for , opto-input, alarm, and protection events.
MODBUS Address
30110
1
This indicates the MODBUS address where the change occurred. Alarm 30011 Relays 30723 Optos 30725 Protection events – like the relay and opto addresses this will map onto the MODBUS address of the appropriate DDB status depending on which bit of the DDB the change occurred. These will range from 30727 to 30785. For platform events, fault events and maintenance events the default is 0.
Event Index
30111
1
This will contain the DDB ordinal for protection events or the bit number for alarm events. The direction of the change will be indicated by the most significant bit; 1 for 0 – 1 change and 0 for 1 – 0 change.
1
0 means that there is no additional data. 1 means fault record data can be read from 30113 to 30199 (number of s depends on the product). 2 means maintenance record data can be read from 30036 to 30039.
Additional Data Present
30112
If a fault record or maintenance record is directly selected using the manual mechanism then the data can be read from the ranges specified above. The event record data in s 30103 to 30111 will not be available. It is possible using 40401(G6 data type) to independently clear the stored relay event/fault and maintenance records. This also provides an option to reset the device indications, which has the same effect on the relay as pressing the clear key within the alarm viewer using the HMI menu.
444
P14D-B/G/L/Z-TM-EN-1
P14D
9.6
Chapter 10 - SCADA Communications
DISTURBANCE RECORD EXTRACTION
The IED provides facilities for both manual and automatic extraction of disturbance records. Records extracted over MODBUS from Px40 devices are presented in COMTRADE format. This involves extracting an ASCII text configuration file and then extracting a binary data file. Each file is extracted by reading a series of data pages from the IED The data page is made up of 127 s, giving a maximum transfer of 254 bytes per page. The following set of s is presented to the master station to the extraction of uncompressed disturbance records: MODBUS s MODBUS
Name
Description
3x00001
Status
Provides the status of the relay as bit flags: b0: Out of service b1: Minor self test failure b2: Event b3: Time synchronization b4: Disturbance b5: Fault b6: Trip b7: Alarm b8 to b15: Unused A ‘1’ on b4 indicates the presence of a disturbance
3x00800
No of stored disturbances
Indicates the total number of disturbance records currently stored in the relay, both extracted and non-extracted.
3x00801
Unique identifier of the oldest disturbance record
Indicates the unique identifier value for the oldest disturbance record stored in the relay. This is an integer value used in conjunction with the ‘Number of stored disturbances’ value to calculate a value for manually selecting records.
Manual disturbance record selection
This is used to manually select disturbance records. The values written to this cell are an offset of the unique identifier value for the oldest record. The offset value, which ranges from 0 to the Number of stored disturbances - 1, is added to the identifier of the oldest record to generate the identifier of the required record.
4x00400
Record selection command
This is used during the extraction process and has a number of commands. These are: b0: Select next event b1: Accept event b2: Select next disturbance record b3: Accept disturbance record b4: Select next page of disturbance data b5: Select data file
3x00930 - 3x00933
Record time stamp
These s return the timestamp of the disturbance record.
3x00802
No of s in data page
This informs the master station of the number of s in the data page that are populated.
3x00803 - 3x00929
Data page s
These 127 s are used to transfer data from the relay to the master station. They are 16-bit unsigned integers.
3x00934
The disturbance record status is used during the extraction process Disturbance record status to indicate to the master station when data is ready for extraction. See next table.
4x00251
Data file format selection
4x00250
P14D-B/G/L/Z-TM-EN-1
This is used to select the required data file format. This is reserved for future use.
445
Chapter 10 - SCADA Communications
P14D
Note: addresses are provided in reference code + address format. E.g. 4x00001 is reference code 4x, address 1 (which is specified as function code 03, address 0x0000 in the MODBUS specification).
The disturbance record status will report one of the following values: Disturbance record states State
Description
Idle
This will be the state reported when no record is selected; such as after power on or after a record has been marked as extracted.
Busy
The relay is currently processing data.
Page ready
The data page has been populated and the master station can now safely read the data.
Configuration complete
All of the configuration data has been read without error.
Record complete
All of the disturbance data has been extracted.
Disturbance overwritten
An error occurred during the extraction process where the disturbance being extracted was overwritten by a new record.
No non-extracted disturbances
An attempt was made by the master station to automatically select the next oldest non-extracted disturbance when all records have been extracted.
Not a valid disturbance
An attempt was made by the master station to manually select a record that did not exist in the relay.
Command out of sequence
The master station issued a command to the relay that was not expected during the extraction process.
9.6.1
MANUAL EXTRACTION PROCEDURE
The procedure used to extract a disturbance manually is shown below. The manual method of extraction does not allow for the acceptance of disturbance records.
446
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
Start
Get number of disturbances from 3x00800
No
Are there disturbances?
Yes
Get oldest disturbance ID from 3x00801
Select required disturbance by writing the ID value of the required record to 4x00250
Extract disturbance data
Get disturbance time stamp from s 3x00930 – 3x00933
End V01003
Figure 130: Manual selection of a disturbance record
9.6.2
AUTOMATIC EXTRACTION PROCEDURE
There are two methods that can be used for automatically extracting disturbances: Method 1 Method 1 is simpler and is better at extracting single disturbance records (when the disturbance recorder is polled regularly).
P14D-B/G/L/Z-TM-EN-1
447
Chapter 10 - SCADA Communications
P14D
Start
Read status word from 3x0001
Is disturbance bit (bit 4) set?
Error
No
Yes
Select next oldest nonextracted record by writing 0x04 to 4x00400
Extract disturbance data
Send command to accept record by writing 0x08 to 4x00400
V01004
Figure 131: Automatic selection of disturbance record - method 1 Method 2 Method 2 is more complex to implement but is more efficient at extracting large quantities of disturbance records. This may be useful when the disturbance recorder is polled only occasionally and therefore may have many stored records.
448
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
Start
FirstTime = True
Read status word from 3x0001
FirstTime = True Is disturbance bit (bit 4) set?
No
Yes
Select next oldest nonextracted record by writing 0x04 to 4x00400
Yes
Is FirstTime = True?
No
FirstTime = True
Error
Extract disturbance record
FirstTime = False
Send command to accept and select next record by writing 0x0C to 4x00400
V01005
Figure 132: Automatic selection of disturbance record - method 2
9.6.3
EXTRACTING THE DISTURBANCE DATA
The extraction of the disturbance record is a two-stage process that involves extracting the configuration file first and then the data file. first the configuration file must be extracted, followed by the data file:
P14D-B/G/L/Z-TM-EN-1
449
Chapter 10 - SCADA Communications
P14D
Extracting the Comtrade configuration file Start (Record selected) To parent procedure Read DR status value from 3x00934
Busy Check DR status for error conditions or Busy status
Configuration complete
What is the value of DR status?
Error
Other
Page ready Read number of s in data page from address 3x00802
Read data page s starting at 3x00803
Configuration complete (begin extracting data file)
Store data to ASCII file in the order the data were received
Send ‘Get next page of data’ to 4x00400
V01006
Figure 133: Configuration file extraction
450
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
Extracting the comtrade data file Start (Configuration complete)
Send ‘Select Data File’ to 4x00400
To parent procedure Read DR status value from 3x00934
Busy Check DR status for error conditions or Busy status
Record complete
Error
Other
What is the value of DR status?
Page ready
Read number of s in data page from address 3x00802
Read data page s starting at 3x00803
Record complete (mark record as extracted; automatic extraction only)
Store data to binary file in the order the data were received
Send ‘Get next page of data’ to 4x00400
V01007
Figure 134: Data file extraction During the extraction of the COMTRADE files, an error may occur, which will be reported on the DR Status 3x00934. In this case, you must take action to re-start the record extraction or to abort according to the table below. State
Value
Description
0
Idle
This will be the state reported when no record is selected; such as after power on or after a record has been marked as extracted.
1
Busy
The relay is currently processing data.
2
Page ready
The data page has been populated and the master station can now safely read the data.
3
Configuration complete All of the configuration data has been read without error.
4
Record complete
All of the disturbance data has been extracted.
5
Disturbance overwritten
An error occurred during the extraction process where the disturbance being extracted was overwritten by a new record.
P14D-B/G/L/Z-TM-EN-1
451
Chapter 10 - SCADA Communications
Value
P14D
State
Description
6
No unextracted disturbances
7
Not a valid disturbance An attempt was made by the master station to manually select a record that did not exist in the relay.
8
Command out of sequence
9.7
An attempt was made by the master station to automatically select the next oldest unextracted disturbance when all records have been extracted.
The master station issued a command to the relay that was not expected during the extraction process.
SETTING CHANGES
All the IED settings are 4xxxx page addresses. The following points should be noted when changing settings: ● Settings implemented using multiple s must be written to using a multi- write operation. ● The first address for a multi- write must be a valid address. If there are unmapped addresses within the range being written to, the data associated with these addresses will be discarded. ● If a write operation is performed with values that are out of range, the illegal data response will be produced. Valid setting values within the same write operation will be executed. ● If a write operation is performed, which attempts to change s requiring a higher level of access than is currently enabled then all setting changes in the write operation will be discarded.
9.8
PROTECTION
The following s are available to control protection: Function
MODBUS s
entry
4x00001 to 4x00002 and 4x20000 to 4x20003
Setting to change level 1 (4 character)
4x00023 to 4x00024
Setting to change level 1 (8 character)
4x20008 to 4x20011
Setting to change level 2
4x20016 to 4x20019
Setting to change level 3
4x20024 to 4x20027
Can be read to indicate current access level
3x00010
9.9
PROTECTION AND DISTURBANCE RECORDER SETTINGS
Setting changes to either of these areas are stored in a scratchpad area and will not be used by the IED unless confirmed. 40405 can be used either to confirm or abort the setting changes within the scratchpad area. The IED s four groups of protection settings. The MODBUS addresses for each of the four groups are repeated within the following address ranges. ● ● ● ●
Group 1: 4x1000 - 4x2999 Group 2: 4x3000 - 4x4999 Group 3: 4x5000 - 4x6999 Group 4: 4x7000 - 4x8999
In addition to the basic editing of the protection setting groups, the following functions are provided: ● Default values can be restored to a setting group or to all of the relay settings by writing to 4x0402. ● It is possible to copy the contents of one setting group to another by writing the source group to 40406 and the target group to 4x0407.
452
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
The setting changes performed by either of the two operations defined above are made to the scratchpad area. These changes must be confirmed by writing to 4x0405. The active protection setting groups can be selected by writing to 40404. An illegal data response will be returned if an attempt is made to set the active group to one that has been disabled.
9.10
TIME SYNCHRONISATION
The date-time data type G12 allows real date and time information to be conveyed to a resolution of 1 ms. The structure of the data type is compliant with the IEC 60870-5-4 Binary Time 2a format. The seven bytes of the date/time frame are packed into four 16-bit s and are transmitted in sequence starting from byte 1. This is followed by a null byte, making eight bytes in total. data is usually transmitted starting with the highest-order byte. Therefore byte 1 will be in the highorder byte position followed by byte 2 in the low-order position for the first . The last will contain just byte 7 in the high order position and the low order byte will have a value of zero. G12 date & time data type structure Bit Position Byte
7
6
5
4
3
2
1
0
1
m7
m6
m5
m4
m3
m2
m1
m0
2
m15
m14
m13
m12
m11
m10
m9
m8
3
IV
R
I5
I4
I3
I2
I1
I0
4
SU
R
R
H4
H3
H2
H1
H0
5
W2
W1
W0
D4
D3
D2
D1
D0
6
R
R
R
R
M3
M2
M1
M0
7
R
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Key to table: ● ● ● ● ● ● ● ● ●
m = milliseconds: 0 to 59,999 I = minutes: 0 to 59 H = hours: 0 to 23 W = day of the week: 1 to 7 starting from Monday D = day of the month: 1 to 31 M = month of the year: 1 to 12 starting from January Y = year of the century: 0 to 99 R = reserved: 0 SU = summertime: 0 = GMT, 1 = summertime
● IV = invalid: 0 = invalid value, 1 = valid value Since the range of the data type is only 100 years, the century must be deduced. The century is calculated as the one that will produce the nearest time value to the current date. For example: 30-12-99 is 30-12-1999 when received in 1999 & 2000, but is 30-12-2099 when received in 2050. This technique allows 2 digit years to be accurately converted to 4 digits in a ±50 year window around the current date. The invalid bit has two applications: ● It can indicate that the date-time information is considered inaccurate, but is the best information available. ● It can indicate that the date-time information is not available.
P14D-B/G/L/Z-TM-EN-1
453
Chapter 10 - SCADA Communications
P14D
The summertime bit is used to indicate that summertime (day light saving) is being used and, more importantly, to resolve the alias and time discontinuity which occurs when summertime starts and ends. This is important for the correct time correlation of time stamped records. The day of the week field is optional and if not calculated will be set to zero. The concept of time zone is not catered for by this data type and hence by the relay. It is up to the end to determine the time zone. Normal practice is to use UTC (universal co-ordinated time).
9.11
POWER AND ENERGY MEASUREMENT DATA FORMATS
The power and energy measurements are available in two data formats: Data Type G29: an integer format using 3 s Data Type G125: a 32 bit floating point format using 2 s The G29 s are listed in the first part of the MEASUREMENTS 2 column of the Courier database. The G125 equivalents appear at the end of the MEASUREMENTS 2 column. Data type G29 Data type G29 consists of three s: The first is the per unit (or normalised) power or energy measurement. It is a signed 16 bit quantity. This is of Data Type G28. The second and third s contain a multiplier to convert the per unit value to a real value. These are unsigned 32-bit quantities. These two s together are of Data Type G27. Thee overall power or energy value conveyed by the G29 data type is therefore G29 = G28 x G27. The IED calculates the G28 per unit power or energy value as: G28 = (measured secondary quantity/CT secondary)(110V/(VT secondary). Since data type G28 is a signed 16-bit integer, its dynamic range is constrained to +/- 32768. You should take this limitation into consideration for the energy measurements, as the G29 value will saturate a long time before the equivalent G125 does. The associated G27 multiplier is calculated as: G27 = (CT primary)(VT primary/110V) when primary value measurements are selected and G27 = (CT secondary)(VT secondary/110V) when secondary value measurements are selected. Due to the required truncations from floating point values to integer values in the calculations of the G29 component parts and its limited dynamic range, we only recommend using G29 values when the MODBUS master cannot deal with the G125 IEEE754 floating point equivalents. Note: The G29 values must be read in whole multiples of three s. It is not possible to read the G28 and G27 parts with separate read commands.
Example of Data Type G29 Assuming the CT/VT configurations are as follows: ● ● ● ●
454
Main VT Primary 6.6 kV Main VT Secondary 110 V Phase CT Primary 3150 A Phase CT Secondary 1 A
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
The Three-phase Active Power displayed on the measurement on the front display of the IED would be 21.94 MW The s related to the Three-phase Active Power are: 3x00327, 3x00328, 3x00329 Address
Data read from these s
Format of the data
3x00327
116
G28
3x00328
2
G27
3x00329
57928
G27
The Equivalent G27 value = [216 * Value in the address 3x00328 + Value in the address 3x00329] = 216*2 + 57928 = 189000 The Equivalent value of power G29 = G28 * Equivalent G27 =116 * 189000 =21.92 MW Note: The above calculated value (21.92 MW) is same as the power value measured on the front display.
Data type G125 Data type G125 is a short float IEEE754 floating point format, which occupies 32 bits in two consecutive s. The high order byte of the format is in the first (low order) and the low order byte in the second . The value of the G125 measurement is as accurate as the IED's ability to resolve the measurement after it has applied the secondary or primary scaling factors. It does not suffer from the truncation errors or dynamic range limitations associated with the G29 data format.
P14D-B/G/L/Z-TM-EN-1
455
Chapter 10 - SCADA Communications
10
P14D
IEC 61850
This section describes how the IEC 61850 standard is applied to the Px40 platform. It is not a description of the standard itself. The level at which this section is written assumes that the reader is already familiar with the IEC 61850 standard. IEC 61850 is the international standard for Ethernet-based communication in substations. It enables integration of all protection, control, measurement and monitoring functions within a substation, and additionally provides the means for interlocking and inter-tripping. It combines the convenience of Ethernet with the security that is so essential in substations today.
10.1
BENEFITS OF IEC 61850
The standard provides: ● ● ● ●
Standardized models for IEDs and other equipment within the substation Standardized communication services (the methods used to access and exchange data) Standardized formats for configuration files Peer-to-peer communication
The standard adheres to the requirements laid out by the ISO OSI model and therefore provides complete vendor interoperability and flexibility on the transmission types and protocols used. This includes mapping of data onto Ethernet, which is becoming more and more widely used in substations, in favour of RS485. Using Ethernet in the substation offers many advantages, most significantly including: ● Ethernet allows high-speed data rates (currently 100 Mbps, rather than 10’s of kbps or less used by most serial protocols) ● Ethernet provides the possibility to have multiple clients ● Ethernet is an open standard in every-day use ● There is a wide range of Ethernet-compatible products that may be used to supplement the LAN installation (hubs, bridges, switches)
10.2
IEC 61850 INTEROPERABILITY
A major benefit of IEC 61850 is interoperability. IEC 61850 standardizes the data model of substation IEDs, which allows interoperability between products from multiple vendors. An IEC 61850-compliant device may be interoperable, but this does not mean it is interchangeable. You cannot simply replace a product from one vendor with that of another without reconfiguration. However the terminology is pre-defined and anyone with prior knowledge of IEC 61850 should be able to integrate a new device very quickly without having to map all of the new data. IEC 61850 brings improved substation communications and interoperability to the end , at a lower cost.
10.3
THE IEC 61850 DATA MODEL
The data model of any IEC 61850 IED can be viewed as a hierarchy of information, whose nomenclature and categorization is defined and standardized in the IEC 61850 specification.
456
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
Data Attributes stVal
q
t
PhA
PhB
PhC
Data Objects Pos
A Logical Nodes: 1 to n
LN1: XCBR
LN2: MMXU
Logical Device: IEDs 1 to n Physical Device (network address) V01008
Figure 135: Data model layers in IEC61850 The levels of this hierarchy can be described as follows: Data Frame format Layer
Description
Physical Device
Identifies the actual IED within a system. Typically the device’s name or IP address can be used (for example Feeder_1 or 10.0.0.2
Logical Device
Identifies groups of related Logical Nodes within the Physical Device. For the MiCOM IEDs, 5 Logical Devices exist: Control, Measurements, Protection, Records, System
Wrapper/Logical Node Instance
Identifies the major functional areas within the IEC 61850 data model. Either 3 or 6 characters are used as a prefix to define the functional group (wrapper) while the actual functionality is identified by a 4 character Logical Node name suffixed by an instance number. For example, XCBR1 (circuit breaker), MMXU1 (measurements), FrqPTOF2 (overfrequency protection, stage 2).
Data Object
This next layer is used to identify the type of data you will be presented with. For example, Pos (position) of Logical Node type XCBR
Data Attribute
This is the actual data (measurement value, status, description, etc.). For example, stVal (status value) indicating actual position of circuit breaker for Data Object type Pos of Logical Node type XCBR
10.4
IEC 61850 IN MICOM IEDS
IEC 61850 is implemented by use of a separate Ethernet card. This Ethernet card manages the majority of the IEC 61850 implementation and data transfer to avoid any impact on the performance of the protection functions. To communicate with an IEC 61850 IED on Ethernet, it is necessary only to know its IP address. This can then be configured into either: ● An IEC 61850 client (or master), for example a PACiS computer (MiCOM C264) ● An HMI ● An MMS browser, with which the full data model can be retrieved from the IED, without any prior knowledge of the IED
P14D-B/G/L/Z-TM-EN-1
457
Chapter 10 - SCADA Communications
P14D
The IEC 61850 compatible interface standard provides capability for the following: ● ● ● ●
Read access to measurements Refresh of all measurements at the rate of once per second. Generation of non-buffered reports on change of status or measurement SNTP time synchronization over an Ethernet link. (This is used to synchronize the IED's internal real time clock. ● GOOSE peer-to-peer communication ● Disturbance record extraction by file transfer. The record is extracted as an ASCII format COMTRADE file ● Controls (Direct and Select Before Operate) Note: Setting changes are not ed in the current IEC 61850 implementation. Currently these setting changes are carried out using MiCOM S1 Agile.
10.5
IEC 61850 DATA MODEL IMPLEMENTATION
The data model naming adopted in the IEDs has been standardised for consistency. Therefore the Logical Nodes are allocated to one of the five Logical Devices, as appropriate. The data model is described in the Model Implementation Conformance Statement (MICS) document, which is available as a separate document.
10.6
IEC 61850 COMMUNICATION SERVICES IMPLEMENTATION
The IEC 61850 communication services which are implemented in the IEDs are described in the Protocol Implementation Conformance Statement (PICS) document, which is available as a separate document.
10.7
IEC 61850 PEER-TO-PEER (GSSE) COMMUNICATIONS
The implementation of IEC 61850 Generic Object Oriented Substation Event (GOOSE) enables faster communication between IEDs offering the possibility for a fast and reliable system-wide distribution of input and output data values. The GOOSE model uses multicast services to deliver event information. Multicast messaging means that messages are sent to all the devices on the network, but only those devices that have been appropriately configured will receive the frames. In addition, the receiving devices can specifically accept frames from certain devices and discard frames from the other devices. It is also known as a publisher-subscriber system. When a device detects a change in one of its monitored status points it publishes a new message. Any device that is interested in the information subscribes to the data it contains. Note: Multicast messages cannot be routed across networks without special equipment.
Each new message is re-transmitted at configurable intervals, to counter for possible corruption due to interference, and collisions, therefore ensuring delivery. In practice, the parameters controlling the message transmission cannot be calculated. Time must be allocated to the testing of GOOSE schemes before or during commissioning, in just the same way a hardwired scheme must be tested.
458
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
10.8
MAPPING GOOSE MESSAGES TO VIRTUAL INPUTS
Each GOOSE signal contained in a subscribed GOOSE message can be mapped to any of the 32 virtual inputs within the PSL. The virtual inputs allow the mapping to internal logic functions for protection control, directly to output s or LEDs for monitoring. An IED can subscribe to all GOOSE messages but only the following data types can be decoded and mapped to a virtual input: ● ● ● ● ● ● ● ●
BOOLEAN BSTR2 INT16 INT32 INT8 UINT16 UINT32 UINT8
10.8.1
IEC 61850 GOOSE CONFIGURATION
All GOOSE configuration is performed using the IED Configurator tool available in the MiCOM S1 Agile software application. All GOOSE publishing configuration can be found under the GOOSE Publishing tab in the configuration editor window. All GOOSE subscription configuration parameters are under the External Binding tab in the configuration editor window. Settings to enable GOOSE signalling and to apply Test Mode are available using the HMI.
ETHERNET FUNCTIONALITY
10.9
Settings relating to a failed Ethernet link are available in the COMMUNICATIONS column of the IED’s HMI.
10.9.1
ETHERNET DISCONNECTION
IEC 61850 Associations are unique and made between the client and server. If Ethernet connectivity is lost for any reason, the associations are lost, and will need to be re-established by the client. The IED has a T_KEEPALIVE function to monitor each association, and terminate any which are no longer active.
10.9.2
LOSS OF POWER
The IED allows the re-establishment of associations without disruption of its operation, even after its power has been removed. As the IED acts as a server in this process, the client must request the association. Uncommitted settings are cancelled when power is lost, and reports requested by connected clients are reset. The client must re-enable these when it next creates the new association to the IED.
10.10
IEC 61850 CONFIGURATOR SETTINGS
This section contains the table for setting up the IEC61850 Configurator. Col
Menu Text
Row
Default Setting
Available Options
Description IEC61850 CONFIG.
19
00
This column contains settings for the IEC61850 IED Configurator
P14D-B/G/L/Z-TM-EN-1
459
Chapter 10 - SCADA Communications
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description Switch Conf.Bank
19
05
No Action
0 = No Action or 1 = Switch banks
This command allows you to switch between the current configuration, held in the Active Memory Bank to the configuration held in the Inactive Memory Bank. Restore MCL
19
0A
No Action
0 = No Action or 1 = Restore MCL
This command lets you restore the MCL (MiCOM Control Language). Active Conf.Name
19
10
Not Available
Not Settable
This cell displays the name of the configuration in the Active Memory Bank (usually taken from the SCL file). Active Conf.Rev
19
11
Not Available
Not Settable
This cell displays the configuration revision number of the configuration in the Active Memory Bank (usually taken from the SCL file). Inact.Conf.Name
19
20
Not Available
Not Settable
This cell displays the name of the configuration in the Inactive Memory Bank (usually taken from the SCL file). Inact.Conf.Rev
19
21
Not Available
Not Settable
This cell displays the configuration revision number of the configuration in the Inactive Memory Bank (usually taken from the SCL file). IP PARAMETERS
19
30
Not Settable
The data in this sub-heading relates to the IEC61850 IP parameters IP Address
19
31
0.0.0.0
Not Settable
0.0.0.0
Not Settable
This cell displays the IED's IP address. Subnet mask
19
32
Ths cell displays the subnet mask, which defines the subnet on which the IED is located. Gateway
19
33
0.0.0.0
Not Settable
Ths cell displays the gateway address of the LAN on which the IED is located. SNTP PARAMETERS
19
40
Not Settable
The data and settings under this sub-heading relate to the IEC61850 SNTP parameters SNTP Server 1
19
41
0.0.0.0
Not Settable
This cell displays the IP address of the primary SNTP server. SNTP Server 2
19
42
0.0.0.0
Not Settable
This cell displays the IP address of the secondary SNTP server. IEC 61850 SCL
19
50
19
51
Not Settable
IEC61850 versions only. IED Name
Not Available
Not Settable
This setting displays the unique IED name used on the IEC 61850 network (usually taken from the SCL file). IEC 61850 GOOSE
19
60
Not Settable
70
Bit 0=gcb01 GoEna Bit 1=gcb02 GoEna Bit 2=gcb03 GoEna Bit 3=gcb04 GoEna Bit 4=gcb05 GoEna Bit 5=gcb06 GoEna Bit 6=gcb07 GoEna Bit 7=gcb08 GoEna
IEC61850 versions only.
GoEna
19
0x00
This setting enables the GOOSE publisher settings. Test Mode
19
71
0x00
0 = Disabled, 1 = Through, 2 = Forced
This setting allows the test pattern to be sent in the GOOSE message. With ‘ Through’, the data in the GOOSE message is sent as normal. With ‘Forced’, the data sent in the GOOSE message follows the ‘VOP Test Pattern’ setting.
460
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
Menu Text
Col
Row
Default Setting
Available Options
Description Ignore Test Flag
19
73
No
0 = No or 1 = Yes
This cell allows you to ignore the test flag, if set.
P14D-B/G/L/Z-TM-EN-1
461
Chapter 10 - SCADA Communications
11
P14D
READ ONLY MODE
With IEC 61850 and Ethernet/Internet communication capabilities, security has become an important issue. In view of this, all MiCOM devices comply with the latest Cyber-Security (on page 473) standards. In addition to this, the device provides a facility to allow the to enable or disable the physical interfaces. This feature is available for products using Courier, IEC 60870-5-103, or IEC 61850. Note: For IEC 60870-5-103, Read Only Mode function is different from the existing Command block feature.
11.1
IEC 60870-5-103 PROTOCOL
If Read-Only Mode is enabled for RP1 or RP2 with IEC 60870-5-103, the following commands are blocked at the interface: ● Write parameters (=change setting) (private ASDUs) ● General Commands (ASDU20), namely: ▪ INF16 auto-recloser on/off ▪ INF19 LED reset ▪ Private INFs (for example: CB open/close, Control Inputs) The following commands are still allowed: ● ● ● ● ● ●
11.2
Poll Class 1 (Read spontaneous events) Poll Class 2 (Read measurands) GI sequence (ASDU7 'Start GI', Poll Class 1) Transmission of Disturbance Records sequence (ASDU24, ASDU25, Poll Class 1) Time Synchronisation (ASDU6) General Commands (ASDU20), namely: ▪ INF23 activate characteristic 1 ▪ INF24 activate characteristic 2 ▪ INF25 activate characteristic 3 ▪ INF26 activate characteristic 4
COURIER PROTOCOL
If Read-Only Mode is enabled for RP1 or RP2 with Courier, the following commands are blocked at the interface: ● Write settings ● All controls, including: ▪ Reset Indication (Trip LED) ▪ Operate Control Inputs ▪ CB operations ▪ Auto-reclose operations ▪ Reset demands ▪ Clear event/fault/maintenance/disturbance records ▪ Test LEDs & s The following commands are still allowed: • Read settings, statuses, measurands
462
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
• Read records (event, fault, disturbance) • Time Synchronisation • Change active setting group
11.3
IEC 61850 PROTOCOL
If Read-Only Mode is enabled for the Ethernet interfacing with IEC 61850, the following commands are blocked at the interface: ● All controls, including: ▪ Enable/disable protection ▪ Operate Control Inputs ▪ CB operations (Close/Trip, Lock) ▪ Reset LEDs The following commands are still allowed: ● ● ● ● ●
11.4
Read statuses, measurands Generate reports Extract disturbance records Time synchronisation Change active setting group
READ-ONLY SETTINGS
The following settings are available for enabling or disabling Read Only Mode. ● RP1 Read Only ● RP2 Read Only ● NIC Read Only These settings are not available for MODBUS and DNP3.
11.5
READ-ONLY DDB SIGNALS
The remote read only mode is also available in the PSL using three dedicated DDB signals: ● RP1 Read Only ● RP2 Read Only ● NIC Read Only Using the PSL, these signals can be activated by opto-inputs, Control Inputs and function keys if required.
P14D-B/G/L/Z-TM-EN-1
463
Chapter 10 - SCADA Communications
12
P14D
TIME SYNCHRONISATION
In modern protection schemes it is necessary to synchronise the IED's real time clock so that events from different devices can be time stamped and placed in chronological order. This is achieved in various ways depending on the chosen options and communication protocols. ● Using the IRIG-B input (if fitted) ● Using the SNTP time protocol (for Ethernet IEC61850 versions + DNP3 OE) ● By using the time synchronisation functionality inherent in the data protocols
464
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
13
DEMODULATED IRIG-B
IRIG stands for Inter Range instrumentation Group, which is a standards body responsible for standardising different time code formats. There are several different formats starting with IRIG-A, followed by IRIG-B and so on. The letter after the "IRIG" specifies the resolution of the time signal in pulses per second (PPS). IRIGB, the one which we use has a resolution of 100 PPS. IRIG-B is used when accurate time-stamping is required. The following diagram shows a typical GPS time-synchronised substation application. The satellite RF signal is picked up by a satellite dish and ed on to receiver. The receiver receives the signal and converts it into time signal suitable for the substation network. IEDs in the substation use this signal to govern their internal clocks and event recorders.
GPS time signal
GPS satellite
IRIG-B
Satellite dish
Receiver
IED
IED
IED
V01040
Figure 136: GPS Satellite timing signal The IRIG-B time code signal is a sequence of one second time frames. Each frame is split up into ten 100 mS slots as follows: ● ● ● ● ● ●
Time-slot 1: Seconds Time-slot 2: Minutes Time-slot 3: Hours Time-slot 4: Days Time-slot 5 and 6: Control functions Time-slots 7 to 10: Straight binary time of day
The first four time-slots define the time in BCD (Binary Coded Decimal). Time-slots 5 and 6 are used for control functions, which control deletion commands and allow different data groupings within the synchronisation strings. Time-slots 7-10 define the time in SBS (Straight Binary Second of day).
13.1
DEMODULATED IRIG-B IMPLEMENTATION
All models have the option of accepting a demodulated IRIG-B input. This is a hardware option and it uses the same terminals as the RP1 (or RP2 if applicable) inputs. You cannot have IRIG-B and a serial port in the same slot. This means 20Te models cannot have both IRIG-B time synchronisation and serial communications capability. For 30TE models however, it is possible to have IRIG-B in one slot and a serial port in another, provided this option is ordered. To set the device to use IRIG-B, use the setting IRIG-B Sync cell in the DATE AND TIME column. This can be set to 'None' (for no IRIG-B), 'RP1' (for the option where IRIG-B uses terminals 54 and 56) and 'RP2' (for the option where IRIG-B uses terminals 82 and 84)
P14D-B/G/L/Z-TM-EN-1
465
Chapter 10 - SCADA Communications
P14D
The IRIG-B status can be viewed in the IRIG-B Status cell in the DATE AND TIME column.
466
P14D-B/G/L/Z-TM-EN-1
P14D
14
Chapter 10 - SCADA Communications
SNTP
SNTP is used to synchronise the clocks of computer systems over packet-switched, variable-latency data networks, such as IP. SNTP can be used as the time synchronisation method for models using IEC 61850 over Ethernet. The device is synchronised by the main SNTP server. This is achieved by entering the IP address of the SNTP server into the IED using the IED Configurator software (on page 510) described in the S1 Agile chapter. A second server is also configured with a different IP address for backup purposes. The HMI menu does not contain any configurable settings relating to SNTP, as the only way to configure it is using the IEC61850 Configurator. However it is possible to view some parameters in the COMMUNICATIONS column under the sub-heading SNTP parameters. Here you can view the SNTP server addresses and the SNTP poll rate in the cells SNTP Server 1, SNTP Server 2 and SNTP Poll rate respectively. The SNTP time synchronisation status is displayed in the SNTP Status cell in the DATE AND TIME column.
P14D-B/G/L/Z-TM-EN-1
467
Chapter 10 - SCADA Communications
15
P14D
TIME SYNCHRONSIATION USING THE COMMUNICATION PROTOCOLS
All communication protocols have in-built time synchronisation mechanisms. If neither IRIG-B nor SNTP is used to synchronise the devices, the time synchronisation mechanism within the relevant serial protocol is used. The real time is usually defined in the master station and communicated to the relevant IEDs via one of the rear serial ports using the chosen protocol. It is also possible to define the time locally using settings in the DATE AND TIME column. The time synchronisation for each protocol is described in the relevant protocol description sections as follows: ● ● ● ●
468
Courier Time Synchronisation (on page 435) IEC 60870-5-103 Time synchronisation (on page 436) DNP 3 Time Synchronisation (on page 441) Modbus time Synchronisation (on page 453)
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
16
COMMUNICATION SETTINGS
This section contains a complete table of the settings required to set up the device communication. Menu Text
Col
Row
Default Setting
Available Options
Description COMMUNICATIONS
0E
00
This column contains general communications settings RP1 Protocol
0E
0 = Courier, 1 = IEC870-5-103, 2 = Modbus, 3 = DNP3.0
01
This setting sets the address of RP1. RP1 Address
0E
02
255
0 to 255 (Courier)
02
247
0 to 247 (Modbus)
02
254
0 to 254 (CS103)
02
255
0 to 65534 (DNP3.0)
03
15
From 1m to 30m step 1m
This setting sets the address of RP1. RP1 Address
0E
This setting sets the address of RP1. RP1 Address
0E
This setting sets the address of RP1. RP1 Address
0E
This setting sets the address of RP1. RP1 InactivTimer
0E
This setting defines the period of inactivity on RP1 before the IED reverts to its default state. RP1 Baud Rate
0E
04
19200 bits/s
1200, 2400, 4800 9600, 19200, 38400 (dependent on protocol)
This setting sets the communication speed between the IED RP1 port and the master station. It is important that both IED and master station are set at the same speed setting. This cell is applicable for the non-Courier protocols. RP1 Parity
0E
05
None
0 = Odd, 1 = Even, 2 = None
This setting controls the parity format used in the data frames of RP1. It is important that both IED and master station are set with the same parity setting. RP1 Meas Period
0E
06
15
From 1s to 60s step 1s
This setting controls the time interval that the IED will use between sending measurement data to the master station for IEC60870-5-103 versions. RP1 Time Sync
0E
08
Disabled
0 = Disabled or 1 = Enabled
This setting is for DNP3.0 versions only. If set to Enabled the master station can be used to synchronize the time on the IED via RP1. If set to Disabled either the internal free running clock or IRIG-B input are used. Modbus IEC Time
0E
09
Standard
0=Standard IEC (Existing format) 1=Reverse IEC (Company agreed format)
When ‘Standard IEC’ is selected the time format complies with IEC60870-5-4 requirements such that byte 1 of the information is transmitted first, followed by bytes 2 through to 7. If ‘Reverse’ is selected the transmission of information is reversed. RP1 CS103Blcking
0E
0A
Disabled
0 = Disabled, 1 = Monitor Blocking or 2 = Command Blocking
This cell sets the blocking type for IEC60870-5-103. With monitor blocking, reading of the status information and disturbance records is not permitted. When in this mode the IED returns a "termination of general interrogation" message to the master station. With command blocking, all remote commands will be ignored (e.g.CB Trip/Close, change setting group). When in this mode the IED returns a "negative acknowledgement of command" message to the master station. RP1 Card Status
0E
0B
0 = K Bus OK 1 = EIA485 OK 2 = IRIG-B
This setting displays the communication type and status of RP1
P14D-B/G/L/Z-TM-EN-1
469
Chapter 10 - SCADA Communications
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description RP1 Port Config
0E
0C
EIA485 (RS485)
0 = K-Bus 1 = EIA485 (RS485)
This seting selects the type of physical protocol for RP1 - either K-bus or RS485. RP1 Comms Mode
0E
0D
IEC60870 FT1.2
0 = IEC60870 FT1.2 Frame or 1 = 10-bit no parity
This setting determines the serial communication mode. RP1 Baud Rate
0E
0E
19200 bits/s
0 = 9600 bits/s, 1 = 19200 bits/s, 2 = 38400 bits/s Courier protocol only
This cell controls the communication speed between IED and master station. It is important that both IED and master station are set at the same speed setting. This cell is applicable for the Courier protocol. Meas Scaling
0E
0F
Primary
0 = Normalised, 1 = Primary, 2 = Secondary
This setting determines the scaling type of analogue quantities - in of primary, secondary or normalised, for DNP3 models Message Gap (ms)
0E
10
0
From 0ms to 50ms step 1ms
This setting allows the master station to have an interframe gap. DNP 3.0 versions only DNP Need Time
0E
11
10
From 1ms to 30ms step 1ms
This setting sets the duration of time waited before requesting another time sync from the master. DNP 3.0 versions only. DNP App Fragment
0E
12
2048
100 to 2048 step 1
This setting sets the maximum message length (application fragment size) transmitted by the IED for DNP 3.0 versions. DNP App Timeout
0E
13
2
From 1s to 120s step 1s
This setting sets the maximum waiting time between sending a message fragment and reciving confirmation from the master. DNP 3.0 versions only. DNP SBO Timeout
0E
14
10
From 1s to 10s step 1s
This setting sets the maximum waiting time between receiving (sending?) a select command and awaiting an operate confirmation from the master. DNP 3.0 versions only. DNP Link Timeout
0E
15
0
From 0s to 120s step 1s
This setting sets the maximum waiting time for a Data Link Confirm from the master. A value of 0 means data link disabled. DNP 3.0 versions only. NIC Protocol
0E
1F
IEC61850 or DNP3.0 over Ethernet
This cell indicates whether IEC 61850 or DNP 3.0 over Ethernet are used on the rear Ethernet port. NIC MAC Address
0E
22
Ethernet MAC Address
<Ethernet MAC address>
This setting displays the MAC address of the rear Ethernet port, if applicable. NIC Tunl Timeout
0E
64
5.00 min
From 1ms to 30ms step 1ms
This setting sets the maximum waiting time before an inactive tunnel to the application software is reset. DNP 3.0 over Ethernet versions only. NIC Link Report
0E
6A
Alarm
0 = Alarm, 1 = Event, 2 = None
This setting defines how a failed or unfitted network link is reported. DNP 3.0 over Ethernet versions only. REAR PORT2 (RP2)
0E
80
The settings in this sub-menu are for models with a second communications port (RP2). RP2 Protocol
0E
81
Courier
Not Settable
This cell displays the communications protocol relevant to main communication port (RP2) of the chosen IED model. RP2 Card Status
0E
0 = K Bus OK 1 = EIA485 OK 2 = IRIG-B
84
This setting displays the communication type and status of RP2, if applicable RP2 Port Config
470
0E
88
EIA485 (RS485)
0 = K-Bus 1 = EIA485 (RS485)
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 10 - SCADA Communications
Menu Text
Col
Row
Default Setting
Available Options
Description This seting selects the type of physical protocol for RP2 - either K-bus or RS485. RP2 Comms Mode
0E
8A
IEC60870 FT1.2
0 = IEC60870 FT1.2 Frame or 1 = 10-bit no parity
This setting determines the serial communication mode. RP2 Address
0E
90
255
0 to 255 step 1
92
15
From 1m to 30m step 1m
This setting sets the address of RP2. RP2 InactivTimer
0E
This setting defines the period of inactivity on RP2 before the IED reverts to its default state. RP2 Baud Rate
0E
94
19200 bps
0 = 9600 bps, 1 = 19200 bps, 2 = 38400 bps
This setting sets the communication speed between the IED RP2 port and the master station. It is important that both IED and master station are set at the same speed setting. IP Address
0E
A1
0.0.0.0
Not Settable
This cell displays the IED's IP address. DNP over Ethernet versions only. Subnet Address
0E
A2
0.0.0.0
Not Settable
This cell displays the the LAN's subnet address on which the IED is located. DNP 3.0 over Ethernet versions only. Gateway
0E
A4
0.0.0.0
Not Settable
This cell displays the LAN's gateway address on which the IED is located. DNP 3.0 over Ethernet versions only. DNP Time Synch
0E
A5
Disabled
0 = Disabled or 1 = Enabled
If set to ‘Enabled’ the DNP3.0 master station can be used to synchronise the IED's time clock. If set to ‘Disabled’ either the internal free running clock, or IRIG-B input are used. DNP 3.0 over Ethernet versions only. Meas Scaling
0E
A6
Primary
0 = Normalised, 1 = Primary, 2 = Secondary
This setting determines the scaling type of analogue quantities - in of primary, secondary or normalised, for DNP3 models. NIC Tunl Timeout
0E
A7
5
From 1ms to 30ms step 1ms
This setting sets the maximum waiting time before an inactive tunnel to the application software is reset. DNP 3.0 over Ethernet versions only. NIC Link Report
0E
A8
Alarm
0 = Alarm, 1 = Event, 2 = None
This setting defines how a failed or unfitted network link is reported. DNP 3.0 over Ethernet versions only. NIC Link Timeout
0E
A9
60s
From 0.1ms to 60ms step 0.1ms
This setting determines the duration of time waited, after a failed network link is detected, before communication by an alternative media interface is attempted. SNTP PARAMETERS
0E
AA
The settings in this sub-menu are for models using DNP3 over Ethernet. SNTP Server 1
0E
AB
0.0.0.0
Not Settable
This cell indicates the SNTP Server 1 address. DNP 3.0 over Ethernet versions only. SNTP Server 2
0E
AC
0.0.0.0
Not Settable
This cell indicates the SNTP Server 2 address. DNP 3.0 over Ethernet versions only. SNTP Poll Rate
0E
AD
64s
Not Settable
This cell displays the SNTP poll rate interval in seconds. DNP 3.0 over Ethernet versions only. DNP Need Time
0E
B1
10
From 1 to 30 step 1
This setting sets the duration of time waited before requesting another time sync from the master. DNP 3.0 versions only. DNP App Fragment
0E
B2
2048
From 100 to 2048 step 1
This setting sets the maximum message length (application fragment size) transmitted by the IED for DNP 3.0 versions. DNP App Timeout
0E
B3
2
From 1s to 120s step 1s
This setting sets the maximum waiting time between sending a message fragment and reciving confirmation from the master. DNP 3.0 versions only.
P14D-B/G/L/Z-TM-EN-1
471
Chapter 10 - SCADA Communications
Menu Text
Col
Row
P14D
Default Setting
Available Options
Description DNP SBO Timeout
0E
B4
10
From 1s to 10s step 1s
This setting sets the maximum waiting time between receiving (sending?) a select command and awaiting an operate confirmation from the master. DNP 3.0 versions only.
472
P14D-B/G/L/Z-TM-EN-1
CYBER-SECURITY CHAPTER 11
Chapter 11 - Cyber-Security
474
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 11 - Cyber-Security
OVERVIEW
In the past, substation networks were traditionally isolated and the protocols and data formats used to transfer information between devices were more often than not proprietary. For these reasons, the substation environment was very secure against cyber-attacks. The used for this inherent type of security are: ● Security by isolation (if the substation network is not connected to the outside world, it cannot be accessed from the outside world). ● Security by obscurity (if the formats and protocols are proprietary, it is very difficult to interpret them. The increasing sophistication of protection schemes coupled with the advancement of technology and the desire for vendor interoperability has resulted in standardisation of networks and data interchange within substations. Today, devices within substations use standardised protocols for communication. Furthermore, substations can be interconnected with open networks, such as the internet or corporate-wide networks, which use standardised protocols for communication. This introduces a major security risk making the grid vulnerable to cyber-attacks, which could in turn lead to major electrical outages. Clearly, there is now a need to secure communication and equipment within substation environments. This chapter describes the security measures that have been put in place for Alstom Grid 's range of Intelligent Electronic Devices (IEDs). This chapter contains the following sections: Overview The Need for Cyber-Security Standards Cyber-Security Implementation Cyber-Security Settings
475 476 477 481 491
P14D-B/G/L/Z-TM-EN-1
475
Chapter 11 - Cyber-Security
2
P14D
THE NEED FOR CYBER-SECURITY
Cyber-security provides protection against unauthorised disclosure, transfer, modification, or destruction of information or information systems, whether accidental or intentional. To achieve this, there are several security requirements: ● Confidentiality (preventing unauthorized access to information) ● Integrity (preventing unauthorized modification) ● Availability / Authentication (preventing the denial of service and assuring authorized access to information) ● Non-repudiation (preventing the denial of an action that took place) ● Traceability/Detection (monitoring and logging of activity to detect intrusion and analyze incidents) The threats to cyber-security may be unintentional (e.g. natural disasters, human error), or intentional (e.g. cyber-attacks by hackers). Good cyber-security can be achieved with a range of measures, such as closing down vulnerability loopholes, implementing adequate security processes and procedures and providing technology to help achieve this. Examples of vulnerabilities are: ● Indiscretions by personnel (e.g. s keep s on their computer) ● Bad practice (s do not change default s, or everyone uses the same to access all substation equipment) ● Bying of controls (e.g. s turn off security measures) ● Inadequate technology (e.g. substation is not firewalled) Examples of availability issues are: ● Equipment overload, resulting in reduced or no performance ● Expiry of a certificate preventing access to equipment To help tackle these issues, standards organizations have produced various standards, by which compliance significantly reduces the threats associated with lack of cyber-security.
476
P14D-B/G/L/Z-TM-EN-1
P14D
3
Chapter 11 - Cyber-Security
STANDARDS
There are several standards, which apply to substation cyber-security. The standards currently applicable to Alstom Grid IEDs are NERC and IEEE1686. Standard
Country
Description
NERC CIP (North American Electric Reliability Corporation)
USA
Framework for the protection of the grid critical Cyber Assets
BDEW (German Association of Energy and Water Industries)
Requirements for Secure Control and Telecommunication Systems
ANSI ISA 99
USA
ICS oriented then Relevant for EPU completing existing standard and identifying new topics such as patch management
IEEE 1686
International
International Standard for substation IED cyber-security capabilities
IEC 62351
International
Power system data and Comm. protocol
ISO/IEC 27002
International
Framework for the protection of the grid critical Cyber Assets
NIST SP800-53 (National Institute of Standards and Technology)
USA
Complete framework for SCADA SP800-82and ICS cyber-security
NI Guidelines (Centre for the Protection of National Infrastructure)
UK
Clear and valuable good practices for Process Control and SCADA security
3.1
NERC COMPLIANCE
The North American Electric Reliability Corporation (NERC) created a set of standards for the protection of critical infrastructure. These are known as the CIP standards (Critical Infrastructure Protection). These were introduced to ensure the protection of 'Critical Cyber Assets', which control or have an influence on the reliability of North America’s electricity generation and distribution systems. These standards have been compulsory in the USA for several years now. Compliance auditing started in June 2007, and utilities face extremely heavy fines for non-compliance. NERC CIP standards CIP standard
Description
CIP-002-1 Critical Cyber Assets
Define and document the Critical Assets and the Critical Cyber Assets
CIP-003-1 Security Management Controls
Define and document the Security Management Controls required to protect the Critical Cyber Assets
CIP-004-1 Personnel and Training
Define and Document Personnel handling and training required protecting Critical Cyber Assets
CIP-005-1 Electronic Security
Define and document logical security perimeter where Critical Cyber Assets reside and measures to control access points and monitor electronic access
CIP-006-1 Physical Security
Define and document Physical Security Perimeters within which Critical Cyber Assets reside
CIP-007-1 Systems Security Management
Define and document system test procedures, and management, security patch management, system vulnerability, system logging, change control and configuration required for all Critical Cyber Assets
CIP-008-1 Incident Reporting and Response Planning
Define and document procedures necessary when Cyber-security Incidents relating to Critical Cyber Assets are identified
CIP-009-1 Recovery Plans
Define and document Recovery plans for Critical Cyber Assets
P14D-B/G/L/Z-TM-EN-1
477
Chapter 11 - Cyber-Security
3.1.1
P14D
CIP 002
CIP 002 concerns itself with the identification of: ● Critical assets, such as overhead lines and transformers ● Critical cyber assets, such as IEDs that use routable protocols to communicate outside or inside the Electronic Security Perimeter; or are accessible by dial-up. Power utility responsibilities: Create the list of the assets
3.1.2
Alstom Grid's contribution: We can help the power utilities to create this asset automatically. We can provide audits to list the Cyber assets
CIP 003
CIP 003 requires the implementation of a cyber-security policy, with associated documentation, which demonstrates the management’s commitment and ability to secure its Critical Cyber Assets. The standard also requires change control practices whereby all entity or vendor-related changes to hardware and software components are documented and maintained. Power utility responsibilities: To create a Cyber-security Policy
3.1.3
Alstom Grid 's contribution: We can help the power utilities to have access control to its critical assets by providing centralized Access control. We can help the customer with its change control by providing a section in the documentation where it describes changes affecting the hardware and software.
CIP 004
CIP 004 requires that personnel having authorized cyber access or authorized physical access to Critical Cyber Assets, (including contractors and service vendors), have an appropriate level of training. Power utility responsibilities: To provide appropriate training of its personnel
3.1.4
Alstom Grid 's contribution: We can provide cyber-security training
CIP 005
CIP 005 requires the establishment of an Electronic Security Perimeter (ESP), which provides: ● ● ● ●
The disabling of ports and services that are not required Permanent monitoring and access to logs (24x7x365) Vulnerability Assessments (yearly at a minimum) Documentation of Network Changes Power utility responsibilities:
To monitor access to the ESP To perform the vulnerability assessments To document network changes
3.1.5
Alstom Grid 's contribution: To disable all ports not used in the IED To monitor and record all access to the IED
CIP 006
CIP 006 states that Physical Security controls, providing perimeter monitoring and logging along with robust access controls, must be implemented and documented. All cyber assets used for Physical Security are considered critical and should be treated as such:
478
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 11 - Cyber-Security
Power utility responsibilities: Provide physical security controls and perimeter monitoring. Ensure that people who have access to critical cyber assets don’t have criminal records.
3.1.6
Alstom Grid 's contribution: Alstom Grid cannot provide additional help with this aspect.
CIP 007
CIP 007 covers the following points: ● ● ● ● ● ● ●
Test procedures Ports and services Security patch management Antivirus management Monitoring An annual vulnerability assessment should be performed Power utility responsibilities:
To provide an incident response team and have appropriate processes in place
3.1.7
Alstom Grid 's contribution: Test procedures; We can provide advice and help on testing. Ports and services; Our devices can disable unused ports and services Security patch management; We can provide assistance Antivirus; We can provide advise and assistance management; We can provide advice and assistance Monitoring; Our equipment monitors and logs access
CIP 008
CIP 008 requires that an incident response plan be developed, including the definition of an incident response team, their responsibilities and associated procedures. Power utility responsibilities: To provide an incident response team and have appropriate processes in place.
3.1.8
Alstom Grid 's contribution: Alstom Grid cannot provide additional help with this aspect.
CIP 009
CIP 009 states that a disaster recovery plan should be created and tested with annual drills. Power utility responsibilities: To implement a recovery plan
3.2
Alstom Grid 's contribution: To provide guidelines on recovery plans and backup/restore documentation
IEEE 1686-2007
IEEE 1686-2007 is an IEEE Standard for substation IEDs' cyber-security capabilities. It proposes practical and achievable mechanisms to achieve secure operations. The following features described in this standard apply to Alstom Grid Px4x relays: ● s are 8 characters long and can contain upper-case, lower-case, numeric and special characters. ● s are never displayed or transmitted to a .
P14D-B/G/L/Z-TM-EN-1
479
Chapter 11 - Cyber-Security
P14D
● IED functions and features are assigned to different levels. The assignment is fixed. ● Record of an audit trail listing events in the order in which they occur, held in a circular buffer. ● Records contain all defined fields from the standard and record all defined function event types where the function is ed. ● No defeat mechanism exists. Instead a secure recovery scheme is implemented. ● Unused ports (physical and logical) may be disabled.
480
P14D-B/G/L/Z-TM-EN-1
P14D
4
Chapter 11 - Cyber-Security
CYBER-SECURITY IMPLEMENTATION
The Alstom Grid IEDs have always been and will continue to be equipped with state-of-the-art security measures. Due to the ever-evolving communication technology and new threats to security, this requirement is not static. Hardware and software security measures are continuously being developed and implemented to mitigate the associated threats and risks. This section describes the current implementation of cyber-security, valid for the release of platform software to which this manual pertains. This current cyber-security implementation is known as Cyber-security Phase 1. At the IED level, these cyber-security measures have been implemented: ● ● ● ● ● ● ●
NERC-compliant default display Four-level access Enhanced security recovery procedure Disabling of unused physical and logical ports Inactivity timer Security events management
External to the IEDs, the following cyber-security measures have been implemented: ● Antivirus ● Security patch management
4.1
NERC-COMPLIANT DISPLAY
In order for the IED to be NERC-compliant, it must provide the option for a NERC-compliant default display. The default display that is implemented in Alstom Grid's cyber-security concept contains a warning that the IED can be accessed by authorised s. ACCESS ONLY FOR AUTHORISED S HOTKEY If you try to change the default display from the NERC-compliant one, a further warning is displayed: DISPLAY NOT NERC COMPLIANT OK? The default display navigation map shows how NERC-compliance is achieved with the product's default display concept.
P14D-B/G/L/Z-TM-EN-1
481
Chapter 11 - Cyber-Security
P14D
DISPLAY NOT NERC COMPLIANT. OK?
DISPLAY NOT NERC COMPLIANT. OK?
NERC compliant banner
Access Level
System Current
System Frequency
System Voltage
Plant Reference
System Power
Description
Date & Time
V00403
Figure 137: Default display navigation
4.2
FOUR-LEVEL ACCESS
The menu structure contains four levels of access, three of which are protected. levels Level
0
Meaning
Read Some Write Minimal
Read Operation SYSTEM DATA column: Description Plant Reference Model Number Serial Number S/W Ref. Access Level Security Feature
Write Operation
Entry LCD Contrast (UI only)
SECURITY CONFIG column: Banner Attempts Remain Blk Time Remain Fallback PW level Security Code (UI only)
1
482
Read All Write Few
All data and settings are readable. Poll Measurements
All items writeable at level 0. Level 1 setting Extract Disturbance Record Select Event, Main and Fault () Extract Events (e.g. via MiCOM S1 Studio)
P14D-B/G/L/Z-TM-EN-1
P14D
Level
Chapter 11 - Cyber-Security
Meaning
Read All Write Some
2
Read All Write All
3
4.2.1
Read Operation
Write Operation
All data and settings are readable. Poll Measurements
All items writeable at level 1. Setting Cells that change visibility (Visible/Invisible). Setting Values (Primary/Secondary) selector Commands: Reset Indication Reset Demand Reset Statistics Reset CB Data / counters Level 2 setting
All data and settings are readable. Poll Measurements
All items writeable at level 2. Change all Setting cells Operations: Extract and Setting file. Extract and PSL Extract and MCL61850 (IED Config - IEC61850) Auto-extraction of Disturbance Recorder Courier/Modbus Accept Event (auto event extraction, e.g. via A2R) Commands: Change Active Group setting Close / Open CB Change Comms device address. Set Date & Time Switch MCL banks / Switch Conf. Bank in UI (IED Config IEC61850) Enable / Disable Device ports (in SECURITY CONFIG column) Level 3 setting
BLANK S
A blank is effectively a zero-length . Through the front it is entered by confirming the entry without actually entering any characters. Through a communications port the Courier and Modbus protocols each have a means of writing a blank to the IED. A blank disables the need for a at the level that this applied. Blank s have a slightly different validation procedure. If a blank is entered through the front , the following text is displayed, after which the procedure is the same as already described: BLANK ENTERED CONFIRM
Blank s cannot be configured if lower level is not blank. Blank s affect fall back level after inactivity timeout or . The ‘fallback level’ is the level adopted by the IED after an inactivity timeout, or after the logs out. This will be either the level of the highest level that is blank, or level 0 if no s are blank.
4.2.2
RULES
● Default s are blank for Level 1 and AAAA for Levels 2 and 3 ● s may be any length between 0 and 8 characters long
P14D-B/G/L/Z-TM-EN-1
483
Chapter 11 - Cyber-Security
P14D
● s may or may not be NERC compliant ● s may contain any ASCII character in the range ASCII code 33 (21 Hex) to ASCII code 122 (7A Hex) inclusive ● Only one is required for all the IED interfaces
4.2.3
ACCESS LEVEL DDBS
In additiona to having the 'Access level' cell in the 'System data' column (address 00D0), the current level of access for each interface is also available for use in the Programming Scheme Logic (PSL) by mapping to these Digital Data Bus (DDB) signals: ● ● ● ● ● ● ● ●
HMI Access Lvl 1 HMI Access Lvl 2 FPort AccessLvl1 FPort AccessLvl2 RPrt1 AccessLvl1 RPrt1 AccessLvl2 RPrt2 AccessLvl1 RPrt2 AccessLvl2
Each pair of DDB signals indicates the access level as follows: ● ● ● ●
Lvl 1 off, Lvl 2 off = 0 Lvl 1 on, Lvl 2 off = 1 Lvl 1 off, Lvl 2 on = 2 Lvl 1 on, Lvl 2 on = 3
Key: HMI = Human Machine Interface FPort = Front Port RPrt = Rear Port Lvl = Level
4.3
ENHANCED SECURITY
Cyber-security requires strong s and validation for NERC compliance.
4.3.1
STRENGTHENING
NERC compliant s result in a minimum level of complexity, and include these requirements: ● ● ● ● ●
4.3.2
At least one upper-case alpha character At least one lower-case alpha character At least one numeric character At least one special character (%,$...) At least six characters long
VALIDATION
The IED checks for NERC compliance. If the is entered through the front then this is reflected on the Liquid Crystal Display (LCD) display. If the entered is NERC compliant, the following text is displayed.
484
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 11 - Cyber-Security
NERC COMPLIANT P/WORD WAS SAVED
The IED does not enforce NERC compliance. It is the responsibility of the to ensure that compliance is adhered to as and when necessary. If the entered is not NERC-compliant, the is required to actively confirm this, in which case the non-compliance is logged. If the entered is not NERC compliant, the following text is displayed: NERC COMPLIANCE NOT MET CONFIRM?
On confirmation, the non-compliant is stored and the following acknowledgement message is displayed for 2 seconds. NON-NERC P/WORD SAVED OK
If the action is cancelled, the is rejected and the following message displayed for 2 seconds. NON-NERC P/WORD NOT SAVE
If the is entered through a communications port using Courier or Modbus protocols the IED will store the , irrespective of whether it is or isn’t NERC-compliant, and then uses appropriate response codes to inform the client that the was NERC-compliant or not. The client then can choose if he/she wishes to enter a new that is NERC-compliant or leave the entered one in place.
4.3.3
BLOCKING
You are locked out temporarily, after a defined number of failed entry attempts. The number of entry attempts, and the blocking periods are configurable as shown in the table at the end of this section. Each invalid entry attempt decrements the 'Attempts Remain' data cell by 1. When the maximum number of attempts has been reached, access is blocked. If the attempts timer expires, or the correct is entered before the 'attempt count' reaches the maximum number, then the 'attempts count' is reset to 0. An attempt is only counted if the attempted uses only characters in the valid range, but the attempted is not correct (does not match the corresponding in the IED). Any attempt where one or more characters of the attempted are not in the valid range will not be counted. Once the entry is blocked, a 'blocking timer' is initiated. Attempts to access the interface whilst the 'blocking timer' is running results in an error message, irrespective of whether the correct is entered or not. Only after the 'blocking timer' has expired will access to the interface be unblocked, whereupon the attempts counter is reset to zero. Attempts to write to the entry whilst it is blocked results in the following message, which is displayed for 2 seconds.
P14D-B/G/L/Z-TM-EN-1
485
Chapter 11 - Cyber-Security
P14D
NOT ACCEPTED ENTRY IS BLOCKED
Appropriate responses achieve the same result if the is written through a communications port. The attempts count, attempts timer and blocking timer can be configured, as shown in the table. blocking configuration Setting
Cell col row
Units
Default Setting
Available Setting
Attempts Limit
25 02
3
0 to 3 step 1
Attempts Timer
25 03
Minutes
2
1 to 3 step 1
Blocking Timer
25 04
Minutes
5
1 to 30 step 1
4.4
RECOVERY
recovery is the means by which the s can be recovered on a device if the customer should mislay the configured s. To obtain the recovery the customer must the Alstom Grid Centre and supply two pieces of information from the IED – namely the Serial Number and its Security Code. The Centre will use these items to generate a Recovery which is then provided to the customer. The security code is a 16-character string of upper case characters. It is a read-only parameter. The IED generates its own security code randomly. A new code is generated under the following conditions: ● ● ● ●
On power up Whenever settings are set back to default On expiry of validity timer (see below) When the recovery is entered
As soon as the security code is displayed on the LCD display, a validity timer is started. This validity timer is set to 72 hours and is not configurable. This provides enough time for the centre to manually generate and send a recovery . The Service Level Agreement (SLA) for recovery generation is one working day, so 72 hours is sufficient time, even allowing for closure of the centre over weekends and bank holidays. To prevent accidental reading of the IED security code the cell will initially display a warning message: PRESS ENTER TO READ SEC. CODE
The security code will be displayed on confirmation, whereupon the validity timer will be started. The security code can only be read from the front .
4.4.1
RECOVERY
The recovery is intended for recovery only. It is not a replacement that can be used continually. It can only be used once – for recovery. Entry of the recovery causes the IED to reset all s back to default. This is all it is designed to do. After the s have been set back to default, it is up to the to enter new s appropriate for the function for which they are intended, ensuring NERC compliance, if required.
486
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 11 - Cyber-Security
On this action, the following message is displayed: S HAVE BEEN SET TO DEFAULT
The recovery can be applied through any interface, local or remote. It will achieve the same result irrespective of which interface it is applied through.
4.4.2
ENCRYPTION
The IED s encryption for s entered remotely. The encryption key can be read from the IED through a specific cell available only through communication interfaces, not the front . Each time the key is read the IED generates a new key that is valid only for the next encryption write. Once used, the key is invalidated and a new key must be read for the next encrypted write. The encryption mechanism is otherwise transparent to the .
4.5
DISABLING PHYSICAL PORTS
It is possible to disable unused physical ports. A level 3 is needed to perform this action. To prevent accidental disabling of a port, a warning message is displayed according to whichever port is required to be disabled. For example if rear port 1 is to be disabled, the following message appears: REAR PORT 1 TO BE DISABLED.CONFIRM
Two to four ports can be disabled, depending on the model. ● ● ● ●
Front port Rear port 1 Rear port 2 (not implemented on all models) Ethernet port (not implemented on all models)
Note: Note: It is not possible to disable a port from which the disabling port command originates.
4.6
DISABLING LOGICAL PORTS
It is possible to disable unused logical ports. A level 3 is needed to perform this action. Note: Note: The port disabling setting cells are not provided in the settings file. It is only possible to do this using the HMI front .
It is not desirable to disable the Ethernet port as doing this will disable all Ethernet communications. It is more appropriate to disable selected protocols on the Ethernet card and leave the others functioning.
P14D-B/G/L/Z-TM-EN-1
487
Chapter 11 - Cyber-Security
P14D
Three protocols can be disabled: ● IEC61850 ● DNP3 Over Ethernet ● Courier Tunnelling Note: Note: If any of these protocols are enabled or disabled, the Ethernet card will reboot.
4.7
SECURITY EVENTS MANAGEMENT
The implementation of NERC-compliant cyber-security necessitates the generation of a range of Event records, which log security issues such as the entry of a non-NERC-compliant , or the selection of a non-NERC-compliant default display. Security event values Event Value
Display
LEVEL UNLOCKED
LOGGED IN ON
LEVEL RESET
LOGGED OUT ON
SET BLANK
P/WORD SET BLANK BY
SET NON-COMPLIANT
P/WORD NOT-NERC BY
MODIFIED
CHANGED BY
ENTRY BLOCKED
BLOCKED ON
ENTRY UNBLOCKED
P/WORD UNBLOCKED ON
INVALID ENTERED
INV P/W ENTERED ON
EXPIRED
P/WORD EXPIRED ON
ENTERED WHILE BLOCKED
P/W ENT WHEN BLK ON
RECOVERY ENTERED
RCVY P/W ENTERED ON
IED SECURITY CODE READ
IED SEC CODE RD ON
IED SECURITY CODE TIMER EXPIRED
IED SEC CODE EXP -
PORT DISABLED
PORT DISABLED BY
PORT ENABLED
PORT ENABLED BY
DEF. DISPLAY NOT NERC COMPLIANT
DEF DSP NOT-NERC
PSL SETTINGS ED
PSL STNG D/LOAD BY
488
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 11 - Cyber-Security
Event Value
Display
DNP SETTINGS ED
DNP STNG D/LOAD BY
TRACE DATA ED
TRACE DAT D/LOAD BY
IEC61850 CONFIG ED
IED CONFG D/LOAD BY
CURVES ED
CRV D/LOAD BY
PSL CONFIG ED
PSL CONFG D/LOAD BY
SETTINGS ED
SETTINGS D/LOAD BY
PSL SETTINGS ED
PSL STNG BY
DNP SETTINGS ED
DNP STNG BY
TRACE DATA ED
TRACE DAT BY
IEC61850 CONFIG ED
IED CONFG BY
CURVES ED
CRV BY
PSL CONFIG ED
PSL CONFG BY
SETTINGS ED
SETTINGS BY
EVENTS HAVE BEEN EXTRACTED
EVENTS EXTRACTED BY
ACTIVE GROUP CHANGED
ACTIVE GRP CHNGE BY
CS SETTINGS CHANGED
C & S CHANGED BY
DR SETTINGS CHANGED
DR CHANGED BY
SETTING GROUP CHANGED
SETTINGS CHANGED BY
POWER ON
POWER ON -
SOFTWARE_ED
S/W ED -
Where: ● ● ● ●
int is the interface definition (UI, FP, RP1, RP2, TNL, T) prt is the port ID (FP, RP1, RP2, TNL, DNP3, IEC, ETHR) grp is the group number (1, 2, 3, 4) crv is the Curve group number (1, 2, 3, 4)
P14D-B/G/L/Z-TM-EN-1
489
Chapter 11 - Cyber-Security
P14D
● n is the new access level (0, 1, 2, 3) ● p is the level (1, 2, 3) ● nov is the number of events (1 – nnn) Each event is identified with a unique number that is incremented for each new event so that it is possible to detect missing events as there will be a ‘gap’ in the sequence of unique identifiers. The unique identifier forms part of the event record that is read or ed from the IED. Note: It is no longer possible to clear Event, Fault, Maintenance, and Disturbance Records
4.8
LOGGING OUT
If you have been configuring the IED, you should 'log out'. Do this by going up to the top of the menu tree. When you are at the Column Heading level and you press the Up button, you may be prompted to log out with the following display: DO YOU WANT TO LOG OUT?
You will only be asked this question if your level is higher than the fallback level. If you confirm, the following message is displayed for 2 seconds: LOGGED OUT Access Level <x>
Where x is the current fallback level. If you decide not to log out (i.e. you cancel), the following message is displayed for 2 seconds. CANCELLED Access Level <x>
Where x is the current access level.
490
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 11 - Cyber-Security
5
CYBER-SECURITY SETTINGS
The cyber-security settings are contained in the HMI database under the SECURITY CONFIGURATION. A summary of the relevant settings is shown below. Security cells summary Parameter
Cell col row
Default Setting
Interface Applicability
Available Setting
00 02
ASCII 33 to 122
Access Level
00 D0
0 = Read Some, 1 = Read All, All 2 = Read All + Write Some, 3 = Read All + Write All
Yes, Not Settable
Level 1
00 D2
ASCII 33 to 122
All
Yes
Level 2
00 D3
ASCII 33 to 122
All
Yes
Level 3
00 D4
ASCII 33 to 122
All
Yes
Security Feature
00 DF
1
All
Yes, Not Settable
SECURITY CONFIG
25 00
All
Yes
Use Banner
25 01
ACCESS ONLY FOR AUTHORISED S
ASCII 32 to 163
All
Yes
Attempts Limit
25 02
3
0 to 3 step 1
All
Yes
Attempts Timer
25 03
2
1 to 3 step 1
All
Yes
Blocking Timer
25 04
5
1 to 30 step 1
All
Yes
Front Port
25 05
Enabled
0 = Disabled or 1 = Enabled
All
No
Rear Port 1
25 06
Enabled
0 = Disabled or 1 = Enabled
All
No
Rear Port 2
25 07
Enabled
0 = Disabled or 1 = Enabled
All
No
Ethernet Port*
25 08
Enabled
0 = Disabled or 1 = Enabled
All
No
Courier Tunnel*†
25 09
Enabled
0 = Disabled or 1 = Enabled
All
No
IEC61850*†
25 0A
Enabled
0 = Disabled or 1 = Enabled
All
No
DNP3 OE*†
25 0B
Enabled
0 = Disabled or 1 = Enabled
All
No
Attempts Remain
25 11
All
Yes, Not Settable
Blk Time Remain
25 12
All
Yes, Not Settable
All
Yes, Not Settable
Yes
Fallbck PW Level
25 20
Security Code
25 FF
UI Only
No
Evt Unique Id (Normal Extraction)
01 FE
All
No
P14D-B/G/L/Z-TM-EN-1
0
0 = Level 0, 1 = Level 1, 2 = Level 2, 3 = Level 3
All
In Setting file?
491
Chapter 11 - Cyber-Security
Parameter Evt Iface Source ± (Bits 0 – 7 of Event State)
Cell col row
P14D
Default Setting
Interface Applicability
Available Setting
In Setting file?
01 FA
All
No
Evt Access Level ± (Bits 15 – 01 FB 8 of Event State)
All
No
Evt Extra Info 1 ± (Bits 23 – 16 of Event State)
01 FC
All
No
Evt Extra Info 2 ±Ω (Bits 31 – 01 FD 24 of Event State)
All
No
Where: * - These cells will not be present in a non-Ethernet product †- These cells will be invisible if the Ethernet port is disabled. ± - These cells invisible if event is not a Security event Ω – This cell is invisible in current phase as it does not contain any data. It is reserved for future use.
492
P14D-B/G/L/Z-TM-EN-1
SETTINGS APPLICATION SOFTWARE CHAPTER 12
Chapter 12 - Settings Application Software
494
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 12 - Settings Application Software
CHAPTER OVERVIEW
The settings application software used in this range of IEDs is called MiCOM S1 Agile. It is a collection of software tools, which is used for managing all aspects of the IEDs. This chapter provides a brief description of each software tool. Further information is available in the Help system. This chapter contains the following sections: Chapter Overview Introduction Interface Getting Started PSL Editor IEC 61850 IED Configurator DNP3 Configurator Curve Tool S&R Courier AEDR2 WinAEDR2 Wavewin Device (Menu) Text Editor
495 496 497 499 502 510 527 529 535 537 544 545 547
P14D-B/G/L/Z-TM-EN-1
495
Chapter 12 - Settings Application Software
2
P14D
INTRODUCTION
This software allows you to edit device settings and commands for Alstom Grid's range of IEDs. It is compatible with Windows XP, Windows Vista and Windows 7 operating systems. It also enables you to manage the MiCOM devices in your system. You can build a list of devices and organise them in the same way as they physically exist in a system. Parameters can be created and ed for each device, and devices can be supervised directly. It also includes a Product Selector tool. This is an interactive product catalogue, which makes it easier to choose the right device for each application.
496
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
3
INTERFACE
3.1
TILE STRUCTURE P74x File Merger
Dynamic Synoptic Distibuted Busbar Tools
P746 Remote HMI Tool Menu Text Editor Open File View, Change and Save Settings
PSL File
GOOSE Editor
Select IED
Auxiliary & Test Devices
Events File
Settings File Conversion
DNP3.0 Settings File
MCL 61850 File
Disturbance Record File
Bay Template Configurator Files
Px40/K/L Px20 (Courier)
Open File MCL61850 File Open File Open File
Events File
Open File
Quick Connect
WinAEDR2
Disturbance Record File
Settings File Open File
System Explorer Disturbance Record Viewer
Ethernet Configuration
Import System Importing SCL Wavewin
IEC 61850 IED Configurator
Px20, K-Series to Rapide Settings Conversion Tool
Export System Open System
S1 Agile
AEDR2
Settings File conversion
Delete System
Device Configuration
Px30, Px30C, CX30, PG88, PG89
Log Record File S&R Modbus Tool
New System Smart Grid
Px10, Px20, PX20C, M720, Modulex
Settings File
Disturbance Recording and Monitoring
Phasor Terminal
S&R-103 Tool
Bay Template Configurator (BTC)
Measurement Centres
Px20, K Series to Agile Settings Convertor
Select IED
Motor Protection Generator Protection
Open File Settings File
Open File
Transducers Product Selector
Overcurrent & Voltage Feeder Protection
View, Change and Save Settings
IEC 61850 IED Configurator
Phase Comparison Protection
Phasor Measurement & GPS
UCA2 GOOSE File
Disturbance Record File
Autoreclose & Breaker Fail
Busbar Protection
PSL Editor
Device Text File
Line & Cable Differential
Transformer Protection
S&R Courier Tool
Centralised Busbar Tools
Distance Protection
Advanced Feeder Management
Switch Manager
PRP Configurator
RSTP Configurator
Open File
V01800
Figure 138: Tile structure
P14D-B/G/L/Z-TM-EN-1
497
Chapter 12 - Settings Application Software
3.2
P14D
MENU STRUCTURE MCL 61850 File
PSL File Px40
BTC File Px30
Settings File
Settings File Events File
Device Text File Px40
DNP3 File Px40
Open Default File
UCA2 GOOSE file Px40
Close System New System
Disturbance Record File
Px10, Px20, PX20C, M720, Modulex Settings File
Delete System
Compact System
Px40/K/L Px20 (Courier)
Open System Export System
Log Record File
Open File Import System
MCL 61850 File
Bay Template Configurator File
File
Import SCL
Disturbance Record File
Settings File
Recent Systems
UCA2 GOOSE File
S1 Studio Exit
Search Results
Preferences
Px30, Px30C, CX30, PG88, PG89
Start Page View
Device Text File
Options
Properties
Language
System Explorer
DNP3.0 settings File
Help
PSL File Events File
Disturbance Record File
Print IEC 61850 IED Configurator
Print Print Prieview
PSL Editor Px40
MCL 61850 File
Page Setup DR Viewer: Wavewin
Text Editor Tools S&R Courier
Device Text Editor Px40
V01804
Figure 139: Menu structure
498
P14D-B/G/L/Z-TM-EN-1
P14D
4
Chapter 12 - Settings Application Software
GETTING STARTED
Start Start Data Model Manager data models Start S1 Agile
Click System Explorer tile then New System tile or Open System tile From menu bar Select View > System Explorer In System Explorer pane, right click system and add Substation, Voltage Level, Bay, and Device Right click Device Connections subfolder to create new connections
Yes
Open system
Offline Open system or open file? Open file
Click Device Configuration tile then Px40 tile
Select tile depending on file type: settings, PSL, 61850, DNP3, disturbance record, Courier, UCA2 GOOSE or events
Right click Device type subfolders to view properties and add or extract files
Online Connect correct cable between PC and IED front . Click Quick Connect tile Open system or create new system Select IED type
Need new connections? No
Online or offline?
Open existing file or Open default file
Edit and Save
Select front, rear or Ethernet port Check connection parameters then click Finish
No Setting complete? Yes Stop
V01802
Figure 140: Flowchart showing how S1 Agile can be used to set up and save a protection system offline or online.
P14D-B/G/L/Z-TM-EN-1
499
Chapter 12 - Settings Application Software
4.1
P14D
QUICK SYSTEM GUIDE
You can create a system to mimic your real world system of devices. A system provides a root node in the System Explorer from which all subsequent nodes are created. You can add substations, bays, voltage levels and devices to the system. You can either Create a new system or Open an existing system. If there is no default system, use Quick Connect to automatically create one. If a system is no longer needed, right-click it and select Delete to permanently delete it. Systems are not opened automatically. To change this, select Options > Preferences then check the checkbox Reopen last System at start-up.
4.2 1. 2.
4.3 1. 2. 3. 4.
4.4 1. 2. 3. 4. 5.
4.5 1. 2. 3. 4. 5.
4.6
DATA MODELS Close S1 Agile and run the Data Model Manager. Follow the on-screen instructions.
SET UP A SYSTEM Click the System Explorer tile then the New System tile or Open System tile. From the menu bar select View > System Explorer. In the System Explorer pane, right click System and select New Substation, New Voltage Level, New Bay, and New Device. Right-click the Device subfolders to view properties and add or extract files.
CONNECTING TO AN IED FRONT PORT Connect the cable between the PC and IED. From the main screen, click Quick Connect. Select the product range. Select connection to the Front Port. Set the connection parameters and click Finish.
CONNECTING TO AN IED IN A SYSTEM Make sure that the correct serial rear port or Ethernet cables are in place. From the main screen, click Quick Connect. Select the product range. Select connection to the Rear Port or Ethernet Port. Set the connection parameters and click Finish.
SEND SETTINGS TO A DEVICE
To send settings to a device there must be at least one setting file in a settings folder for a device. 1. 2. 3.
500
Right-click the device name in System Explorer and select Send. In the Send To dialog select the setting files and click Send. Click Close to close the Send To dialog.
P14D-B/G/L/Z-TM-EN-1
P14D
4.7 1. 2. 3.
4.8 1. 2. 3.
Chapter 12 - Settings Application Software
EXTRACT SETTINGS FROM A DEVICE Using System Explorer, find the device. Right-click the device's Settings folder and select Extract Settings or Extract Full Settings. Once the settings file is retrieved, click Close.
EXTRACT A PSL FILE FROM A DEVICE Using System Explorer, find the Px4x device. Right-click the device's PSL folder and select Extract. Once the file is retrieved, click Close.
Note: If you extract a PSL file from a device that does not store the position information of the PSL scheme elements, the layout of the scheme may not be the same as originally drawn. Also the Original and Logic Only CRC values may not match the original scheme. However, the scheme will be logically correct.
4.9 1. 2. 3.
4.10 1. 2. 3.
4.11 1. 2. 3. 4. 5. 6.
EXTRACT A DNP3 FILE FROM A DEVICE Using System Explorer, find the device. Right-click the device's DNP3 folder and select Extract. Once the file is retrieved, click Close.
EXTRACT AN EVENTS FILE FROM A DEVICE Using System Explorer, find the device. Right-click the device's Events folder and select Extract Events. Once the file is retrieved, click Close.
EXTRACT A DISTURBANCE RECORD FROM A DEVICE Using System Explorer, find the device. Right-click the device's Disturbance Records folder and select Extract Disturbances. Select a disturbance record to extract. Choose a COMTRADE format, 1991 or 2001. Click Extract or Save. Save leaves the record in the device, Extract deletes it. Once the disturbance records file is retrieved, click Close.
P14D-B/G/L/Z-TM-EN-1
501
Chapter 12 - Settings Application Software
5
P14D
PSL EDITOR
The Programmable Scheme Logic (PSL) is a module of programmable logic gates and timers in the IED, which can be used to create customised internal logic. This is done by mapping the IED's digital inputs, combining these inputs with internally generated digital signals using logic gates and timers, and mapping the resultant signals to the IED's digital outputs and LEDs. The Programmable Scheme Logic (PSL) Editor allows you to create and edit scheme logic diagrams to suit your own particular application. Before a scheme logic diagram can be created, the Editor must have a ‘template’ configuration that allows it to determine various IED-specific parameters such as the number of opto-inputs and output relays, as well as signal names and types. Because there are many different product variants, it is not possible for the Editor to provide a common default scheme. Instead, you need to load a configuration from a file. The PSL uses the concept of a digital data bus (DDB). The DDB is a parallel data bus containing all of the digital signals (inputs, outputs, and internal signals), which are available for use in the PSL. The PSL's software logic gates and timers can be used to combine and condition the DDB signals. The logic gates can be programmed to perform a range of different logic functions and can accept any number of inputs. The timers are used either to create a programmable delay or to condition the logic outputs. Inputs to the PSL include: ● ● ● ●
Optically-isolated digital inputs (opto-inputs) IEC 61850 GOOSE inputs Control inputs Function keys
Outputs from the PSL include: ● ● ● ●
Relay outputs LEDs IEC 61850 GOOSE outputs Trigger signals
Internal signals include: ● Inputs to the PSL originating from internal functions. These are signals generated within the device and can be used to affect the operation of the scheme logic. ● Outputs from the PSL. These are signals that can be driven from the PSL to activate specific functions. An example of an internal input and output are: ● I>1 Trip. This is an output from the Stage 1 overcurrent protection function, which can be input into the PSL to create further functionality. This is therefore a PSL input. ● V>1 Trip. This is an output from the overvoltage protection function, which can be input into the PSL to create further functionality. This is therefore a PSL input. ● Reset Relays/LED. This is a PSL output, which can be asserted to reset the output relays and LEDs. The PSL logic is event driven. Only the part of the PSL logic that is affected by the particular input change that has occurred is processed. This reduces the amount of processing time used by the PSL when compared to some competition devices. The PSL editor lets you: ● Start a new PSL diagram ● Extract a PSL file from an IED
502
P14D-B/G/L/Z-TM-EN-1
P14D
● ● ● ● ● ● ● ●
Chapter 12 - Settings Application Software
a PSL file to an IED Open a diagram from a PSL file Add logic components to a PSL file Move components in a PSL file Edit links in a PSL file Add links to a PSL file Highlight a path in a PSL file Use a conditioner output to control logic
● Print PSL files For further information on the PSL editor, see the online help built into the settings application software.
5.1
LOADING SCHEMES FROM FILES
The product is shipped with default scheme files. These can be used as a starting point for changes to a scheme. To create a new blank scheme, select File > New > 'Blank scheme... to open the default file for the appropriate IED. This deletes the diagram components from the default file to leave an empty diagram but with the correct configuration information loaded.
5.2
PSL EDITOR TOOLBAR
There are a number of toolbars available to help with navigating and editing the PSL. Toolbar
Description Standard tools: For file management and printing. Alignment tools: To snap logic elements into horizontally or vertically aligned groupings. Drawing tools : To add text comments and other annotations, for easier reading of PSL schemes. Nudge tools: To move logic elements. Rotation tools: Tools to spin, mirror and flip. Structure tools: To change the stacking order of logic components. Zoom and pan tools: For scaling the displayed screen size, viewing the entire PSL, or zooming to a selection.
5.2.1
LOGIC SYMBOLS
The logic symbol toolbar provides icons to place each type of logic element into the scheme diagram. Not all elements are available in all devices. Icons are only displayed for elements available in the selected device. Function
Symbol Link
P14D-B/G/L/Z-TM-EN-1
Explanation Create a link between two logic symbols.
503
Chapter 12 - Settings Application Software
Symbol
5.3 1. 2. 3.
Function
P14D
Explanation
Opto Signal
Create an opto-input signal.
Input Signal
Create an input signal.
Output Signal
Create an output signal.
GOOSE In
Create an input signal to logic to receive a GOOSE message transmitted from another IED. Used in either UCA2.0 or IEC 61850 GOOSE applications only.
GOOSE Out
Create an output signal from logic to transmit a GOOSE message to another IED. Used in either UCA2.0 or IEC 61850 GOOSE applications only.
Control In
Create an input signal to logic that can be operated from an external command.
InterMiCOM In
Create an input signal to logic to receive an InterMiCOM command transmitted from another IED.
InterMiCOM Out
Create an output signal from logic to transmit an InterMiCOM command to another IED.
Function Key
Create a function key input signal.
Trigger Signal
Create a fault record trigger.
LED Signal
Create an LED input signal that repeats the status of tri-colour LED.
Signal
Create a signal.
LED Conditioner
Create an LED conditioner.
Conditioner
Create a conditioner.
Timer
Create a timer.
AND Gate
Create an AND Gate.
OR Gate
Create an OR Gate.
Programmable Gate
Create a programmable gate.
LOGIC SIGNAL PROPERTIES Use the logic toolbar to select logic signals. This is enabled by default but to hide or show it, select View > Logic Toolbar. Zoom in or out of a logic diagram using the toolbar icon or select View > Zoom Percent. Right-click any logic signal and a context-sensitive menu appears.
Certain logic elements show the Properties option. If you select this, a Component Properties window appears. The contents of this window and the signals listed will vary according to the logic symbol selected. The actual DDB numbers are dependent on the model.
504
P14D-B/G/L/Z-TM-EN-1
P14D
5.3.1
Chapter 12 - Settings Application Software
LINK PROPERTIES
Links form the logical link between the output of a signal, gate or condition and the input to any element. Any link connected to the input of a gate can be inverted. To do this: 1. Right-click the input 2. Select Properties…. The Link Properties window appears. 3. Check the box to invert the link. Or uncheck for a non-inverted link An inverted link is shown with a small circle on the input to a gate. A link must be connected to the input of a gate to be inverted. Links can only be started from the output of a signal, gate, or conditioner, and must end at an input to any element. Signals can only be an input or an output. To follow the convention for gates and conditioners, input signals are connected from the left and output signals to the right. The Editor automatically enforces this convention. A link is refused for the following reasons: ● There has been an attempt to connect to a signal that is already driven. The reason for the refusal may not be obvious because the signal symbol may appear elsewhere in the diagram. In this case you can right-click the link and select Highlight to find the other signal. Click anywhere on the diagram to disable the highlight. ● An attempt has been made to repeat a link between two symbols. The reason for the refusal may not be obvious because the existing link may be represented elsewhere in the diagram.
5.3.2
OPTO SIGNAL PROPERTIES Input # DDB #
E02030
Each opto-input can be selected and used for programming in PSL. Activation of the opto-input drives an associated DDB signal.
5.3.3
INPUT SIGNAL PROPERTIES NIC Link Fail # DDB #
E02031
IED logic functions provide logic output signals that can be used for programming in PSL. Depending on the IED functionality, operation of an active IED function drives an associated DDB signal in PSL.
5.3.4
OUTPUT SIGNAL PROPERTIES Inhibit VTS DDB #
E02032
Logic functions provide logic input signals that can be used for programming in PSL. Depending on the functionality of the output relay, when the output signal is activated, it drives an associated DDB signal in PSL. This causes an associated response to the function of the output relay.
5.3.5
GOOSE INPUT SIGNAL PROPERTIES Virtual Input # DDB #
E02033
P14D-B/G/L/Z-TM-EN-1
505
Chapter 12 - Settings Application Software
P14D
The Programmable Scheme Logic interfaces with the GOOSE Scheme Logic through 32 Virtual Inputs. The Virtual Inputs can be used in much the same way as the opto-input signals. The logic that drives each of the Virtual Inputs is contained in the GOOSE Scheme Logic file. You can map any number of bit-pairs from any subscribed device using logic gates onto a Virtual Input.
5.3.6
GOOSE OUTPUT SIGNAL PROPERTIES Virtual Output # DDB #
E02034
The Programmable Scheme Logic interfaces with the GOOSE Scheme Logic through 32 Virtual Outputs. You can map Virtual Outputs to bit-pairs for transmitting to any subscribed devices.
5.3.7
CONTROL INPUT SIGNAL PROPERTIES Control Input # DDB #
E02035
There are 32 control inputs which can be activated using the menu, the hotkeys or through courier communications. Depending on the programmed setting that is latched or pulsed, when a control input is operated an associated DDB signal is activated in PSL.
5.3.8
INTERMICOM INPUT PROPERTIES IM64 Ch # Input # DDB #
E02036
There are 16 InterMiCOM inputs that can be used for teleprotection and remote commands. InterMiCOM In is a signal which is received from the remote end. It can be mapped to a selected output relay or logic input. IED End B Clear Statistics DDB #
E02037
At end B, InterMiCOM Input 1 is mapped to the command Clear Statistics.
5.3.9
INTERMICOM OUTPUT PROPERTIES IM64 Ch # Output # DDB #
E02038
There are 16 InterMiCOM outputs that can be used for teleprotection and remote commands. InterMiCOM Out is a send command to a remote end that can be mapped to any logic output or opto-input. This is transmitted to the remote end as a corresponding InterMiCOM In command. IED End A Clear Stats command DDB #
E02039
At end A, InterMiCOM Output 1 is mapped to the command indication Clear Statistics issued at end A.
506
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
5.3.10
FUNCTION KEY PROPERTIES Function Key # DDB #
E02040
Each function key can be selected and used for programming in PSL. Activation of the function key drives an associated DDB signal. The DDB signal remains active according to the programmed setting (toggled or normal). Toggled mode means the DDB signal remains in the new state until the function key is pressed again. In Normal mode, the DDB is only active while the key is pressed.
5.3.11
FAULT RECORDER TRIGGER PROPERTIES Fault REC TRIG DDB #
E02041
The fault recording facility can be activated by driving the fault recorder trigger DDB signal.
5.3.12
LED SIGNAL PROPERTIES LED # DDB #
E02042
All programmable LEDs drive associated DDB signals when the LED is activated.
5.3.13
SIGNAL PROPERTIES Output # DDB #
E02043
All output relay s drive associated DDB signal when the output is activated.
5.3.14
LED CONDITIONER PROPERTIES 1
Non Latching
Non Latching 1
1
Non Latching
FnKey LED1 Red DDB #
Red LED
FnKey LEDGm DDB #
FnKey LED1 Red DDB #1040 FnKey LEDGm DDB #
FnKey LED1 Red DDB #1040 FnKey LEDGm DDB #
Green LED
Yellow LED
E02044
Figure 141: Examples of how to set Red, Green and Yellow LEDs
P14D-B/G/L/Z-TM-EN-1
507
Chapter 12 - Settings Application Software
P14D
To set LED conditioner properties, 1. 2. 3. 4. 5. 6.
Select the LED name from the list (only shown when inserting a new symbol). Configure the LED output to be Red, Yellow or Green. Configure a Green LED by driving the Green DDB input. Configure a RED LED by driving the RED DDB input. Configure a Yellow LED by driving the RED and GREEN DDB inputs simultaneously. Configure the LED output to be latching or non-latching.
5.3.15
CONDITIONER PROPERTIES
Each can be conditioned with an associated timer that can be selected for pick up, drop off, dwell, pulse, pick-up/drop-off, straight-through, or latching operation. Straight-through means it is not conditioned at all whereas Latching is used to create a sealed-in or lockout type function. To set properties, 1. 2. 3.
Select the name from the Name list (only shown when inserting a new symbol). Choose the conditioner type required in the Mode tick list. Set the Pick-up Value (in milliseconds), if required.
4.
Set the Drop-off Value (in milliseconds), if required.
5.3.16
TIMER PROPERTIES
Each timer can be selected for pick-up, drop-off, dwell, pulse or pick-up/drop-off operation. To set timer properties, 1. 2. 3. 4.
From the Timer Mode tick list, choose the mode. Set the Pick-up Value (in milliseconds), if required. Set the Drop-off Value (in milliseconds), if required. Click OK.
5.3.17
GATE PROPERTIES
A gate can be an AND, OR, or programmable gate. ● An AND Gate requires that all inputs are TRUE for the output to be TRUE. ● An OR Gate requires that one or more input is TRUE for the output to be TRUE. ● A Programmable Gate requires that the number of inputs that are TRUE is equal to or greater than its Inputs to Trigger setting for the output to be TRUE. To set gate properties, 1. 2. 3. 4.
Select the gate type: AND Gate, OR Gate, or Programmable Gate. If you select Programmable Gate, set the number of Inputs to Trigger. If you want the output of the gate to be inverted, check the Invert Output check box. An inverted output appears as a "bubble" on the gate output. Click OK.
5.3.18
SR PROGRAMMABLE GATE PROPERTIES
A Programmable SR gate can be selected to operate with the following three latch properties:
508
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
Set
Q0 (Previous Output State)
Reset
Q1 Reset Dominant
Q1 Set Dominant
Q1 No Dominance
0
0
0
0
0
0
0
0
1
1
1
1
0
1
1
0
0
0
0
1
0
0
0
0
1
1
0
1
0
0
1
1
1
1
0
1
1
0
1
1
1
1
1
0
0
1
1
1
Q0 is the previous output state of the latch before the inputs change. Q1 is the output of the latch after the inputs change. The Set dominant latch ignores the Reset if the Set is on. The Reset Dominant latch ignores the Set if the Reset is on. When both Set and Reset are on, the output of the non-dominant latch depends on its previous output Q0. Therefore if Set and Reset are energised simultaneously, the output state does not change. Note: Use a set or reset dominant latch. Do not use a non-dominant latch unless this type of operation is required.
SR latch properties In the Component Properties dialog, you can select S-R latches as Standard (no input dominant), Set input dominant or Reset input dominant. If you want the output to be inverted, check the Invert Output check box. An inverted output appears as a "bubble" on the gate output.
P14D-B/G/L/Z-TM-EN-1
509
Chapter 12 - Settings Application Software
6
P14D
IEC 61850 IED CONFIGURATOR
IEC 61850 is a substation communications standard. It standardizes the way data is transferred to and from IEC 61850 compliant IEDs, making the communication independent of the manufacturer. This makes it easier to connect different manufacturers’ products together and simplifies wiring and network changes. The IEC 61850 IED Configurator tool is used to configure the IEC 61850 settings of MiCOM IEDs, not the protection settings. It also allows you to extract a configuration file so you can view, check and modify the IEC 61850 settings during precommissioning.
6.1
IEC 61850 IED CONFIGURATOR TOOL FEATURES
The IEC 61850 IED configurator allows you to: ● ● ● ● ● ● ●
●
● ● ●
6.2
Configure basic IEC 61850 communication parameters of the IED. Configure IED time synchronisation using SNTP. Define datasets for inclusion in report and GOOSE control blocks. Configure GOOSE control blocks for publishing (outgoing) messages. Configure virtual inputs, mapping them onto subscribed (incoming) GOOSE messages. Configure report control blocks. Configure the operation of control objects (circuit breaker trip and close): ▪ The control mode (such as Direct, Select Before Operate) ▪ Uniqueness of control (to ensure only one control in the system can operate at any one time). Configure measurements: ▪ Scaling (multiplier unit such as kA, MV). ▪ Range (minimum and maximum measurement values). ▪ Deadband (percentage change of measurement range for reporting). Transfer IEC 61850 configuration information to and from an IED. Import SCL files for any IEC 61850 device (including devices from other manufacturers) to simplify configuration of GOOSE messaging between IEDs. Generate SCL files to provide IED configuration data to other manufacturers' tools, allowing them to use published GOOSE Messages and reports.
IEC 61850 IED CONFIGURATOR LANGUAGES
The IEC 61850 IED Configurator uses the following languages. MiCOM Configuration Language (MCL) This is a proprietary language file which contains a MiCOM device's IEC 61850 configuration information. This file is used for transferring data to or from a MiCOM IED. Substation Configuration Language (SCL) This is an XML-based standard language used to configure IEC 61850 IEDs in substations. It allows common substation files to be exchanged between all devices and between different manufacturers' toolsets. This helps to reduce inconsistencies in system configurations. s can specify and provide their own SCL files to ensure that IEDs are configured according to their requirements. SCL also allows IEC 61850 applications to be configured off-line without needing a network connection to the IED. Off-line system development tools can be used to generate the files needed for IED configuration automatically from the power system design. This significantly reduces the cost of IED configuration by eliminating most of the manual configuration tasks.
510
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
SCL specifies a hierarchy of configuration files, which enable the various levels of the system to be described: SSD, SCD, ICD, CID and IID files.
6.3
IEC 61850 SUBSTATION CONFIGURATION FILES
These files all use the standard Substation Configuration Language (SCL). They have the same construction but differ depending on the application. System Specification Description (SSD) This contains the complete specification of a substation automation system including a single line diagram for the substation and its functionalities, or logical nodes. The SSD contains SCD and ICD files. Substation Configuration Description (SCD) This contains information about the substation, all IEDs, data types and communications configuration. When engineering a system from the top down, an SCD file is produced and imported into the IED Configurator. To ensure consistency with the configuration of other IEDs in the system, this SCD file normally should not be edited. If there is no SCD file available, and you need to manually configure a MiCOM IED for precommissioning tests, you can open an ICD file and edit this to suit the IED application. The ICD file can be preinstalled as a template in the IED Configurator and opened directly, or it can be provided separately. IED Capability Description file (ICD) This describes the IED's capabilities, including information on its data model (Logical Devices or Logical Node instances) and GOOSE . The IEC 61850 IED Configurator can be used before commissioning an IED to create a blank configuration ICD file. The IEC 61850 IED Configurator can also extract an ICD file for viewing or modification and error checking a MiCOM IED. Configured IED Description File (CID) or Individual IED Description File (IID) This describes a single IED in the system, including communications parameters.
Figure 142: IEC 61850 project configuration
P14D-B/G/L/Z-TM-EN-1
511
Chapter 12 - Settings Application Software
6.4
P14D
OPENING A PRECONFIGURED SCL FILE
An SCL configuration file contains the information for the MiCOM IED that is to be configured. To open an SCL configuration file for the system 1. Select File > Import SCL. A search dialog box appears. 2. Select the required SCL file and click Open. 3. The SCL Explorer window appears, showing an icon for each IED present in the SCL file. IEDs which can be configured using the IED Configurator are shown in a bold typeface and an icon with a green tick. IEDs which cannot be configured using the IED Configurator are shown with greyed text and an icon with a red X. The left hand side of the window shows information on the SCL file and any selected IED tasks that can be performed on the selected IED(s). Alternatively right-click an IED to list tasks that can be performed on that particular IED.
6.5
OPENING A TEMPLATE ICD FILE
If there is no SCD configuration file available, open an ICD template file for the MiCOM IED type that is to be configured. 1. 2. 3.
6.5.1
Select File > New. The Template window appears. Select the IED model number from the list. The list shows information about the IED's associated ICD template file, the SCL header details and the IEC 61850 features ed by the IED. Use the Model Number filter at the top of the window to filter product variants.
TEMPLATE INSTALLED FOR REQUIRED IED TYPE
If you can find the IED type or ICD template, highlight it and click the Select button. The configuration opens in manual editing mode so it can be customised for the application.
6.5.2 1. 2. 3. 4. 5. 6. 7.
6.6 1. 2.
512
TEMPLATE NOT INSTALLED FOR REQUIRED IED TYPE If there is no installed ICD file for the IED type that is to be configured, but there is one available from your supplier, click Browse for External. A search dialog box appears. When you have found the required ICD file, click Open. If the selected ICD Template file is already available as an installed template, a message appears and a new IED Configuration is created from the installed file. If the selected ICD Template file has additional ed model numbers, a message appears asking if the additional model numbers should be merged into the installed template. Select Yes to merge the new model numbers into the installed ICD Template file. This makes it available the next time the Template window appears. If the selected ICD Template file is not installed, a message asks if it should be added to the application template library. Select Yes to copy the selected ICD template file into the application library. This makes it available the next time the Template window appears.
OPENING AN EXISTING MCL CONFIGURATION FILE Select File > Open. A search dialog box appears. Select the required MCL file and click Open.
P14D-B/G/L/Z-TM-EN-1
P14D
3. 4.
5.
6.7
Chapter 12 - Settings Application Software
The IED Configurator tool tries to automatically match the MCL data to an installed ICD Template file and then display the configuration data in a read-only mode. If it cannot automatically match the MCL data to an ICD Template file, the Template window appears. This allows you to manually assign the MCL data to an ICD Template file. If there is no suitable template available, click Cancel. A message asks if the configuration is to be opened with Restricted Editing. Select Yes to display the configuration data in a read-only mode.
CONFIGURING A MICOM IED
Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click TEMPLATE to expand it. Or working online: 1. 2. 3.
Select Device > Manage IED. Select the IED type and click Next. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view.
The aspects of a MiCOM IED that can be configured come from its ICD Template file. These are shown in the main area of the IED Configurator tool, in the left hand side of the Editor window. The right hand side of the Editor window shows the configuration page of the selected category. Each configurable item of the MiCOM IED is categorised into one of the following groups in the Editor window. IED Details Displays general configuration and data about the IED and the selected ICD template file. Communications Displays configuration of the communications Subnetwork. SNTP Displays configuration of the client/server SNTP time synchronisation. Dataset Definitions Displays dataset definitions used by the IED's GOOSE and report control blocks. GOOSE Publishing Displays configuration for the GOOSE control blocks and associated messages to be published. GOOSE Subscribing Displays configuration of virtual inputs that are subscribed to published GOOSE messages. Report Control Blocks Displays configuration for the report control blocks in the IED data model. Controls Displays configuration of control objects and uniqueness of control parameters (for larger control systems). Measurements Displays configuration of measurement objects in the IED data model. Configurable Data Attributes Displays parameter values for the configurable data attributes in the IED data model. Each configurable item is either read-only or editable in manual mode. If it is read-only it is always noneditable. If it is editable in manual mode, some items may not be configurable if opened from a configured SCL file. If a configured SCL file or MCL file was opened, and it is necessary to edit the configuration, select View > Enter Manual Editing Mode or click the toolbar icon. If an ICD file is opened, these items are automatically displayed in manual editing mode.
P14D-B/G/L/Z-TM-EN-1
513
Chapter 12 - Settings Application Software
6.8
P14D
READING OR EDITING IED DETAILS
Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the IED Details item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the IED Details tab to show more information and edit the settings.
The following IED details can be edited. SCL File ID The identification name, taken from the header section of an SCL file. Editable in Manual Editing Mode. SCL File Version The version number, taken from the header section of an SCL file. Editable in Manual Editing Mode. Name The IED name, taken from the IED section of an SCL file. This should be unique for all IEDs on the IEC 61850 network and is an Object Reference type so can be up to 65 characters long. However, it is recommended to restrict IED names to 8 characters or less. Editable in Manual Editing Mode. ICD Template The ICD Template filename associated with the device's IEC 61850 configuration (MCL data). Read-only. Description A basic description of the MiCOM IED type. It is taken from the IED section of the ICD template file and is not stored in MCL data or sent to the MiCOM IED. Read-only. Type The MiCOM IED type. It is taken from the IED section of the ICD template file and is not stored in MCL data or sent to the MiCOM IED. Read-only. Configuration Revision The software version of the target MiCOM IED. It is taken from the IED section of the ICD template file and is not stored in MCL data or sent to the MiCOM IED. Read-only. ed Models The specific MiCOM IED models ed by the ICD template file. If an ICD file is opened, these models are ed directly. If a configured SCL file is opened, these models are derived from the ICD file which is used to create a configured SCL file. It is not stored in MCL data nor sent to the MiCOM IED. Read-only.
6.9
COMMUNICATIONS SETUP
Before the IEC 61850 IED Configurator tool can manage an IED's configuration, you must first configure the communication parameters. Select Tools > Options, then select the tab according to the protocol used. IEC 870-5-103 Communications tab. Communication is through a serial connection from a COM port of the PC to the front port of the IED. If ed by the IED, you can also use the rear port. The Ethernet connection is not used, because the MiCOM IED does not have an IP address until it has been configured. This is also used for Px30 products. Courier Communications tab. Communication is through a serial connection from a COM port of the PC to the front port of the IED. If ed by the IED, you can also use the rear port. The Ethernet connection is
514
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
not used, because the MiCOM IED does not have an IP address until it has been configured. This is typically used for Px40 products. 1.
In the Default Configurations field, if using the front port, select MiCOM P*40 Front Port (COM *), if using the rear port, select Courier (COM *). 2. Set the Connection Values and Transaction Parameters as required or leave them at the default values. 3. Click OK. FTP communications tab. Communication is over Ethernet to the FTP server of a MiCOM IED. The IP Address settings for both the PC and MiCOM IED must be for the same SubNetwork, especially if a direct connection is used with a cross-over network lead. If there is no valid or active IEC 61850 configuration in the IED, configure a default IP Address for the IED. This is also used for Mx70 products.
6.10
EDITING COMMUNICATIONS SETTINGS
Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the Communications item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the Communications tab to read and edit the settings.
The following communications settings can be edited. Connected Subnetwork This is the subnetwork name to which the IED is connected. It is particularly important for subscribing to GOOSE messages because an IED can only subscribe to publishers that are connected to the same subnetwork. The subnetwork name is taken from the Communications section of an SCL file. Normally editable in Manual Editing Mode, except if opened from a configured SCL file. Access Point The Access Point (physical port) name for the MiCOM IED. This is taken from the IED Access Point section of the ICD template file. It is not stored in MCL data or sent to the MiCOM IED. Read-only. IP Address Used to configure the unique network IP address of the MiCOM IED. It is taken from the ConnectedAP Address section of the configured SCL file. Editable in Manual Editing Mode. SubNet Mask Used to configure the IP subnet mask for the network to which the MiCOM IED will be connected. It is taken from the ConnectedAP Address section of the configured SCL file. Editable in Manual Editing Mode. Gateway Address Used to configure the IP address of any gateway (proxy) device, to which the MiCOM IED is connected. It is taken from the ConnectedAP Address section of the configured SCL file. If there is no gateway (proxy) in the system, leave this at its default unconfigured value of 0.0.0.0. Editable in Manual Editing Mode. Default Media Used to set whether a copper or fibre optic Ethernet interface is used for communication between clients and peers, and the MiCOM IED. It is taken from the ConnectedAP/PhysConn section of the configured SCL file. Editable in Manual Editing Mode. T Keepalive Used to set the frequency at which the MiCOM IED sends a T Keepalive message to keep open an association with a connected client. This setting is not taken from SCL. It is specific to MCL with a setting range of 1 to 20 seconds. Editable in Manual Editing Mode.
P14D-B/G/L/Z-TM-EN-1
515
Chapter 12 - Settings Application Software
P14D
Database Lock Timeout Used to set how long the MiCOM IED waits without receiving any messages on the active link before it reverts to its default state. This includes resetting any access that was enabled. It is taken from the IED/AccessPoint/Server section of the configured SCL file and has a valid setting range of 60 to 1800 seconds (1 to 30 minutes). Only applicable to MiCOM IEDs that setting changes over IEC 61850. Editable in Manual Editing Mode.
6.11
SIMPLE NETWORK TIME PROTOCOL (SNTP)
Simple Network Time Protocol (SNTP) is used to synchronize the clocks of computer systems over packetswitched, variable-latency data networks, such as IP. A jitter buffer is used to reduce the effects of variable latency introduced by queuing, ensuring a continuous data stream over the network. SNTP is ed by both the IED and the switch in the redundant Ethernet board. Both the IED and the redundant Ethernet board have their own IP address. Using the IP address of each device it can be synchronised to the SNTP server. For the IED this is done by entering the IP address of the SNTP server into the IED using the IEC 61850 IED Configurator software. For the redundant Ethernet board, this is done depending on the redundant Ethernet protocol being used. For PRP use the PRP Configurator. For RSTP use the RSTP Configurator. For SHP and DHP use Switch Manager.
6.11.1
CONFIGURING SNTP IN THE IED
These settings allow you to configure a MiCOM IED for SNTP. Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the SNTP item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the SNTP tab. Expand the tab and select General Config (configuring the IED for SNTP).
The following settings can be edited. Poll Rate Use this to configure the interval at which the MiCOM IED requests time synchronisation from the selected SNTP server(s). This setting is not taken from SCL. It is specific to MCL with a setting range of 64 to 1024 seconds and is editable in Manual Editing Mode. Accepted Stratum level SNTP uses a hierarchical system of clock sources. Each level is known as a stratum and is assigned a layer number starting with zero at the top, which is the reference time signal. The Accepted Stratum level setting specifies the stratum range for all configured SNTP servers. It defines the range MiCOM IEDs need to be able to accept time synchronisation responses. Any server response outside the specified range is discarded. You cannot edit this setting. Time server This configures whether or not the IED acts as a time server in the system. If this option is enabled, other devices can synchronise their clocks to this IED. The value for this setting is taken from the IED/AccessPoint section of the configured SCL file. This setting is editable in Manual Editing Mode.
516
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
6.11.2
CONFIGURING THE SNTP SERVER
These settings allow you to configure external SNTP time servers with which the IED tries to synchronise its clock and connect. Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the SNTP item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the SNTP tab. Expand the tab and select External Server (configuring external SNTP time servers to which the IED connects).
The following details can be edited. Server Name If opened from a configured SCL file, this shows the name of the device with which the MiCOM IED attempts to synchronise its clock. If you need to change the device, click the drop-down list to see all time-server devices in the configured SCL file. This is Read-only, is not stored in MCL data and is not sent to the MiCOM IED. Access Point If opened from a configured SCL file, this shows the connected Access Point of the device with which the MiCOM IED attempts to synchronise its clock. This is Read-only, is not stored in MCL data and is not sent to the MiCOM IED. Sub Network Name If opened from a configured SCL file, this shows the Sub Network name with which the device is connected. This is Read-only, is not stored in MCL data and is not sent to the MiCOM IED. IP Address This is the IP Address of the device that provides SNTP Time synchronisation services. Devices are assigned to SNTP servers based on the contents of a configured SCL file. The IED/Access Point section of the SCL fil lists devices ing SNTP time synchronisation. This setting is editable in Manual Editing Mode. Use Anycast button This button automatically sets the SNTP Server IP address to the broadcast address of the Sub Network to which the MiCOM IED is connected. Using the SubNet broadcast address forces the IED to use the Anycast SNTP Mode of operation. This button is only enabled when the IED has a valid IP Address and SubNet Mask. This setting is editable in Manual Editing Mode.
6.12
EDITING DATASET DEFINITIONS
To edit a dataset definition, working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the Dataset Definitions item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the Dataset Definitions tab.
P14D-B/G/L/Z-TM-EN-1
517
Chapter 12 - Settings Application Software
P14D
If ed by the IED, datasets can be dynamically defined. 1. 2. 3.
Right-click the Dataset Definitions icon and select Add New Dataset. or on the Dataset Definitions Summary page, in the Task pane, click Add Dataset. Find the dataset to be specified and click Set. A dataset can be created in any logical node of the IED's data model. The Dataset Definition appears listing Name, Location, Contents and GOOSE Capacity.
The following settings can be edited. Name The name of the dataset. This value is derived from the Dataset section of the selected logical node location in the configured SCL file. The initial character must be an alphabetic character (a-z, A-Z) while the remainder of the name can be either alphanumeric or the underscore symbol. The dataset name must be unique in the logical node where it is contained. Editable in Manual Editing Mode. Location The location of the dataset in the IED data model. The location is always read-only. To change the read-only status, click >>. Specify a new location for the dataset. Editable in Manual Editing Mode. Contents This shows the Functionally Constrained Data Attributes (FCDA) contained in the dataset. The ordering of these FCDA items in this list shows how values are seen over MMS communications. Using the following icons on the toolbar, FCDA items can be moved around, deleted or added. Toolbar Icon
Definition
Up & down arrows icon
These toolbar buttons move the selected FCDA up and down in the dataset definition.
Plus symbol
This toolbar button launches a dialog that allows you to select multiple FCDA items which can be added to the dataset definition. Items that can be selected have an outline tick symbol. Items that have been selected have a green tick symbol and are shown in the selection summary at the bottom of the dialog.
Minus symbol
This toolbar button removes the selected FCDA items from the dataset definition.
Square dot icon
For convenience a dataset can be defined from a ed Functional Constraint. This toolbar button expands the selected Functional Constraint into a list of Data Objects it contains. A dataset cannot contain both Data Objects and a Functional Constraint.
Rotating arrows icon
If the dataset is assigned to one or more control blocks (GOOSE), clicking this toolbar button automatically increments each control block's Configuration Revision. The Configuration Revision is used to identify changes to data, therefore this toolbar button is only enabled when the dataset definition is modified. If you change the selected configuration page and this toolbar button is enabled, you are asked if associated Configuration Revisions should be updated. Editable in Manual Editing Mode.
GOOSE Capacity. The size (in bytes) of a GOOSE message has an upper restriction. It can not be any larger than the maximum allowable size of an Ethernet frame. This restriction limits the maximum number of items that can be included in a dataset. The GOOSE Capacity gauge shows how large a dataset definition is with respect to GOOSE. If a dataset that is too large for transmission in a GOOSE message is assigned to a GOOSE Control Block, a validation warning appears. Read-only. To delete Dataset definitions, 1. 2.
518
Right-click the dataset definition icon. Select Delete Dataset.
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
or 1. 2.
In the Dataset Definitions Summary page, select a dataset. In the task pane, click Delete Dataset.
To delete every dataset definition in the configuration data, click Delete All Datasets. Any references in GOOSE or Reporting Control Blocks to the deleted dataset remain unchanged. However, a validation warning appears stating that the dataset definition does not exist.
6.13
GOOSE PUBLISHING CONFIGURATION
Working offline: 1. Click the icon New MicOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the GOOSE Publishing item. Or working online: 1. 2. 3.
Select Device > Manage IED, then select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the GOOSE Publishing tab. Then select a GOOSE Control Block (GoCB).
The following details can be edited. Multicast MAC Address Configures the multicast MAC address to that which the GoCB publishes GOOSE messages. The first four octets (01 – 0C – CD – 01) are defined by the IEC 61850 standard; leave these at their default values. The multicast MAC address is taken from the ConnectedAP/GSE section of the configured SCL file. Editable in Manual Editing Mode. Application ID Configures the AppID to that which the GoCB publishes GOOSE messages. The AppID is specified as a hexadecimal value with a setting range of 0 to 3FFF and is taken from the ConnectedAP/GSE section of the configured SCL file. Editable in Manual Editing Mode. VLAN Identifier Configures the VLAN (Virtual LAN) on to which the GOOSE messages are published. The VLAN Identifier has a setting range of 0 to 4095 and is taken from the ConnectedAP/GSE section of the configured SCL file. If no VLAN is used, leave this setting at its default value. Editable in Manual Editing Mode. VLAN Priority Configures the VLAN Priority of published GOOSE messages on the VLAN. The VLAN priority has a setting range of 0 to 7 and is taken from the ConnectedAP/GSE section of the configured SCL file. If no VLAN is used, leave this setting at its default value. Editable in Manual Editing Mode. Minimum Cycle Time Configures the Minimum Cycle Time between the first change-driven message being transmitted and its first repeat retransmission. The Minimum Cycle Time has a setting range of 1 to 50 milliseconds and is taken from the ConnectedAP/GSE/MinTime section of the configured SCL file. Editable in Manual Editing Mode. Maximum Cycle Time Configures the Maximum Cycle Time between repeat message transmissions under a quiescent 'no change' state. The Maximum Cycle Time has a setting range of 1 to 60 seconds and is taken from the ConnectedAP/GSE/MaxTime section of the configured SCL file. Editable in Manual Editing Mode. Increment Determines the rate at which the repeat message transmission intervals step up from the Minimum Cycle Time to the Maximum Cycle Time. The higher the number, the fewer the repeat messages (and therefore time) it takes to reach the Maximum Cycle Time. This setting is not taken from SCL. It is specific to MCL with a setting range of 0 to 999 and has no units. Editable in Manual Editing Mode.
P14D-B/G/L/Z-TM-EN-1
519
Chapter 12 - Settings Application Software
P14D
GOOSE Identifier Configures the 64 character GOOSE Identifier (GoID) of the published GOOSE message that is configured in the SCL file. The initial character must be alphabetic (a to z or A to Z) while the rest of the name can be either alphanumeric or the underscore symbol. The GOOSE Identifier must be unique for the entire system. This setting is taken from the LN0/GSEControl section of the configured SCL file. Editable in Manual Editing Mode. Dataset Reference Configures the dataset which is to be included in the GoCB's published messages. Only datasets that belong to the same logical node as the GoCB can be selected for inclusion in the GOOSE messages. If the dataset definition does not exist or is too large for publishing in a GOOSE message, a warning appears. This setting is taken from the LN0/GSEControl section of the configured SCL file. Right-click the Dataset Reference control to perform the following operations: ● Create and assign a new dataset definition. Only if the current dataset assignment is empty. ● Delete the current dataset assignment. Only if there is an assigned dataset. ● Edit the currently assigned datasets definition. Only if there is an assigned dataset. Editable in Manual Editing Mode. Configuration Revision Displays the Configuration Revision of the published GOOSE message. If the dataset reference or dataset contents are changed, the Configuration Revision must be incremented to allow other peers listening to the published GOOSE messages to identify the change in configuration. This setting has a range of 0 to 4294967295 and is taken from the LN0/GSEControl section of the configured SCL file. Editable in Manual Editing Mode. Any other IED in the system that needs to subscribe to the published GOOSE messages of the MiCOM IEDs must use the same value in its GOOSE subscription configuration.
6.14
GOOSE SUBRICRIPTION CONFIGURATION
Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the GOOSE Subscribing item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the GOOSE Subscribing tab.
Configuration of the GOOSE Subscription depends on whether the IED configuration has been compiled from a configured SCL file, from an MCL file or manually created. GOOSE Subscription is also based on two concepts. Mapped Inputs Applicable in all instances. A Mapped Input is an External Binding between two IEDs that is assigned to a valid Data Attribute in the IED data model (the internal Data Attribute s binding to an external value). For example, on a MiCOM Px40 device, a Mapped Input is an External Binding that has been assigned to a Virtual Input for use in Programmable Scheme Logic. Unmapped Inputs Primarily applicable to configured SCL files. An Unmapped Input is similar to the Mapped Input. It is an External Binding between two IEDs but the binding has not yet been assigned to a ing Data Attribute in the IED data model.
520
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
For example, on a MiCOM Px40 device, an Unmapped Input is an External Binding that has been identified as necessary for the IED configuration but has not yet been assigned to a Virtual Input for use in Programmable Scheme Logic.
6.15
REPORT CONTROL BLOCK CONFIGURATION
Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the Report Control Blocks item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the Report Control Blocks tab. Then select a Report Control Block (RCB).
The following details can be edited. Report Type Displays the type of the selected RCB. Read-only. Report ID Configures the default Report ID of the RCB. Any clients wanting to use the RCB can override this default value if required. The initial character of the Report ID must be alphabetic (a to z or A to Z) while the rest of the name can be either alphanumeric or the underscore symbol. This setting is taken from the LN(0)/ ReportControl section of the required RCB in the configured SCL file. Editable in Manual Editing Mode. Dataset Reference Configures the dataset which is to be included in the generated reports from the RCB. Only datasets that belong to the same logical node as the RCB can be included in the reports. This setting is taken from the LN(0)/ReportControl section of the required RCB in the configured SCL file. Editable in Manual Editing Mode. Configuration Revision Displays the Configuration Revision of the RCB. If there are any changes to dataset reference or dataset contents, the Configuration Revision must be incremented to allow clients receiving the reports to identify the change in configuration. This setting is taken from the LN(0)/ ReportControl section of the required RCB in the configured SCL file. Editable in Manual Editing Mode.
6.16
CONTROLS CONFIGURATION
Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the Control Objects item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the Controls tab.
P14D-B/G/L/Z-TM-EN-1
521
Chapter 12 - Settings Application Software
P14D
The following details can be edited. ● Control Objects is the configuration of each Cotrol Object (Circuit Breaker Trip/Close control) in the IED's data model, for example its Control Model Direct Operate, Select Before Operate. This breaks down into: ▪ ctlModel This configures the control model (ctlModel) of the Control Object to one of the following predefined options and is is taken from the LN(0)/DOI/DAI/Val section of the ctlModel in the configured SCL file. Editable in Manual Editing Mode. Status Only DOns (Direct Operate - Normal Security) SBOns (Select-Before-Operate - Normal Security) DOes (Direct Operate - Enhanced Security) SBOes (Select-Before-Operate - Enhanced Security) ▪ sboTimeout If ed by the Control Object, this configures the Select Before Operate timeout. A client has the configured number of milliseconds to operate the control following the select command. If the Control Object is not operated in this time period, it is reset back to an unselected state. This setting is taken from the LN(0)/DOI/DAI/Val section of sboTimeout in the configured SCL file. Editable in Manual Editing Mode. ● Uniqueness of Control This adds a layer of security onto control operations by allowing only one Control Object to operate at any time in the whole system. Uniqueness of Control checks are performed using GOOSE, making it simple and reliable without any server redundancy.
6.17
EDITING MEASUREMENT CONFIGURATIONS
Working offline: 1. Click the icon New MiCOM Configuration from an Installed ICD File. 2. Double-click the product variant. 3. Double-click the Measurements item. Or working online: 1. 2. 3. 4.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the Measurements tab. Then Select a measurement object.
The following details can be edited. Unit multiplier If ed by the IED, this configures how the measurement value will be scaled when read by or reported to a client. The multiplier is shown in the following table. Value
Multiplier
Name
Symbol
-24
10–24
Yocto
y
-21
10–21
Zepto
z
-18
10–18
Atto
a
-15
10–15
Femto
f
-12
10–12
Pico
p
-9
10–9
Nano
n
-6
10–6
Micro
?
-3
10–3
Milli
m
-2
10–2
Centi
c
522
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
Value
Multiplier
-1
10–1
0
1
1
Name
Symbol
Deci
d
10
Deca
da
2
102
Hecto
h
3
103
Kilo
k
6
106
Mega
M
9
109
Giga
G
12
1012
Tera
T
15
1015
Petra
P
18
1018
Exa
E
21
1021
Zetta
Z
24
1024
Yotta
Y
For example, if the phase A current is 1250 amps and the multiplier is kilo (k), the relay measures 1.250 (kA). Editable in Manual Editing Mode. Scaled Measurement Range Min/Max If ed by the IED, this configures the minimum and maximum values of a measurement object. The min and max values are used with the deadband value to calculate how much a measurement must change to be updated or reported to a client. Editable in Manual Editing Mode. Deadband This configures the deadband, which is a percentage change based on the measurements range in units of 0.001% (giving a range of 0 to 100000). A deadband of 0 means the measurement is updated instantaneously. To simplify the calculation process, click the >> button. Specify the deadband as a percentage change (such as 5%) or as an absolute change (such as 0.1 Hz). Editable in Manual Editing Mode. The deadband can be specified at any level in the Measurements tab. The range, including the multiplier, can only be specified at a level where all measurement objects are of the same type. For example, all phase current measurements.
6.18 1. 2. 3.
EDITING CONFIGURABLE DATA ATTRIBUTES
4.
Select Device > Manage IED. Select the IED type. Select the IED address and click Next. The IED 61850 Configurator tool reads information from the IED and shows them in the Summary view. Click the Configurable Data Attributes tab.
5.
Select a Data Attribute.
The following details can be edited. Data Type This shows the SCL Data type of the Data Attribute. The data type influences the type of control used to represent the Data Attributes value. ● Integer based types use a numeric up-down control to specifiy the value. ● Enumerated types use a combo box to specify the available setting values. ● String types use a text box to allow text entry. Read-only. Value This is the value to assign to the Data Attribute and is taken from the LN(0)/DOI/DAI/Val section of the required Data Attribute in the configured SCL file. Editable in Manual Editing Mode.
P14D-B/G/L/Z-TM-EN-1
523
Chapter 12 - Settings Application Software
6.19
P14D
FULL VALIDATION OF IED CONFIGURATION
The IED Configurator can be used to validate configured SCL files against the SCL schema when they are opened. It can also validate an IED's MCL configuration at any time. 1. 2.
3.
6.20
In the SCL Explorer workspace, right-click a MiCOM IED and click Validate. The selected MiCOM IED is validated and the results appear in a Validation Log window. The log shows three levels of classification: ▪ Information. No actions required. ▪ Warning. Some consideration may be required. ▪ Error. IED may not function as expected with current configuration. Double-click a warning or error item. The configuration page that generated the log entry appears. Double clicking information entries has no effect.
VALIDATION SUMMARIES
1. 2. 3.
Select Device > Manage IED. Select the IED type device number. Select the IED address and click Next. The IED 61850 Configurator tool reads details from the IED and shows them in the Summary view. 4. Select a category tab. A summary of each the configuration appears in the Summary pane. Doubleclick an item and a list of log entries appears in the Validation Report pane. The following log entries can be edited. SNTP Summary. This shows all the server sources available for configuration in the IED. If a server source is configured, it is shown in bold. Also the IP address of the external time synchronisation server is shown. If a server source is unconfigured, it is shown greyed. Dataset Definitions Summary. This shows all the datasets defined throughout the IED's data model. For each defined dataset, its number of Functionally Constrained Data Attributes is also shown. The summary page includes a common set of tasks to manage the dataset definitions. GOOSE Publishing Summary. This shows all of the GOOSE Control Blocks (GoCB) available in the IED. If a GoCB is fully configured, it is shown in bold. A partially configured GoCB is shown in normal typeface. If a GoCB is unconfigured, it is shown greyed. GOOSE Subscribing Summary. This shows all of the Virtual Inputs available in the IED. If a Virtual Input is fully configured, it is shown in bold. A partially configured Virtual Input is shown in normal typeface. If a Virtual Input is unconfigured, it is shown greyed. Any unmapped inputs are listed in an additional summary. Report Control Block Summary. This shows all of the Report Control Blocks (RCB) available in the IED. If an RCB is fully configured, it is shown in bold. A partially configured RCB is shown using in normal typeface. If an RCB is unconfigured, it is shown greyed. Control Objects Summary. This shows all of the Control Objects available in the IED's data model, and what their configured control model is (Direct Operate, Select Before Operate). Uniqueness of Control Summary. This shows all of the Virtual Inputs available in the IED. If a Virtual Input is fully configured, it is shown in bold. A partially configured Virtual Input is shown in normal typeface. If a Virtual Input is unconfigured, it is shown greyed. Any unmapped inputs are listed in an additional summary. Measurements Summary. The Measurements summary shows all of the Measurement Objects available in the IED's data model, plus their configured range and deadband. Configurable Data Attributes Summary. The Configurable Data Attribute summary shows all of the Configurable Data Attributes available in the IED's data model, plus their data type and configured value.
524
P14D-B/G/L/Z-TM-EN-1
P14D
6.21
Chapter 12 - Settings Application Software
MANAGING SCL SCHEMA VERSIONS
The IEC 61850 IED Configurator s several versions of the SCL schema. This improves its reliability and correctly validates any version of SCL file. The schema files are not available and are encoded into a proprietary binary format that allows basic version control management by the IEC 61850 IED Configurator tool. Existing schema versions can be removed or new versions added. 1. 2. 3. 4.
Select Tools > Options. Click the General tab. Click the Manage Schemas button. New schema versions are provided in a binary distribution file. Click a schema and its details are shown in the left-hand pane.
To add a new SCL Schema: 1. 2.
In the left-hand pane, click Add New SCL Schema then search for the binary schema distribution file. Click Open to import the file. The IEC 61850 IED Configurator merges all schema versions in the distribution file into the application repository. If a schema version is already available in the application repository it is skipped.
To remove an SCL Schema: 1.
6.22
In the right-hand pane, right-click a schema and select Remove Schema File. This removes the selected SCL schema from the application repository. The operation cannot be undone.
CONFIGURATION BANKS
In the MiCOM IED there are two configuration banks for IEC 61850 configuration. The configuration bank concept is similar to that of setting groups for protection settings, promoting version management and helping to minimise IED down-time during system upgrades and maintenance. To view an IED's configuration bank details: 1. 2. 3.
Establish a connection to the MiCOM IED. Select Device > Manage IED. If the connection to the MiCOM IED is successful , the Manage IED window appears showing the details of the Active and Inactive configuration banks.
The following configuration banks can be edited. Switch banks button. This toggles the IED's configuration banks so the Active Bank becomes inactive and the Inactive Bank becomes active. The switching technique used ensures the system down-time is minimised to the start-up time of the new configuration. Refresh banks button. This forces the IEC 61850 IED Configurator tool to refresh the details displayed for the Active and Inactive configuration banks. It is especially useful if, for example, configuration banks have been toggled directly on the IED. Extract ICD file button. This button is only enabled for IEDs that hold their own local copy of their ICD template file. Press this button to define where the ICD template file that is contained in the IED should be saved. After the ICD template is extracted, it can be made available as an Installed template. Extract configuration buttons. These buttons extract the appropriate configuration bank and open it for viewing or editing in a new window.
P14D-B/G/L/Z-TM-EN-1
525
Chapter 12 - Settings Application Software
6.23
P14D
TRANSFER OF CONFIGURATIONS
The IED Configurator tool can be used to transfer configurations to and from any ing MiCOM IED. If you send a configuration to a ing MiCOM IED, it is automatically stored in the Inactive configuration bank. It therefore does not immediately affect the current Active configuration. To send a configuration to a MiCOM IED: 1. 2. 3.
6.24
Establish a connection to the MiCOM IED. Select Device > Send Configuration. The IED Configurator tool checks the compatibility of the IED model number. It then transfers the configuration to the IED.
EXPORTING INSTALLED ICD TEMPLATE FILES
Any installed ICD template file can be exported by the IEC 61850 IED Configurator tool to a -defined location. 1. 2. 3.
6.25
Select Tools > Export Installed ICD File. The Template dialog appears. Select the MiCOM IED type for which the template file is to be exported. Click the Select button. Specify the location and filename of the ICD template file being exported.
EXPORTING CONFIGURED SCL FILES
Any IED configuration in an Editor window can be exported to a configured SCL file, if it has not been opened for restricted editing. To export a configured SCL file, the IED Configurator tool needs the IED's ICD template file. 1. In an Editor window, select Tools > Export Configuration to SCL. 2. Select the MCL configuration file which is to be exported. 3. Specify the destination filename for the configured SCL file. Configuration items that are specific to MCL are not exported. This is because the information is not ed by the SCL schema. It is therefore important to save the configuration in an MCL file. The main reason for exporting configured SCL files is to allow configuration information to be shared between multiple SCL/IED configurator tools. This is for the configuration of, for example, GOOSE message exchange.
526
P14D-B/G/L/Z-TM-EN-1
P14D
7
Chapter 12 - Settings Application Software
DNP3 CONFIGURATOR
DNP3 (Distributed Network Protocol) is a master/slave protocol developed for reliable communications between various types of data acquisition and control equipment. It allows interoperability between various SCADA components in substations. It was designed to function with adverse electrical conditions such as electromagnetic distortion, aging components and poor transmission media. The DNP3 Configurator allows you to retrieve and edit its settings and send the modified file back to a MiCOM IED.
7.1
PREPARING FILES OFFLINE TO SEND TO AN IED
To prepare files, it is not necessary to connect to an IED. 1. 2. 3. 4. 5. Or
Select the IED type. Click the DNP3 Settings File tile. Click Open Default File. Select the IED from the list and click Next. Type or select a model number and click Finish. The Default DNP3 Settings screen appears.
1. From the main screen, select File > Open File > Px40 > DNP3 Settings File. 2. Select the IED file from the list and click Open. Then 1. 2. 3. 4.
7.2
Expand the Explorer view and double click an item. The left-hand column shows a list of available Master Points. Using the buttons, add or remove items from the left-hand column to list of Configured Points in the right-hand column. Right-click any Configured Point in the right-hand column for further settings. Click OK.
SEND SETTINGS TO AN IED
To send settings to a device, connect the PC to the IED and select the communication port. See Getting Started (on page 499). There must be at least one setting file in a settings folder for a device. 1. 2. 3. 4. 5.
7.3 1. 2. 3. 4.
From the main screen, select View > System Explorer. Expand the view to see the required device. Right-click the device name and select Send. In the Send to... dialog, select the setting files and click Send. Click Close.
EXTRACT SETTINGS FROM AN IED From the main screen, select View > System Explorer. Expand the view to see the required device. Right-click the device name and select Extract Settings. To exrtract all settings select Extract Full Settings then Yes. Click Close.
P14D-B/G/L/Z-TM-EN-1
527
Chapter 12 - Settings Application Software
7.4 1. 2.
528
P14D
VIEW IED SETTINGS Under System, Substation, Voltage Level, Bay, Device, DNP3, double-click the New System. In the left-hand pane, expand the DNP3 Over Ethernet properties.
P14D-B/G/L/Z-TM-EN-1
P14D
8
Chapter 12 - Settings Application Software
CURVE TOOL
The Programmable Curve Tool (UPCT) allows you to create -defined curves and to and these curves to and from the Px4x range of IEDs. You can use this tool to create programmable overcurrent and overfluxing operating and reset curves. Its -friendly interface lets you easily create and visualize curves either by entering formulae or data points.
8.1
FEATURES
The Curve Tool allows you to: ● ● ● ● ● ● ● ● ● ● ● ●
8.2
Create new configuration curve files or edit existing curve files Enter a defined number of curve points or a -defined formula Create and save multiple formulae Associate the -defined curve with a predefined curve template Interpolate between curve points Save curve formulae in XML format and configure curve points in CSV format, enabling easy data exchange Save configured curve data in CRV format, suitable for into the IED Easily of the curve data from an IED Input constants with -defined values Graphically display curves with zoom, pan, and point-on-curve facilities Colour code multiple curves to allow effective comparison Print curves or save curves in a range of standard image formats
SCREEN LAYOUT
The curve selection table and Curve Plot are in the right-hand panes. The Curve Details, Curve Points, Input Table View and Product View are in the left-hand-panes. To change the width of the left- and right-hand panes, drag the vertical border between them.
8.3
CURVE SELECTION PANE
To open an existing curve: 1. 2. 3.
8.4
Select File > Open Curve. You can open several curves and the Curve Selection pane has a list of those available. As you import or create more curves, they appear as rows in the table. Check the checkbox to select a curve and the corresponding row is then highlighted. Selecting the curve displays it in the Curve Plot pane and makes it available for or . Select View > Show Curve Details to view the Curve Details.
CURVE PLOT PANE
The Curve Plot pane displays the curves showing time on the y-axis and Q (multiples of nominal current) on the x-axis. This is the standard method of defining protection IED configuration curves. Right-click anywhere in the Curve Plot pane to carry out a range of flexible operations on the curves from the context sensitive menu. Operations include copying the image, zooming, panning and printing. Images can be saved as PNG, GIF, JPEG, TIFF or BMP. Right-click any point on the plot and select Show Point Values to show the Q and T values at that point.
P14D-B/G/L/Z-TM-EN-1
529
Chapter 12 - Settings Application Software
8.4.1
P14D
ZOOMING AND PANNING
To zoom in, drag a box around the area using the mouse. To pan, click and hold the left mouse button while holding the shift key and move the mouse in the relevant direction. To un-zoom or un-pan, right-click the Curve Plot and select Un-zoom or Un-pan. To revert to the original view, right-click the Curve Plot and select Undo All Zoom/Pan.
8.4.2
SCALES AND GRID LINES
To change the scales: 1. Select Graph Options. 2. Select X-Axis Scale or Y-Axis Scale. 3. Select logarithmic or linear. To change the grid lines: 1. 2.
8.5
Select Graph Options > Grid Lines. Select Major Grid Lines or Minor Grid Lines to show the grid lines in a coarse or fine scale.
CURVE DETAILS PANE
To show further details about the curves, select View > Show Curve Detail. In the Curve Details pane you can define the name and description of the curve. You can enter a string up to 16 standard ASCII characters. If you do not enter a name, the default name New Curve is used. The formula name and template version are also displayed if applicable. To close the Curve Detail dialog, click the X in the right-hand corner. To auto-hide the Curve Detail, click the icon next to the cross. This shows the plot full size and only shows the curve detail when you position the cursor in the marked area in the left-hand margin.
8.6
CURVE POINTS PANE
The Curve Points pane has three columns Index. Each curve point has a unique index number associated with it, starting at 0, incrementing by 1 and ending with the last curve point. Q (multiples of setting). Q, in this context stands for Quantity. It is the secondary current Is, expressed in multiples of the nominal current In. T (Time in secs). T is the imposed delay time, expressed in seconds.
8.6.1
ENTERING VALUES OF Q AND T INTO THE TABLE
To input values for Q and T to define a table: 1. 2.
Select File > New > Input Table. Insert the values for Q and T up to a maximum of 256 curve points (index 0 to 255). The tool instantaneously updates the graph view as points are entered. If fewer points are inserted, the tool automatically interpolates points using linear interpolation. To copy and paste an entire table from Excel or other compatible table formats: 1. 2.
530
Copy the table to the clipboard. Position the cursor in the top left-hand Q cell and paste.
P14D-B/G/L/Z-TM-EN-1
P14D
8.7
Chapter 12 - Settings Application Software
INPUT TABLE VIEW
This allows you to show show or hide the curve and its associated points. It also allows you to choose the colour of the plotted curve.
8.8
PRODUCT VIEW
This allows you to select a curve template from the Px40 product range. You can choose whether or not to plot the product curve and its points. This pane also allows you to choose the colour of the plotted product curve.
8.9 1. 2. 3.
4. 5. 6. 7. 8.
9. 10.
FORMULA EDITOR To open the Formula Editor select View > Show Formula Editor. Enter the formula in the T= field. The formula is case sensitive, use only uppercase letters. Select the required template from the Curve Template dropdown box. The curve you are creating with the formula must be associated with a predefined template. This must match the template of one of the curves stored in the IED. The template defines a curve with a specific spread of points which can be ed to the IED. Enter the formula name into the Formula Name field. This can be any combination of standard ASCII characters up to 32 characters. If you need a Definite Time characteristic, check the DMT (Definite Minimum Time) checkbox. Then enter fixed values for the tripping current multiplier (Q) and the delay time (T). You can enter any constants into the formula and the first eight letters of the Greek alphabet are included in the formula editor as buttons. Click a button to enter the character in the Formula field. Input the formula constants into the Value column. To validate the formula, click the Formula button at the bottom left corner of the screen. The names of the constants used in the formula are shown in the Input Constants table. The formula verifier checks the operators are valid but does not check if the formula is valid or if the results are out of range. Select the Options tab, click Save As and enter a file name. The file is saved in XML format. Enter up to 16 standard ASCII characters. Once the constants are entered and the file is saved, click the Generate Curve button (next to the Formula button) to generate a curve. The curve appears in the Curve Plot pane.
Allowed Formula Editor operators Operators
Description
+
Plus
-
Minus
*
Multiply
/
Divide
^
Raise to the power of
sqrt()
Square Root
ln()
Natural logarithm
Sin
Sin function
Cos
Cos function
Tan
Tan function
P14D-B/G/L/Z-TM-EN-1
531
Chapter 12 - Settings Application Software
8.10
P14D
CURVE TEMPLATE DEFINITIONS
Many protection functions use a graphical curve to define their Operate and Reset characteristics. These are inverse curves with current on the x-axis and time on the y-axis and each curve has 256 points. In the Phasor tool, the curves created with the formula or points table must match the templates of their respective curves stored in the IED. Each curve is defined by 256 points with a specific spread of the points in different areas of the curve. The following are examples of Curve Tool templates. Curve tool templates Template
Description
Overcurrent Operate
Overcurrent protection IDMT operate curve
Overcurrent Reset
Overcurrent protection IDMT reset curve
Thermal Overload Operate
Thermal overload protection operate (heating) curve
Thermal Overload Reset
Thermal overload protection reset (cooling) curve
Undervoltage Operate
Undervoltage protection operate curve
The curve templates have a clearly defined number of graphical points to define certain portions of the curve. The following tables are examples of template definitions. Overcurrent operate Range
Number of points
Range 1: 1x to 3x setting
128
Range 2: 3x to 32x setting
116
Range 3: 32x to 76x setting
12
Overall range
256
Overcurrent reset Range
Number of points
Range 1: 1x to 0.96x setting
116
Range 2: 0.96x to 0.7x setting
128
Range 3: 0.7x to 0x setting
12
Overall range
256
Thermal overload operate Range
Number of points
Range 1: 1x to 4x setting
150
Range 2: 4x to 5x setting
68
Range 3: 5x to 10x setting
32
Range 4: 10x to 32x setting
6
Thermal overload reset Number of points
Range Range 1: 1x to 0.96x setting
116
Range 2: 0.96x to 0.7x setting
128
532
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
Range
Number of points
Range 3: 0.7x to 0x setting
12
Overall range
256
8.11
CONNECTING TO AN IED
Depending on the model, the MiCOM IEDs will have one or more of the following ports to which you can connect to in order to transfer curve files: ● Front USB ● Front serial ● Rear RS485 ● Rear Ethernet The front port is a temporary local connection used to set up the IED. The rear serial port is typically used for multi-drop SCADA. The Ethernet port runs at 10/100 Mbps and is typically used for network SCADA. To configure the communication settings for ing and ing the curves to and from the IED 1. 2. 3.
Select Device > Connection Configuration. The Edit Connection dialog appears. In the Scheme dropdown box, select which port to configure. Click the Transaction Values tab. These are the default values. If you make changes and need to revert to the default settings, click the Restore Defaults button.
The following is a list of transaction values and their definitions Busy Hold-off Time (ms). The time interval used by Courier between receiving a BUSY response and sending a subsequent POLL BUFFER command. Busy Count. The maximum number of BUSY responses that will be accepted for a single Courier transaction before aborting the transaction. To cope with abnormal situations where a device is not replying correctly to requests, a limit is placed on the number of BUSY responses that should be accepted. Without this limit the link to the device would be stuck in a loop. Reset Response Time (ms). The maximum time from a sending the last byte of a Courier Reset Remote Link message to receiving the first byte of a response. When that time has elapsed the request is aborted. Response Time (ms). The maximum time from a sending the last byte of a Courier message to receiving the first byte of a response. When that time has elapsed the request is aborted. The Response Time parameter is used for all messages except Courier Reset Remote Link messages. Try Count. The number of tries before aborting the request. Transmit Delay Time (ms). The minimum delay that is put between receiving a response and transmitting the next request. Transmit delay is normally set to zero but can be set to a few milliseconds when using half duplex communication. This gives the other end of the link time to change from transmitting to receiving. Global Transmit Time (ms). The minimum delay that is put between transmitting a global message and the next transmission.
8.11.1
CONNECTING TO A SERIAL PORT
If you connect to a serial port, the Serial tab appears. 1. 2.
Click the Serial tab. The fields are already populated with the default settings. Enter the Relay Address. This is an integer which represents the Courier address of the IED.
P14D-B/G/L/Z-TM-EN-1
533
Chapter 12 - Settings Application Software
8.11.2
P14D
CONNECTING TO THE ETHERNET PORT
If you connect to the Ethernet port, the Ethernet tab appears. 1. 2. 3. 4.
8.12 1.
2. 3. 4. 5. 6.
8.13 1. 2.
534
There is no DH so you must know the IP address and enter it manually. The T port can be dynamic or static. If you need a static T port, check the Use fixed incoming T port checkbox and enter the Fixed incoming port number. If the device is attached to a bay unit, click the Device is attached to a bay unit checkbox. Then select from the Bus Address dropdown box. Enter the Relay Address. This is an integer which represents the Courier address of the IED.
SEND A CURVE TO AN IED To open an existing curve, select File > Open Curve. You can open several curves and the Curve Selection pane has a list of those available. As you import or create more curves, they appear as rows in the table. Check the checkbox to select a curve and the corresponding row is then highlighted. Selecting the curve displays it in the Curve Plot pane and makes it available for or . Click the Device tab and select Send Curve. The Send Curve Form appears. The IED stores several curve characteristics. In the Curve Characteristic dropdown box, select which curve you want to overwrite. Click Send to send the curve to the IED then click Get Curve Ref. Check the PC Curve Value is the same as the Relay Curve Value. This shows that the send has been successful because it overwrites the existing Relay Curve Value.
EXTRACT A CURVE FROM AN IED Select Device > Extract Curve. Select File > Save > Input Table View to save the curve file in CSV format or select File > Save > Product View to save the curve file in CRV format.
P14D-B/G/L/Z-TM-EN-1
P14D
9
Chapter 12 - Settings Application Software
S&R COURIER
Settings and Records - Courier enables you to connect to any Courier device, retrieve and edit its settings and send the modified settings back to a Courier device, including DNP 3.0 configuration if ed by the device. Although each device has different settings, each cell is presented in a uniform style, showing the permissible range and step size allowed. Settings and Records - Courier also enables you to: ● ● ● ● ● ● ●
9.1 1. 2. 3.
9.2 1. 2.
extract events from a device extract disturbance records from a device control breakers and isolators set date and time on device set active group on device change the address of a device save settings, DNP 3.0 configuration, events and disturbance files to disk
SET UP IED COMMUNICATION Select Device > Communications Setup. The Communications Setup dialog appears. If the configuration you want to use already exists, select it from the Scheme drop-down list and click OK. If the configuration you want to use does not exist, create a new communications setup.
CREATE A NEW COMMUNICATION SETUP Select Device > Communications Setup. The Communications Setup dialog box appears. Select the connection: Serial, Modem or Internet.
If using a serial connection, 1. 2. 3.
Select the Serial tab. In the COM Port drop-down list, select the serial port to which the device will be connected. Select the Baud rate and Framing.
If using a modem, 1. 2.
Select the Modem tab. Click Configure… to enter the phone number.
Then for all connection types, 1. 2. 3. 4.
Select the Transaction Values tab and complete the fields. Click Save As. Enter a name in the Save Communications Parameters As field and click OK. Click OK to configure the communications port.
P14D-B/G/L/Z-TM-EN-1
535
Chapter 12 - Settings Application Software
9.3 1. 2. 3. 4. 5.
P14D
OPEN A CONNECTION Select Device > Open Connection. If known, enter the device address in the Address field, otherwise click Browse to scan available devices. Click OK to open the connection. Enter the using four alphabetic characters. Click OK. If the is valid, the connection is made and the On-line window appears.
Note: If the device is set to the default , the Enter dialog is not needed for enhanced DNP 3.0 devices.
9.4 1. 2. 3. 4.
5. 6.
9.5 1. 2. 3. 4. 5. 6.
9.6 1. 2. 3.
9.7 1. 2. 3. 4.
536
CREATE A NEW OR DEFAULT IED DNP 3.0 FILE Select File > New. Select DNP File. The New DNP 3.0 File dialog appears. Select the required device type from the Device Type drop-down list. The model numbers for the device type are displayed. Select the model number from the Model Number list or use the Advanced button to construct the required model number. If duplicate model numbers exist, the Header details give version numbers and other identifying information. The appropriate language is displayed in the Language drop-down list, showing the language of the file. If more than one language type is ed, the Language drop-down list shows the languages for the device type. Click OK. A new DNP 3.0 file is generated, based on the selected model.
EXTRACT A SETTINGS FILE FROM A DEVICE Select Device > Open Connection to open a connection to the required device. In the Online Device window, right-click the device name. Select Send To > New Settings File. The New Settings File dialog appears. Select the device model number. Click OK. Once the extraction is complete, a window appears showing the settings.
SAVE A SETTINGS FILE Select File > Save As. Edit the File Name or Header fields as required. Click Save.
SEND A SETTINGS FILE TO A DEVICE Open a connection to the required device. Make sure the destination file is in the active window. Select File > Send To Click the appropriate device.
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
10
AEDR2
AutoExtract Disturbance Records 2 (AEDR2) automatically reads COMTRADE disturbance records from the rear communication ports of both K-Series and MiCOM Px40 devices with the Courier protocol, and from Px40 or Px30 devices with the IEC 60870‑5‑103 protocol. AEDR2 is configured with an initialisation file. This file contains all settings, file names and file directories needed for configuration. This file can be created and edited using a standard text editor. Log files are also defined in the initialisation file which are used by AEDR2 to record a history of events and errors. Once configured, disturbance records are automatically extracted according to a schedule from devices connected in a defined range of addresses. This is done using the Windows® Scheduled Task facility which can be used to execute one or several schedules. All new disturbance records are saved to a -defined drive and filename. AEDR2 also has a test function to ensure the initialisation file has been properly configured. The command line is used to execute the test function and validate the initialisation file. The command line can also be used to manually execute the AEDR2 application on demand. WinAEDR2 is a management facility for AEDR2. It shows the history of all previous extractions and has shortcut buttons to launch WaveWin, Windows Explorer and the Scheduled Task facility. It can also be used to view log files, and edit and test the initialisation file.
10.1
INITIALISATION FILE
First of all you need to create or edit the initialisation file (AEDR2.INI) with a text editor such as Microsoft® Notepad. It needs to be configured for each application and for the communication requirements of the connected devices. The AEDR2.INI file contains 3 sections: the common section headed [AEDR2], the Courier section headed [Courier] and the IEC 60870-5-103 section headed [IEC-103]. Section entries are only included when nondefault values are needed.
10.1.1
COMMON SECTION Function
Description
Values
Default
ErrorLogFileName
Filename of Error Log
Valid filename
1
Error.log
ExtractionLogFileName
Filename of Extraction Log
Valid filename
1
Extraction.log
StatusLogFileName
Filename of Status Log
Valid filename
1
Status.log
ComtradeName
Used to create Comtrade short filenames
Part of valid filename
2
DR
ComtradeDir
Where to store the resulting Comtrade files
Valid directory
1
empty
ComtradeFormat
Defines Comtrade format
1991 or 1999
ReportMissingDevices
1 indicates that any device not found between MinAddress and MaxAddress is reported as "not found" in the Error Log
0 or 1
3
0
LongFileNames
1 indicates Comtrade long filenames
0 or 1
4
0
LFN_TCode
For long filenames, defines the Time Zone with respect to UTC
Valid time zone
LFN_Substation
For long filenames, the substation name or code where the Part of valid filename originating device is located
P14D-B/G/L/Z-TM-EN-1
1999
0z empty
537
Chapter 12 - Settings Application Software
Function
P14D
Description
Values
The company of the specified substation
LFN_Company
Default
Part of valid filename
empty
Use full pathnames for files or directories (e.g. "C:\Directory\SubDir"). If relative paths are used, they are assumed to be relative to the directory in which the applications are installed. Short filenames use the following format: DEV_XX_TIMESTAMP
DEV identifies the device – C for Courier or I for IEC 60870-5-103 followed by the 3-digit device address. For example 061001,231941657,0z,South Park,C001,Stafford Power,,,,.DAT XX denotes the value of the ComtradeName key TIMESTAMP expresses the date and time when the disturbance was recorded, in the format YYYY-MMDD--HH-MM-SS. For example, C001_DR_2006-10-01--23-19-41.DAT Function
Value
ReportMissingDevices LongFileNames
10.1.2
Description
0
Missing devices are not reported as errors.
1
Arrange all device addresses consecutively without gaps.
0
Records are saved using the short file name format.
1
Records are saved using the long file name format as defined by the IEEE.
COURIER SECTION Key
Purpose
Values
Default
MinAddress
Minimum device address
1 to 254
1
empty
MaxAddress
Maximum device address
1 to 254
1
empty
CommPort
Which COM port to use
Valid COM port
2
COM1
BaudRate
Baud rate to use
Valid baud rate
ElevenBits
Ten or Eleven bits
0 or 1
BusyHoldoff
Standard Courier parameter
Integer
50
BusyCount
ditto
Integer
100
ResetResponse
ditto
Integer
100
Response
ditto
Integer
100
TryCount
ditto
Integer
3
TransmitDelay
ditto
Integer
5
GlobalTransmit
ditto
Integer
10
UseModem
Whether to use a Modem
0 or 1
0
TAPI_ModemName
Modem Name
String
empty
TAPI_LineAddress
Line Address
Integer
0
TAPI_NumberToDial
Number to Dial
String
empty
TAPI_UseCountryAndAreaCodes
Whether to use Country/Area codes
Integer
0
API_AreaCode
Area Code to dial
String
empty
TAPI_CountryCode
Country Code to dial
String
empty
538
9600 3
1
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
Key
Purpose
Values
Defines which devices (if any) uses Secondary Port extraction
SecondaryPort
Default
ALL or NONE or a sequence of numbers e.g. 1,4,77,12
4
NONE
The MinAddress and MaxAddress entries must either be both included or both omitted. If included, MaxAddress must be greater than MinAddress. All Courier addresses between MinAddress and MaxAddress (inclusive) are tried. If omitted, no Courier address is tried. Both Courier and IEC 60870-5-103 disturbance extraction can use the same COM port. This is because all Courier devices are polled first, each time the AEDR2 application runs, followed by all IEC 60870-5-103 devices. If ElevenBits = 0, serial data is set to 1 start bit, 8 data bits, no parity and 1 stop bit. If ElevenBits = 1, serial data is set to 1 start bit, 8 data bits, even parity and 1 stop bit. Secondary Port Extraction means the disturbance records can be read from the device but not deleted. Primary Port Extraction means that disturbance records are deleted from the device once read. The value SecondaryPort can be set in one of three ways: ● NONE All devices are connected using their primary port. ● ALL All devices use the secondary port mechanism. ●
10.1.3
IEC 60870-5-103 SECTION Key
Purpose
Possible Values
Default
MinAddress
Minimum device address
0 .. 254
1
empty
MaxAddress
Maximum device address
0 .. 254
1
empty
CommPort
Which COM port to use
Valid COM port
COM1
BaudRate
Baud rate to use
Valid baud rate
9600
ElevenBits
Ten or Eleven bits
0 or 1
2
1
DModDirectory
Defines where the DMod directory is found
Valid directory
3
see note
LeaveInDevice
Defines which devices (if any) have disturbance records left in
ALL or NONE or a sequence of numbers e.g. 1,4,77,12
4
NONE
ComtradeDataFormat
Defines the Comtrade data format
BINARY or ASCII
ASCII
The MinAddress and MaxAddress entries must either be both included or both omitted. If included, MaxAddress must be greater than MinAddress. All IEC 60870-5-103 addresses between MinAddress and MaxAddress (inclusive) are tried. If omitted, no IEC 60870-5-103 address is tried. If ElevenBits = 0, serial data is set to 1 start bit, 8 data bits, no parity and 1 stop bit. If ElevenBits = 1, serial data is set to 1 start bit, 8 data bits, even parity and 1 stop bit.
P14D-B/G/L/Z-TM-EN-1
539
Chapter 12 - Settings Application Software
P14D
The DModDirectory value defines where the DMod files are. This is used for the descriptions of the signals in the disturbance records. The default directory is: C:\Program Files\Alstom Grid\MiCOM S1 Agile\S&R-103\DMod "Leave in Device" means that the disturbance records can be read from the device but not deleted. Otherwise, disturbance records are deleted from the device once read. The value LeaveInDevice can be set in one of three ways: ● NONE (all records are extracted and deleted) ● ALL (no records will be deleted from devices) ●
10.1.4
IEC 60870-5-103 SECTION
[AEDR2] ErrorLogFileName = TestError.log ExtractionLogFileName = TestExtraction.log StatusLogFileName = TestStatus.log ComtradeDir = C:\Project\AEDR2\WinAEDR2 ReportMissingDevices = 1 LongFileNames = 1 LFN_Substation = "South Park" LFN_Company = "Stafford Power" ComtradeFormat = 1999 [Courier] CommPort = COM1 BaudRate = 19200 ElevenBits = 1 MinAddress = 1 MaxAddress = 2 SecondaryPort = 1,3,5 [IEC-103] CommPort = COM1 BaudRate = 115200 ElevenBits = 1 MinAddress = 1 MaxAddress = 2 LeaveInDevice = ALL DModDirectory = C:\Program Files\Alstom Grid\MiCOM S1 Agile\S&R-103\DMod ComtradeDataFormat = ASCII UseModem = 0 TAPI_ModemName = Standard 56000 bps Modem TAPI_NumberToDial = 01223503445
10.2
IEC 60870-5-103 SECTION
The PC running AEDR2 can be connected to either to the Rear Port 1 or the Rear Port 2 (if fitted) of a Courier device. AEDR2 can not be used with the front port of Px40 IEDs. Rear Port 1 allows the disturbance records to be extracted or saved. Rear Port 2 can only save disturbance records. Extracted records are saved to the local PC then deleted from the device. Saved records are copied to the local PC but not deleted from the device. AEDR2 can extract or save disturbance records from IEC 60870-5-103 devices. It maintains a list of previously extracted records so it can only extract such records once. Devices using IEC 60870-5-103 and Courier use a single direct connection to the same or different COM ports. Devices using
540
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
Courier can also connect using a modem link. AEDR2 can run on more than one COM port but it needs to be run separately for each, with each port or modem using its own initialisation file.
10.3
OPERATION
AEDR2 scans all the Courier and IEC 60870-5-103 device addresses in a specified range. If it does not find a device at an address it goes to the next address. You only need to specify the lowest and highest addresses, even if there are devices missing in the sequence. AEDR2 does not keep a list of known devices. Each time it runs, it scans all addresses in the specified range. You can add new devices or remove existing devices and AEDR2 extracts disturbance records from all addresses it finds in the range each time it operates. If a device is found at an address in the specified range and an error is found while extracting a record, the error is reported to a log file. When executed directly or by the Scheduled Task facility, the AEDR2 application runs invisibly in the background, without the WinAEDR2 interface running. The only communication between AEDR2 and WinAEDR2 is through three log files written by AEDR2 which are as follows: Error Log This contains errors reported by the Courier or IEC 60870‑5‑103 transfer mechanisms, or errors caused by missing devices. Each entry contains date, time and an error description. Extraction Log This has an entry for every record that is ed. Each entry contains date, time, communication type, device address, trigger date and time information. Status Log This file has one line showing the time and date that AEDR2 was last run. The Status Log is overwritten each time AEDR2 is run.
10.4
DISTURBANCE RECORD FILES
For each disturbance record, a set of two or three files are created in standard COMTRADE format (*.CFG, *.HDR, *.DAT). Filenames in a set use the following format,
10.5
OPERATION
All errors are output to a log file. Some errors may create more than one error in the log file. The log file name is settable. See the LogFileName entry in the INI file.
P14D-B/G/L/Z-TM-EN-1
541
Chapter 12 - Settings Application Software
10.6 1. 2. 3.
4. 5.
P14D
USING THE SCHEDULED TASKS PROGRAM Select Start > Settings > Control . Double-click Scheduled Tasks. The Scheduled Tasks program starts. Double click Add Scheduled Task. The Scheduled Tasks Wizard starts. This lets you schedule the program to run at regular intervals from once a day to once a year (inclusive). Once the task has been created, it can be scheduled more frequently than once a day. Double-click AEDR2, the Properties dialog appears. Select Schedule > Advanced to configure it to run at intervals which can be as small as one minute.
Note: The Scheduled Tasks facility can also be run directly from the WinAEDR2 application.
The Scheduled Tasks program is a component that is included with Windows®. It allows programs to be run automatically at predetermined times. Other programs are available from independent companies that provide more comprehensive facilities and these can be used as alternatives to run AEDR2.
10.7
SCHEDULED TASKS PROGRAM TUTORIAL
When creating a scheduled task, test the INI file first. To set the Scheduled Tasks Program to run AEDR2, 1. 2. 3. 4.
5. 6. 7. 8. 9. 10.
Select Start > Settings > Control . Double-click the Scheduled Tasks icon. The Scheduled Tasks program starts. Double click Add Scheduled Task. The Scheduled Tasks Wizard starts. Click Next. Ignore the list of programs and click the Browse button. Find AEDR2.exe. If you loaded MiCOM P14D at the default location it is at C:\Program Files\Alstom Grid\MiCOM S1 Agile \WinAEDR2\AEDR2.exe. Select AEDR2.exe and click the Open button. Select Daily and click Next. If you want it to operate more often than daily you can do this later. Select the Start Time and Start Date and click Next. Enter your name and (twice) and click Next. Click Open advanced properties for this task when I click Finish then click Finish. The Properties dialog opens. In this basic tutorial it’s only necessary to set how often AEDR2 runs and set which INI file it uses.
To set how often AEDR2 operates, 1. 2. 3. 4. 5.
542
Click the Schedule tab, then the Advanced button. The Advanced Schedule Options dialog appears. Enable Repeat Task and select Every 30 minutes. This sets Schedule Tasks to operate AEDR2 every 30 minutes. Enable Duration and select 24 hour(s). Enable If the task is still running, stop it at this time. Click OK.
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 12 - Settings Application Software
To tell the Scheduled Tasks which INI file AEDR2 should use, 1. 2. 3.
Click the Task tab. In the Run edit box, enter AEDR2.exe as the program to run. Enter a space after AEDR2.exe then the name of the INI file it uses. If the INI file contains spaces, enclose it in in double quotes. Do NOT add the /t option when running automatically. For example, "C:\Program Files\Alstom Grid\MiCOM S1 Agile\WinAEDR2\AEDR2.exe" " C:\Program Files\Alstom Grid\MiCOM S1 Agile\WinAEDR2\example.ini"
4. Click OK to complete setting up. If you need to modify the settings later, in the Schedule Tasks window, double-click the scheduled task and the Properties dialog opens. Note: If you need to use several INI files for Courier devices at various locations, take care over when each one operates. For example, if AEDR2 uses two INI files which use the same COM port at the same time, it will fail. However, if the two INI files use different COM ports at the same time, it will not fail.
P14D-B/G/L/Z-TM-EN-1
543
Chapter 12 - Settings Application Software
11
P14D
WINAEDR2
WinAEDR2 is a management facility for AEDR2. It shows the history of all previous extractions and has shortcut buttons to launch WaveWin, Windows Explorer and the Scheduled Task facility. It can also be used to view log files, and edit and test the initialisation file.
11.1
FUNCTIONS
The main window lists the most recently extracted records in the order of extraction. There are also buttons to launch the following functions. WaveWin launches the WaveWin COMTRADE viewer application ExtractionLog launches notepad to view the extraction log ErrorLog launches notepad to view the error log Explorer launches Windows Explorer Scheduler launches the "Scheduled Tasks" application Edit .INI File launches notepad to edit INI file Test .INI File tests the INI file for errors and logs any errors Run AEDR2 launches the AEDR2.exe application AEDR2 Status shows the run status of AEDR2
544
P14D-B/G/L/Z-TM-EN-1
P14D
12
Chapter 12 - Settings Application Software
WAVEWIN
Wavewin is used for viewing and analysing waveforms from disturbance records. It can be used to determine the sequence of events that led to a fault. Wavewin provides the following functions. For further details please refer to the Wavewin manual. ● ● ● ● ● ● ●
12.1
File management Query management Log management Report generation Sequence of Events(SOE) Conversion of COMTRADE files Waveform summary
FILE MANAGER FEATURES
The File Manager is used to manage files, search the contents of a drive or directory, and edit, plot or draw the contents of a file. This feature is similar to Windows Explorer with application-specific functions tailored for the Power Utility industry. The functions include automatic event file association, specialized copy or move, intelligent queries, report files, COMTRADE conversion and compression routines, merge and append waveform and load files, event summaries and calibration reports. The File Manager s the IEEE long file naming format.
12.2
SAVE AS COMTRADE
Oscillography formats ed by the software can be converted to the COMTRADE ASCII or Binary format. Two Comtrade versions are ed: the older 1991 format and the newer 1999 format. The Comtrade format can be selected from the Data Plotting Window’s Properties dialog. The default format is the newer 1999 format. To create a COMTRADE file, 1. 2. 3. 4.
Place the cursor on the event file or mark the desired files Select Options > Save As COMTRADE (ASCII or Binary). Enter the destination path and filename (do not enter a filename extension). Click OK. The .DAT and .CFG files are created automatically. If a path is not defined, the COMTRADE files are saved in the active directory. If the sample values in the selected file(s) are RMS calibrated and the desired COMTRADE file must have instantaneous values, set the Comtrade Settings fields to automatically convert the RMS data to instantaneous values. To set the Comtrade Settings fields,
1. In the Analysis display, open the Window Properties dialog. 2. Select the Comtrade tab. 3. In the Convert RMS Calibrated Data to Peak Data dropdown box, select Yes. To automatically convert the selected file(s) to COMTRADE using the IEEE long filename format, 1. 2. 3.
In the Save As Comtrade dialog, check the Use the ComNames Naming Convention to Name the Comtrade File(s) field Leave the File Name field empty. Click OK.
P14D-B/G/L/Z-TM-EN-1
545
Chapter 12 - Settings Application Software
P14D
All files marked in the table are converted to the selected COMTRADE format and are named using the IEEE long file naming convention.
546
P14D-B/G/L/Z-TM-EN-1
P14D
13
Chapter 12 - Settings Application Software
DEVICE (MENU) TEXT EDITOR
The Menu Text Editor enables you to modify and replace the menu texts held in MiCOM Px4x IEDs. For example, you may want to customise an IED so that menus appear in a language other than one of the standard languages. By loading a copy of the current menu text file in one of the standard languages into the reference column, you can type the appropriate translation of each menu entry into the target column. This can then be sent to the IED through your PC's parallel port, replacing one of the current standard languages. New menu text files created this way can also be saved to disk for later use or further editing.
13.1 1. 2. 3. 4. 5. 6.
13.2 1. 2. 3. 4. 5.
13.3 1. 2. 3. 4.
13.4 1. 2. 3. 4. 5.
13.5 1. 2.
OPEN A CONNECTION Select Device > Open Connection. The Open Connection dialog appears. Select the Parallel Port to which the device is connected. Select the Device Timeout in minutes. Click OK. The dialog is displayed. Type the . This is displayed as asterisks. Click OK. A message appears confirming the connection has been opened.
CHANGE CONNECTION Open a connection with the device. Select Device > Change . The Change dialog appears. In the New box, enter the new . This is displayed as asterisks. In the New box, enter the again. Click OK to accept.
OPEN A MENU TEXT FILE AS A REFERENCE Select the Reference column. Select File > Open. The Open File dialog appears. Select the required menu text file then click the Open button. The menu text file appears in the Reference column.
EDIT TEXT FILE OF DEVICE Select File > New to create a default menu text file for the required device or select File > Open to open an existing file. The menu text file appears in the Target column. Select the required text cell in the Target tab corresponding to the text in the Reference tab. Edit the file as required. Select File > Save As. Edit the File Name or Header fields as required. Click Save.
SEND EDITED TEXT FILE TO DEVICE Connect a PC with a parallel cable to the required device. Select Device > Open Connection to open a connection to the required device.
P14D-B/G/L/Z-TM-EN-1
547
Chapter 12 - Settings Application Software
3. 4. 5.
548
P14D
Select Send To Device. Click OK. Once the sending of the text file is complete, the new text appears in the menu on the IED screen.
P14D-B/G/L/Z-TM-EN-1
SCHEME LOGIC CHAPTER 13
Chapter 13 - Scheme Logic
550
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 13 - Scheme Logic
CHAPTER OVERVIEW
Alstom Grid products are supplied with pre-loaded Fixed Scheme Logic (FSL) and Programmable Scheme Logic (PSL). The FSL schemes cannot be modified. They have been individually designed to suit the model in question. Each model also provides default PSL schemes, which have also been designed to suit each model. If these schemes suit your requirements, you do not need to take any action. However, if you want to change the input-output mappings, or to implement custom scheme logic, you can change these, or create new PSL schemes using the PSL editor. This chapter provides details of the in-built FSL schemes and the default PSL schemes. This chapter contains the following sections: Chapter Overview Introduction to the Scheme Logic Fixed Scheme Logic Programmable Scheme Logic
551 552 554 559
P14D-B/G/L/Z-TM-EN-1
551
Chapter 13 - Scheme Logic
2
P14D
INTRODUCTION TO THE SCHEME LOGIC
The Scheme Logic is a functional module within the IED, through which all mapping of inputs to outputs is handled. The scheme logic can be split into two parts; the Fixed Scheme Logic (FSL) and the Programmable Scheme Logic (PSL). The FSL Scheme Logic is logic that has been designed and implemented at the factory. It is logic that is necessary for the fundamental workings of the IED. It is fixed and cannot be changed. The PSL is logic that is -programmable. The PSL consists of logic gates and timers, which combine and condition the DDB signals. The logic gates can be programmed to perform a range of different logic functions and can accept any number of inputs. The timers are used either to create a programmable delay or to condition the logic outputs. The PSL logic is event driven. Only the part of the PSL logic that is affected by the particular input change that has occurred is processed. This reduces the amount of processing time used by the PSL, when compared to some competition devices. The device is shipped with a selection of default schemes, which should cover basic applications, but you can modify these default schemes to create custom schemes, if desired. You can also create new schemes from scratch, should you wish to do so. The Scheme Logic module is built around a concept called the digital data bus (DDB). The DDB is a parallel data bus containing all of the digital signals (inputs, outputs, and internal signals), which are available for use in the FSL and PSL The following diagram shows how the scheme logic interacts with the rest of the IED.
Energising quantities
Fixed LEDs
SL inputs
SL outputs
Protection functions
Opto-inputs
Programmable LEDs PSL and FSL
Control input module
Goose outputs
Goose inputs
Output relays Control inputs
Function keys
Ethernet processing module
V02011
Figure 143: Scheme Logic Interfaces The inputs to the scheme logic are: ● Opto-inputs: Optically-coupled logic inputs ● Function keys: Keys on the device (not on 20TE models)
552
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 13 - Scheme Logic
● Control inputs: Software inputs for controlling functionality ● Goose inputs: Messages from other devices via the IEC61850 interface (not on all models) ● Scheme Logic inputs: Inputs from the protection functions (SL inputs are protection function outputs) The outputs from the scheme logic are: ● ● ● ●
Programmable LEDs Output relays Goose outputs: Messages to other devices via the IEC61850 interface (not on all models) Scheme Logic outputs: Outputs to the protection functions (SL outputs are protection function inputs)
Examples of internal inputs and outputs include: ● IN>1 Trip: This is an output from the Stage 1 Earth Fault protection function, which can be input into the PSL to create further functionality. This is therefore an SL input. ● Thermal Trip: This is an output from the the thermal protection function, which can be input into the PSL to create further functionality. This is therefore an SL input. ● Reset Relays/LED: This is an SL output, which can be asserted to reset the output relays and LEDs. The FSL is fixed, but the PSL allows you to create your own scheme logic design. For this, you need a suitable PC package to facilitate the design of the PSL scheme. This PC package is provided in the form of the the PSL Editor, which is included as part of the MiCOM S1 Agile engineering tool. The PSL Editor is one of a suite of applications available in the settings application software, but is also available as a standalone package. This tool is described in the Settings Application Software chapter.
P14D-B/G/L/Z-TM-EN-1
553
Chapter 13 - Scheme Logic
3
P14D
FIXED SCHEME LOGIC
This section contains logic diagrams of the fixed scheme logic, which covers all of the device models. You must be aware that some models do not contain all the functionality described in this section.
554
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 13 - Scheme Logic
3.1
ANY START LOGIC I>1 Start
I>2 Start
I>3 Start
I>4 Start
I>5 Start
I>6 Start
I2>1 Start
I2>2 Start
I2>3 Start
I2>4 Start
IN1>1 Start
IN1>2 Start
IN1>3 Start
IN1>4 Start
IN2>1 Start
IN2>2 Start
IN2>3 Start
IN2>4 Start
ISEF>1 Start
ISEF>2 Start
ISEF>3 Start
ISEF>4 Start
V<1 Start
V<2 Start
V<3 Start
V>1 Start
V>2 Start
V>3 Start
VN>1 Start
VN>2 Start
VN>3 Start
V2> Start
BrokenLine Start
Power>1 3PhStart
Power>1 A Start
Power>1 B Start
Power>1 C Start
Power>2 3PhStart
Power>2 A Start
Power>2 B Start
Power>2 C Start
Power<1 3PhStart
Power<1 A Start
Power<1 B Start
Power<1 C Start
Power<2 3PhStart
Power<2 A Start
Power<2 B Start
Power<2 C Start
SensP1 Start A
SensP2 Start A
Stg1 f+t Sta
Stg1 df/dt+t Sta
Stg1 f+Df/Dt Sta
Stg2 f+t Sta
Stg2 df/dt+t Sta
Stg2 f+Df/Dt Sta
Stg3 f+t Sta
Stg3 df/dt+t Sta
Stg3 f+Df/Dt Sta
Stg4 f+t Sta
Stg4 df/dt+t Sta
Stg4 f+Df/Dt Sta
Stg5 f+t Sta
Stg5 df/dt+t Sta
Stg5 f+Df/Dt Sta
Stg6 f+t Sta
Stg6 df/dt+t Sta
Stg6 f+Df/Dt Sta
Stg7 f+t Sta
Stg7 df/dt+t Sta
Stg7 f+Df/Dt Sta
Stg8 f+t Sta
Stg8 df/dt+t Sta
Stg8 f+Df/Dt Sta
Stg9 f+t Sta
Stg9 df/dt+t Sta
Stg9 f+Df/Dt Sta
dv/dt1 StartA/AB
dv/dt1 StartB/BC
dv/dt1 StartC/CA
dv/dt1 Start
dv/dt2 StartA/AB
dv/dt2 StartB/BC
dv/dt2 StartC/CA
dv/dt2 Start
dv/dt3 StartA/AB
dv/dt3 StartB/BC
dv/dt3 StartC/CA
dv/dt3 Start
dv/dt4 StartA/AB
dv/dt4 StartB/BC
dv/dt4 StartC/CA
dv/dt4 Start
1
Any Start
Key: External DDB Signal AND gate
&
OR gate
1
V02000
Figure 144: Any Start Logic
P14D-B/G/L/Z-TM-EN-1
555
Chapter 13 - Scheme Logic
3.2
P14D
VTS ACCELERATION INDICATION LOGIC Trip Command In
VTS Acc Ind Key: External DDB Signal AND gate
V02001
&
OR gate
1
&
OR gate
1
Figure 145: VTS Acceleration Indication Logic
3.3
CB FAIL SEF PROTECTION LOGIC ISEF>1 Trip ISEF>2 Trip ISEF>3 Trip
1
CBF SEF Trip-1
ISEF>4 Trip CBF SEF Trip-1
&
CBF SEF Trip
Trip Command In Key: External DDB Signal
V02002
AND gate
Figure 146: CB Fail SEF Protection Logic
556
P14D-B/G/L/Z-TM-EN-1
P14D
3.4
Chapter 13 - Scheme Logic
CB FAIL NON CURRENT PROTECTION LOGIC V<1 Trip V<3 Trip V>2 Trip VN>1 Trip VN>3 Trip Power>1 3Ph Trip Power>1 B Trip Power>2 3Ph Trip Power>2 B Trip Power<1 3Ph Trip Power<1 B Trip Power<2 3Ph Trip Power<2 B Trip SensP1 Trip A Stg1 f+t Trp Stg1 df/dt+t Trp Stg2 f+t Trp Stg2 df/dt+t Trp Stg3 f+t Trp Stg3 df/dt+t Trp Stg4 f+t Trp Stg4 df/dt+t Trp Stg5 f+t Trp Stg5 df/dt+t Trp Stg6 f+t Trp Stg6 df/dt+t Trp Stg7 f+t Trp Stg7 df/dt+t Trp Stg8 f+t Trp Stg8 df/dt+t Trp Stg9 f+t Trp Stg9 df/dt+t Trp dv/dt1 Trip A/AB dv/dt1 Trip C/CA dv/dt2 Trip A/AB dv/dt2 Trip C/CA dv/dt3 Trip A/AB dv/dt3 Trip C/CA dv/dt4 Trip A/AB dv/dt4 Trip C/CA V02003
V<2 Trip V>1 Trip V>3 Trip VN>2 Trip V2> Trip Power>1 A Trip Power>1 C Trip Power>2 A Trip Power>2 C Trip Power<1 A Trip Power<1 C Trip Power<2 A Trip Power<2 C Trip SensP2 Trip A Stg1 f+df/dt Trp Stg1 f+Df/Dt Trp Stg2 f+df/dt Trp Stg2 f+Df/Dt Trp Stg3 f+df/dt Trp Stg3 f+Df/Dt Trp
1
CBF Non I Trip-1
Stg4 f+df/dt Trp Stg4 f+Df/Dt Trp Stg5 f+df/dt Trp
CBF Non I Trip-1
&
CBF Non I Trip
Trip Command In
Stg5 f+Df/Dt Trp Stg6 f+df/dt Trp Stg6 f+Df/Dt Trp Stg7 f+df/dt Trp Stg7 f+Df/Dt Trp Stg8 f+df/dt Trp Stg8 f+Df/Dt Trp Stg9 f+df/dt Trp Stg9 f+Df/Dt Trp dv/dt1 Trip B/BC dv/dt1 Trip dv/dt2 Trip B/BC dv/dt2 Trip dv/dt3 Trip B/BC dv/dt3 Trip dv/dt4 Trip B/BC dv/dt4 Trip
Key: External DDB Signal AND gate
&
OR gate
1
Figure 147: CB Fail Non Current Protection Logic
P14D-B/G/L/Z-TM-EN-1
557
Chapter 13 - Scheme Logic
3.5
P14D
COMPOSITE EARTH FAULT START LOGIC IN1>1 Start IN1>3 Start IN2>1 Start IN2>3 Start ISEF>1 Start ISEF>3 Start VN>1 Start VN>3 Start
IN1>2 Start IN1>4 Start IN2>2 Start IN2>4 Start
1
Start N
ISEF>2 Start ISEF>4 Start Key: External DDB Signal
VN>2 Start
AND gate
V02004
&
OR gate
1
Figure 148: Composite Earth Fault Start Logic
3.6
ANY TRIP LOGIC Trip Command In
Trip Command Out Key: External DDB Signal AND gate
V02005
&
OR gate
1
Figure 149: Any Trip Logic
3.7
SEF ANY START LOGIC ISEF1>1 Start ISEF1>2 Start ISEF1>3 Start
1
ISEF> Start
ISEF1>4 Start Key: External DDB Signal
V02006
AND gate
&
OR gate
1
Figure 150: SEF Any Start Logic
558
P14D-B/G/L/Z-TM-EN-1
P14D
4
Chapter 13 - Scheme Logic
PROGRAMMABLE SCHEME LOGIC
This section contains logic diagrams of the default programmable scheme logic, which covers all of the device models. You must be aware that some models do not contain all the functionality described in this section. All these diagrams can be viewed, edited and printed from the PSL Editor.
P14D-B/G/L/Z-TM-EN-1
559
Chapter 13 - Scheme Logic
4.1
P14D
TRIP OUTPUT MAPPINGS I>1 Trip
I>2 Trip
I>3 Trip
I>4 Trip
I>5 Trip
I>6 Trip
I2>1 Trip
I2>2 Trip
I2>3 Trip
I2>4 Trip
IN1>1 Trip
IN1>2 Trip
IN1>3 Trip
IN1>4 Trip
IN2>1 Trip
IN2>2 Trip
IN2>3 Trip
IN2>4 Trip
ISEF>1 Trip
ISEF>2 Trip
ISEF>3 Trip
ISEF>4 Trip
V<1 Trip
V<2 Trip
V<3 Trip
V>1 Trip
V>2 Trip
V>3 Trip
VN>1 Trip
VN>2 Trip
VN>3 Trip
V2> Trip
BrokenLine Trip
Power>1 3PhTrip
Power>1 A Trip
Power>1 B Trip
Power>1 C Trip
Power>2 3PhTrip
Power>2 A Trip
Power>2 B Trip
Power>2 C Trip
Power<1 3PhTrip
Power<1 A Trip
Power<1 B Trip
Power<1 C Trip
Power<2 3PhTrip
Power<2 A Trip
Power<2 B Trip
Power<2 C Trip
SensP1 Trip A
SensP2 Trip A
Stg1 f+t Trp
Stg1 df/dt+t Trp
Stg1 f+Df/Dt Trp
Stg2 f+t Trp
Stg2 df/dt+t Trp
Stg2 f+Df/Dt Trp
Stg3 f+t Trp
Stg3 df/dt+t Trp
Stg3 f+Df/Dt Trp
Stg4 f+t Trp
Stg4 df/dt+t Trp
Stg4 f+Df/Dt Trp
Stg5 f+t Trp
Stg5 df/dt+t Trp
Stg5 f+Df/Dt Trp
Stg6 f+t Trp
Stg6 df/dt+t Trp
Stg6 f+Df/Dt Trp
Stg7 f+t Trp
Stg7 df/dt+t Trp
Stg7 f+Df/Dt Trp
Stg8 f+t Trp
Stg8 df/dt+t Trp
Stg8 f+Df/Dt Trp
Stg9 f+t Trp
Stg9 df/dt+t Trp
Stg9 f+Df/Dt Trp
dv/dt1 TripA/AB
dv/dt1 TripB/BC
dv/dt1 TripC/CA
dv/dt1 Trip
dv/dt2 TripA/AB
dv/dt2 TripB/BC
dv/dt2 TripC/CA
dv/dt2 Trip
dv/dt3 TripA/AB
dv/dt3 TripB/BC
dv/dt3 TripC/CA
dv/dt3 Trip
dv/dt4 TripA/AB
dv/dt4 TripB/BC
dv/dt4 TripC/CA
dv/dt4 Trip
1
Trip Command In Note: Trip Command In and Trip Command Out are ed together in the FSL
Key: External DDB Signal AND gate
&
OR gate
1
V02012
Figure 151: Trip Output Mappings
560
P14D-B/G/L/Z-TM-EN-1
P14D
4.2
Chapter 13 - Scheme Logic
OPTO-INPUT MAPPINGS Input L1
Block AR
Input L2
SG Select 1x
Input L3
IN1>3 Timer Block IN1>4 Timer Block
Input L4
I>3 Timer Block I>4 Timer Block
Input L5
CB Healthy
Input L6
Ext. Trip 3ph
Input L7
CB Aux 3ph(52-A)
Input L8
CB Aux 3ph(52-B)
V02015
Key: External DDB Signal
Figure 152: Opto-Input Mappings
P14D-B/G/L/Z-TM-EN-1
561
Chapter 13 - Scheme Logic
4.3
P14D
OUTPUT RELAY MAPPINGS IN/SEF> Blk Start
Output R1
I> Block Start
Output R2
Trip Comand Out
Output R3
SG-opto Invalid F out of Range VT Fail Alarm CT Fail Alarm CB Fail Alarm I^ Maint Alarm CB Ops Maint Alarm CB Op Time Maint
1
Output R4
Fault Freq Lock CB Status Alarm Man CB Trip Fail CB Cls Fail Man CB Unhealthy AR Lockout UV Block BFail1 Trip 3ph
Output R5
Control Close
Output R6
Control trip
Output R7
Any Start
Output R8 Key:
V02018
External DDB Signal
OR gate
1
Figure 153: Output Relay Mappings
LED MAPPINGS
4.4
V02021
Trip Command Out
LED1 Red
Any Start
LED1 Grn
CB Open 3 ph
LED2 Red
CB Closed 3 ph
LED2 Grn
AR In Progress
LED3 Red
Successful Close
LED3 Grn
AR Lockout
LED4 Red
AR In Service
LED4 Grn Key: External DDB Signal
Figure 154: LED Mappings
562
P14D-B/G/L/Z-TM-EN-1
P14D
4.5
Chapter 13 - Scheme Logic
CONTROL INPUT MAPPINGS Control Input 1
Reset Lockout
Control Input 2
AR Auto Mode
Control Input 3
Telecontrol Mode
Control Input 4
AR LiveLine Mode Key: External DDB Signal
V02023
Figure 155: Control Input Mappings
4.6
FUNCTION KEY MAPPINGS Function Key 1
Blk Rmt. CB Ops FnKey LED1 Red
Function Key 2
Init Trip CB FnKey LED2 Red FnKey LED2 Green
Function Key 3
Close in Prog
Init Close CB 1
FnKey LED3 Red FnKey LED3 Green Key: External DDB Signal OR gate
1
NOT gate
V02025
Figure 156: Function Key Mappings
CIRCUIT BREAKER MAPPING
4.7
CB Closed 3 ph
CB in Service Key: External DDB Signal
V02026
Figure 157: Circuit Breaker mapping
FAULT RECORD TRIGGER MAPPING
4.8
Output R3 V02027
Fault Rec Trig Key: External DDB Signal
Figure 158: Fault Record Trigger mapping
P14D-B/G/L/Z-TM-EN-1
563
Chapter 13 - Scheme Logic
4.9
P14D
HIGH IMPEDEANCE FAULT PROTECTION MAPPINGS CB Open 3 ph
HIF Forced Reset Key: External DDB Signal
V02029
Figure 159: High Impedance Fault Protection Mappings
4.10
CHECK SYNCHRONISATION AND VOLTAGE MONITOR MAPPINGS SysChks Inactive Check Sync 1 OK Check Sync 2 OK Live Line Dead Bus
Dead Line
Live Bus
Man Check Synch & 1
AR Sys Checks
&
&
Key: External DDB Signal OR gate
1
AND gate
&
V02028
Figure 160: Check Synchronisation and Voltage Monitor mappings
4.11
SETTINGS
The device contains a PSL DATA column, which can be used to track PSL modifications. A total of 12 cells are contained in the PSL DATA column; 3 for each setting group. Grp(n) PSL Ref: When ing a PSL scheme to an IED, you will be prompted to enter the relevant group number and a reference identifier. The first 32 characters of the reference identifier are displayed in this cell. The horizontal cursor keys can scroll through the 32 characters as the LCD display only displays 16 characters. Example: Grp. PSL Ref.
Date/time: This cell displays the date and time when the PSL scheme was ed to the IED. Example: 18 Nov 2002 08:59:32.047 Grp(n) PSL ID: This cell displays a unique ID number for the ed PSL scheme. Example:
564
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 13 - Scheme Logic
Grp. 1 PSL ID - 2062813232 The complete Settings table is shown below: Menu Text
Col
Row
Default Setting
Available Options
Description PSL DATA
B7
00
This column contains information about the Programmable Scheme Logic Grp1 PSL Ref
B7
01
Not settable
This setting displays the Group 1 PSL reference Date/Time
B7
02
Not settable
This setting displays the date and time the PSL was created Grp1 PSL ID
B7
03
Not settable
This setting displays the Group 1 PSL ID Grp2 PSL Ref
B7
11
Not settable
This setting displays the Group 2 PSL reference Date/Time
B7
12
Not settable
This setting displays the date and time the PSL was created Grp2 PSL ID
B7
13
Not settable
This setting displays the Group 2 PSL ID Grp3 PSL Ref
B7
21
Not settable
This setting displays the Group 3 PSL reference Date/Time
B7
22
Not settable
This setting displays the date and time the PSL was created Grp3 PSL ID
B7
23
Not settable
This setting displays the Group 3 PSL ID Grp4 PSL Ref
B7
31
Not settable
This setting displays the Group 4 PSL reference Date/Time
B7
32
Not settable
This setting displays the date and time the PSL was created Grp4 PSL ID
B7
33
Not settable
This setting displays the Group 4 PSL ID
P14D-B/G/L/Z-TM-EN-1
565
Chapter 13 - Scheme Logic
566
P14D
P14D-B/G/L/Z-TM-EN-1
INSTALLATION CHAPTER 14
Chapter 14 - Installation
568
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 14 - Installation
CHAPTER OVERVIEW
This chapter provides information about installing the product. This chapter contains the following sections: Chapter Overview Handling the Goods Mounting the Device Cables and Connectors Case Dimensions
569 570 571 577 582
P14D-B/G/L/Z-TM-EN-1
569
Chapter 14 - Installation
2
P14D
HANDLING THE GOODS
Our products are of robust construction but require careful treatment before installation on site. This section discusses the requirements for receiving and unpacking the goods, as well as associated considerations regarding product care and personal safety. Caution: Before lifting or moving the equipment you should be familiar with the Safety Information chapter of this manual.
2.1
RECEIPT OF THE GOODS
On receipt, ensure the correct product has been delivered. Unpack the product immediately to ensure there has been no external damage in transit. If the product has been damaged, make a claim to the transport contractor and notify us promptly. For products not intended for immediate installation, repack them in their original delivery packaging.
2.2
UNPACKING THE GOODS
When unpacking and installing the product, take care not to damage any of the parts and make sure that additional components are not accidentally left in the packing or lost. Do not discard any CDROMs or technical documentation. These should accompany the unit to its destination substation and put in a dedicated place. The site should be well lit to aid inspection, clean, dry and reasonably free from dust and excessive vibration. This particularly applies where installation is being carried out at the same time as construction work.
2.3
STORING THE GOODS
If the unit is not installed immediately, store it in a place free from dust and moisture in its original packaging. Keep any de-humidifier bags included in the packing. The de-humidifier crystals lose their efficiency if the bag is exposed to ambient conditions. Restore the crystals before replacing it in the carton. Ideally regeneration should be carried out in a ventilating, circulating oven at about 115°C. Bags should be placed on flat racks and spaced to allow circulation around them. The time taken for regeneration will depend on the size of the bag. If a ventilating, circulating oven is not available, when using an ordinary oven, open the door on a regular basis to let out the steam given off by the regenerating silica gel. On subsequent unpacking, make sure that any dust on the carton does not fall inside. Avoid storing in locations of high humidity. In locations of high humidity the packaging may become impregnated with moisture and the de-humidifier crystals will lose their efficiency. The device can be stored between –25º to +70ºC (-13ºF to +158ºF).
2.4
DISMANTLING THE GOODS
If you need to dismantle the device, always observe standard ESD (Electrostatic Discharge) precautions. The minimum precautions to be followed are as follows: ● Use an antistatic wrist band earthed to a suitable earthing point. ● Avoid touching the electronic components and PCBs.
570
P14D-B/G/L/Z-TM-EN-1
P14D
3
Chapter 14 - Installation
MOUNTING THE DEVICE
The products are available in the following forms ● For flush and rack mounting ● For retrofitting K-series models ● Software only (for upgrades)
3.1
FLUSH MOUNTING
-mounted devices are flush mounted into s using M4 SEMS Taptite self-tapping screws with captive 3 mm thick washers (also known as a SEMS unit). These fastenings are available in packs of five (our part number ZA0005 104). Caution: Do not use conventional self-tapping screws, because they have larger heads and could damage the faceplate.
Alternatively, you can use tapped holes if the has a minimum thickness of 2.5 mm. For applications where the product needs to be semi-projection or projection mounted, a range of collars are available. If several products are mounted in a single cut-out in the , mechanically group them horizontally or vertically into rigid assemblies before mounting in the . Caution: Do not fasten products with pop rivets because this makes them difficult to remove if repair becomes necessary.
If the product is mounted on a BS EN60529 IP52 compliant , fit a metallic sealing strip between ading products (part no GN2044 001) and fit a sealing ring around the complete assembly, according to the following table. Width
Sealing ring for single tier
Sealing ring for double tier
10TE
GJ9018 002
GJ9018 018
15TE
GJ9018 003
GJ9018 019
20TE
GJ9018 004
GJ9018 020
25TE
GJ9018 005
GJ9018 021
30TE
GJ9018 006
GJ9018 022
35TE
GJ9018 007
GJ9018 023
40TE
GJ9018 008
GJ9018 024
45TE
GJ9018 009
GJ9018 025
50TE
GJ9018 010
GJ9018 026
55TE
GJ9018 011
GJ9018 027
60TE
GJ9018 012
GJ9018 028
65TE
GJ9018 013
GJ9018 029
70TE
GJ9018 014
GJ9018 030
75TE
GJ9018 015
GJ9018 031
80TE
GJ9018 016
GJ9018 032
P14D-B/G/L/Z-TM-EN-1
571
Chapter 14 - Installation
3.1.1
P14D
RACK MOUNTING
-mounted variants can also be rack mounted using single-tier rack frames (our part number FX0021 101), as shown in the figure below. These frames are designed with dimensions in accordance with IEC 60297 and are supplied pre-assembled ready to use. On a standard 483 mm (19 inch) rack this enables combinations of case widths up to a total equivalent of size 80TE to be mounted side by side. The two horizontal rails of the rack frame have holes drilled at approximately 26 mm intervals. Attach the products by their mounting flanges using M4 Taptite self-tapping screws with captive 3 mm thick washers (also known as a SEMS unit). These fastenings are available in packs of five (our part number ZA0005 104). Caution: Risk of damage to the front cover molding. Do not use conventional self-tapping screws, including those supplied for mounting MiDOS products because they have slightly larger heads.
Once the tier is complete, the frames are fastened into the racks using mounting angles at each end of the tier.
Figure 161: Rack mounting of products Products can be mechanically grouped into single tier (4U) or multi-tier arrangements using the rack frame. This enables schemes using products from different product ranges to be pre-wired together before mounting. Use blanking plates to fill any empty spaces. The spaces may be used for installing future products or because the total size is less than 80TE on any tier. Blanking plates can also be used to mount ancillary components. The part numbers are as follows: Blanking plate part number
Case size summation 5TE
GJ2028 101
10TE
GJ2028 102
15TE
GJ2028 103
20TE
GJ2028 104
25TE
GJ2028 105
572
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 14 - Installation
Case size summation
Blanking plate part number
30TE
GJ2028 106
35TE
GJ2028 107
40TE
GJ2028 108
3.2
K-SERIES RETROFIT
A major advantage of the P40 Agile platform is its backward compatibility with the K-series products. The P40 Agile products have been designed such that the case, back terminal layout and pin-outs are identical to their K-series predecessors and can be retrofitted without the usual overhead associated with replacing and rewiring devices. This allows easy upgrade of the protection system with minimum impact and minimum shutdown time of the feeder. The equivalencies of the models are as follows: Case width (TE)
Case width (mm)
Equivalent K series
Products
20TE
102.4 mm (4 inches)
KCGG140/142
P14N
30TE
154.2 mm (6 inches)
KCEG140/142
P14D
The old K-series products can be removed by sliding the cradle out of the case. The new P40 Agile cradle can then be inserted into the old case as shown below:
Figure 162: Inserting cradle into case Both K-series products and P40 Agile products are equipped with CT shorting links. Depending on the model, your device may or may not be equipped with CTs. If there are CTs present, spring-loaded shorting s (see below) ensure that the terminals into which the CTs connect are shorted before the CT s are broken, when withdrawing the cradle from the case. This ensures that no voltage is developed between the two terminals on breaking the CT connections. If no CTs are present, the CT terminals are permanently shorted internally.
P14D-B/G/L/Z-TM-EN-1
573
Chapter 14 - Installation
P14D
E01407
Figure 163: Spring-loaded CT shorting s Before withdrawing the cradle it is important to: ● Check the existing case for any damage ● Check the wiring is in good condition, especially the earth wiring ● Check the continuity of the earth connection to the cublicle earthing bar. If there is any doubt as to the integrity of any of these aspects, your local representative. Caution: After removing the K-series product from its case, refit it into the case that came with your device, for storage or reuse in another location.
The difference between a standard device and a K-series retrofit device is that the retrofit device has internal links between terminals 7 and 13, and terminals 8 and 14 respectively. This is so that equipment driven by the K-series field voltage conected to terminals 7 and 8, will continue to be driven indirectly via terminals 13 and 14 when replaced by P40 Agile products. A K-series device provides a 48V DC field voltage between terminals 7 and 8. This field voltage is intended for driving auxiliary equipment such as opto-inputs. P40 Agile devices DO NOT provide this field voltage. For this reason, P40 Agile retrofit devices have internal shorting links between terminals 7 and 13, and terminals 8 and 14 respectively. The intention of this is to provide the auxiliary supply voltage to terminals 7 and 8 in lieue of the field voltage. Caution: The voltage on terminals 7 and 8 mirros that of the auxiliary supply voltage. If the auxiliary supply voltage on terminals 13 and 14 is not 48V DC, then the voltage on terminals 7 and 8 is also not 48V DC. This means that the P40 Agile K-series retrofit models should only be used on sites where the auxiliary supply voltage is 48V DC.
574
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 14 - Installation
Caution: When retrofitting a K-series device, ensure the load on terminals 7 and 8 is limited to a maximum of 5A. A jumplead with a 5A ceramic timelag fuse is fitted internally.
3.2.1
CONVENTIONS
The P40 Agile products have different conventions from the K-series products when it comes to numbering some hardware components. It is very important that you are aware of this. This is just a matter of convention and does not affect the terminal compatibility. The equivalencies are as follows: Component
P40 Agile products
K-series products
Output relay
RL1
RL0
Output relay
RL2
RL1
Output relay
RL3
RL2
Output relay
RL4
RL3
Output relay
RL5
RL4
Output relay
RL6
RL5
Output relay
RL7
RL6
Output relay
RL8
RL7
Opto-input
L1
L0
Opto-input
L2
L1
Opto-input
L3
L2
Opto-input
L4
L3
Opto-input
L5
L4
Opto-input
L6
L5
Opto-input
L7
L6
Opto-input
L8
L7
3.3
SOFTWARE ONLY
It is possible to upgrade an existing device by purchasing software only (providing the device is already fitted with the requisite hardware). There are two options for software-only products: ● Your device is sent back to the Alstom factory for upgrade. ● The software is sent to you for upgrade. Please your local representative if you wish to procure the services of a commissioning engineer to help you with your device upgrade. Note: Software-only products are licensed for use with devices with specific serial numbers.
P14D-B/G/L/Z-TM-EN-1
575
Chapter 14 - Installation
P14D
Caution: Do not attempt to upgrade an existing device if the software has not been licensed for that speciific device.
576
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 14 - Installation
4
CABLES AND CONNECTORS
This section describes the type of wiring and connections that should be used when installing the device. For pin-out details please refer to the Hardware Design chapter or the wiring diagrams. Caution: Before carrying out any work on the equipment you should be familiar with the Safety Section and the ratings on the equipment’s rating label.
4.1
TERMINAL BLOCKS
The P40 Agile devices use MiDOS terminal blocks as shown below.
Figure 164: MiDOS terminal block The MiDOS terminal block consists of up to 28 x M4 screw terminals. The wires should be terminated with rings using 90° ring terminals, with no more than two rings per terminal. The products are supplied with sufficient M4 screws. M4 90° crimp ring terminals are available in three different sizes depending on the wire size. Each type is available in bags of 100. Wire size
Part number mm2
Insulation color
ZB9124 901
0.25 - 1.65
(22 – 16 AWG)
Red
ZB9124 900
1.04 - 2.63 mm2 (16 – 14 AWG)
Blue
ZB9124 904
2.53 - 6.64 mm2 (12 – 10 AWG)
Un-insulated
P14D-B/G/L/Z-TM-EN-1
577
Chapter 14 - Installation
P14D
Caution: Always fit an insulating sleeve over the ring terminal.
4.2
POWER SUPPLY CONNECTIONS
These should be wired with 1.5 mm PVC insulated multi-stranded copper wire terminated with M4 ring terminals. The wire should have a minimum voltage rating of 300 V RMS. Caution: Protect the auxiliary power supply wiring with a maximum 16 A high rupture capacity (HRC) type NIT or TIA fuse.
4.3
EARTH CONNNECTION
Every device must be connected to the cubicle earthing bar using the M4 earth terminal. Use a wire size of at least 2.5 mm2 terminated with a ring terminal. Due to the physical limitations of the ring terminal, the maximum wire size you can use is 6.0 mm2 using ring terminals that are not pre-insulated. If using pre insulated ring terminals, the maximum wire size is reduced to 2.63 mm2 per ring terminal. If you need a greater cross-sectional area, use two wires in parallel, each terminated in a separate ring terminal. The wire should have a minimum voltage rating of 300 V RMS. Note: To prevent any possibility of electrolytic action between brass or copper ground conductors and the rear of the product, precautions should be taken to isolate them from one another. This could be achieved in several ways, including placing a nickel-plated or insulating washer between the conductor and the product case, or using tinned ring terminals.
4.4
CURRENT TRANSFORMERS
Current transformers would generally be wired with 2.5 mm2 PVC insulated multi-stranded copper wire terminated with M4 ring terminals. Due to the physical limitations of the ring terminal, the maximum wire size you can use is 6.0 mm2 using ring terminals that are not pre-insulated. If using pre insulated ring terminals, the maximum wire size is reduced to 2.63 mm2 per ring terminal. If you need a greater cross-sectional area, use two wires in parallel, each terminated in a separate ring terminal. The wire should have a minimum voltage rating of 300 V RMS. Caution: Current transformer circuits must never be fused.
Note: If there are CTs present, spring-loaded shorting s ensure that the terminals into which the CTs connect are shorted before the CT s are broken.
578
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 14 - Installation
Note: For 5A CT secondaries, we recommend using 2 x 2.5 mm2 PVC insulated multi-stranded copper wire.
4.5
VOLTAGE TRANSFORMER CONNECTIONS
Voltage transformers should be wired with 2.5 mm2 PVC insulated multi-stranded copper wire terminated with M4 ring terminals. The wire should have a minimum voltage rating of 300 V RMS.
4.6
WATCHDOG CONNECTIONS
These should be wired with 1 mm PVC insulated multi-stranded copper wire terminated with M4 ring terminals. The wire should have a minimum voltage rating of 300 V RMS.
4.7
EIA(RS)485 AND K-BUS CONNECTIONS
For connecting the EIA(RS485) / K-Bus ports, use 2-core screened cable with a maximum total length of 1000 m or 200 nF total cable capacitance. A typical cable specification would be: ● Each core: 16/0.2 mm2 copper conductors, PVC insulated ● Nominal conductor area: 0.5 mm2 per core ● Screen: Overall braid, PVC sheathed To guarantee the performance specifications, you must ensure continuity of the screen, when daisy chaining the connections. The device is supplied with an earth link pack (part number ZA0005092) consisting of an earth link and a self-tapping screw to facilitate this requirement. The earth link is fastened to the Midos block just below terminal number 56 as shown:
E01402
Figure 165: Earth link for cable screen There is no electrical connection of the cable screen to the device. The link is provided purely to link together the two cable screens.
P14D-B/G/L/Z-TM-EN-1
579
Chapter 14 - Installation
4.8
P14D
IRIG-B CONNECTION
The optional IRIG-B input uses the same terminals as the EIA(RS)485 port RP1. It is therefore apparent that RS485 communications and IRIG-B input are mutually exclusive. A typical cable specification would be: ● Each core: 16/0.2 mm2 copper conductors, PVC insulated ● Nominal conductor area: 0.5 mm2 per core ● Screen: Overall braid, PVC sheathed
4.9
OPTO-INPUT CONNECTIONS
These should be wired with 1 mm2 PVC insulated multi-stranded copper wire terminated with M4 ring terminals. Each opto-input has a selectable preset ½ cycle filter. This makes the input immune to noise induced on the wiring. This can, however slow down the response. If you need to switch off the ½ cycle filter, either use double pole switching on the input, or screened twisted cable on the input circuit. Caution: Protect the opto-inputs and their wiring with a maximum 16 A high rupture capacity (HRC) type NIT or TIA fuse.
4.10
OUTPUT RELAY CONNECTIONS
These should be wired with 1 mm PVC insulated multi-stranded copper wire terminated with M4 ring terminals.
4.11
ETHERNET METALLIC CONNECTIONS
If the device has a metallic Ethernet connection, it can be connected to either a 10Base-T or a 100Base-TX Ethernet hub. Due to noise sensitivity, we recommend this type of connection only for short distance connections, ideally where the products and hubs are in the same cubicle. For increased noise immunity, CAT 6 (category 6) STP (shielded twisted pair) cable and connectors can be used. The connector for the Ethernet port is a shielded RJ-45. The pin-out is as follows: Pin
Signal name
Signal definition
1
TXP
Transmit (positive)
2
TXN
Transmit (negative)
3
RXP
Receive (positive)
4
-
Not used
5
-
Not used
6
RXN
Receive (negative)
7
-
Not used
8
-
Not used
4.12
ETHERNET FIBRE CONNECTIONS
We recommend the use of fibre-optic connections for permanent connections in a substation environment. The 100 Mbps fibre optic port is based on the 100BaseFX standard and uses type LC connectors. They are compatible with 50/125 µm or 62.5/125 µm multimode fibres at 1300 nm wavelength.
580
P14D-B/G/L/Z-TM-EN-1
P14D
4.13
Chapter 14 - Installation
USB CONNECTION
The IED has a type B USB socket on the front . A standard USB printer cable (type A one end, type B the other end) can be used to connect a local PC to the IED. This cable is the same as that used for connecting a printer to a PC.
P14D-B/G/L/Z-TM-EN-1
581
Chapter 14 - Installation
5
P14D
CASE DIMENSIONS 99.0mm 10.5mm
A = Clearance holes B = Mounting holes
78.0mm
A
B
B
A
159.0mm 168.0mm
243.1mm A 23.5mm
B
B 52.0mm
A
8 holes
3.4mm 213.1mm
177.0mm
102.4mm
E01403
Figure 166: 20TE case dimensions
582
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 14 - Installation
151.0mm 129.5mm
10.75
A B
A = Clearance hole B = Mounting hole B
A
159.0mm 168.0mm
A B
B
A 242.7mm
23.7mm
8 holes
103.6mm
3.4mm
213.1mm
177.0mm
154.2mm
E01404
Figure 167: 30TE case dimensions
P14D-B/G/L/Z-TM-EN-1
583
Chapter 14 - Installation
584
P14D
P14D-B/G/L/Z-TM-EN-1
COMMISSIONING INSTRUCTIONS CHAPTER 15
Chapter 15 - Commissioning Instructions
586
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 15 - Commissioning Instructions
CHAPTER OVERVIEW
This chapter contains the following sections: Chapter Overview General Guidelines Commissioning Test Menu Commissioning Equipment Product Checks Setting Checks Protection Timing Checks Onload Checks Final Checks
587 588 589 592 593 601 603 605 607
P14D-B/G/L/Z-TM-EN-1
587
Chapter 15 - Commissioning Instructions
2
P14D
GENERAL GUIDELINES
Alstom Grid IEDs are self-checking devices and will raise an alarm in the unlikely event of a failure. This is why the commissioning tests are less extensive than those for non-numeric electronic devices or electromechanical relays. To commission the IEDs, you do not need to test every IED function. You need only that the hardware is functioning correctly and that the application-specific software settings have been applied. You can check the settings by extracting them using appropriate setting software, or by means of the front interface (HMI ). The customer is usually responsible for determining the settings to be applied and for testing any scheme logic. The menu language is -selectable, so the Commissioning Engineer can change it for commissioning purposes if required. Note: to restore the language setting to the customer’s preferred language on completion.
Caution: Before carrying out any work on the equipment you should be familiar with the contents of the Safety Section or Safety Guide SFTY/4LM as well as the ratings on the equipment’s rating label. Warning: Do not disassemble the IED in any way during commissioning.
588
P14D-B/G/L/Z-TM-EN-1
P14D
3
Chapter 15 - Commissioning Instructions
COMMISSIONING TEST MENU
The IED provides several test facilities under the COMMISSION TESTS menu heading. There are menu cells that allow you to monitor the status of the opto-inputs, output relay s, internal Digital Data Bus (DDB) signals and -programmable LEDs. This section describes the commissioning tests available in the IED's Commissioning test menu.
3.1
OPTO I/P STATUS CELL (OPTO-INPUT STATUS)
This cell can be used to monitor the status of the opto-inputs while they are sequentially energised with a suitable DC voltage. The cell displays the status of the opto-inputs as a binary string, '1' meaning energised, '0' meaning deenergised. If you move the cursor along the binary numbers, the corresponding label text is displayed for each logic input.
3.2
RELAY O/P STATUS CELL (RELAY OUTPUT STATUS)
This cell displays the status of the DDB signals that result in energisation of the output relays as a binary string, a '1' indicating an operated state and '0' a non-operated state. If you move the cursor along the binary numbers the corresponding label text is displayed for each relay output. The displayed information can be used to indicate the status of the output relays when the IED is in service. You can also check for relay damage by comparing the status of the output s with their associated bits. Note: When the Test Mode cell is set to s Blocked, this cell continues to indicate which s would operate if the IED was in-service. It does not show the actual status of the output relays.
3.3
TEST PORT STATUS CELL
This cell displays the status of the DDB signals that have been allocated in the Monitor Bit cells. If you move the cursor along the binary numbers, the corresponding DDB signal text string is displayed for each monitor bit. By using this cell with suitable monitor bit settings, the state of the DDB signals can be displayed as various operating conditions or sequences are applied to the IED. This allows you to test the Programmable Scheme Logic (PSL).
3.4
MONITOR BIT 1 TO 8 CELLS
The eight Monitor Bit cells allows you to select eight DDB signals that can be observed in the Test Port Status cell. Each Monitor Bit cell can be assigned to a particular DDB signal. You set it by entering the required DDB signal number from the list of available DDB signals.
3.5
TEST MODE CELL
This cell allows you to perform secondary injection testing. It also lets you test the output s directly by applying menu-controlled test signals. To go into test mode, select the 'Test Mode' option in the Test Mode cell. This takes the IED out of service causing an alarm condition to be recorded and the Out of Service LED to illuminate. This also freezes any
P14D-B/G/L/Z-TM-EN-1
589
Chapter 15 - Commissioning Instructions
P14D
information stored in the CB CONDITION column. In IEC 60870-5-103 versions, it changes the Cause of Transmission (COT) to Test Mode. In Test Mode, the output s are still active. To disable the output s you must select the 's Blocked' option Once testing is complete, return the device back into service by setting the Test Mode Cell back to 'Disabled'. Caution: When the cell is in Test Mode, the Scheme Logic still drives the output relays, which could result in tripping of circuit breakers. To avoid this, set the Test Mode cell to 's Blocked'.
Note: 'Test mode' and 's Blocked' mode can also be selected by energising an opto-input mapped to the Test Mode signal, and the Block signal respectively.
3.6
TEST PATTERN CELL
The Test Pattern cell is used to select the output relay s to be tested when the Test cell is set to 'Apply Test'. The cell has a binary string with one bit for each -configurable output , which can be set to '1' to operate the output and '0' to not operate it.
3.7
TEST CELL
When the 'Apply Test' command in this cell is issued, the s set for operation change state. Once the test has been applied, the command text on the LCD will change to No Operation and the s will remain in the Test state until reset by issuing the 'Remove Test' command. The command text on the LCD will show No Operation after the 'Remove Test' command has been issued. Note: When the Test Mode cell is set to 's Blocked' the Relay O/P Status cell does not show the current status of the output relays and therefore cannot be used to confirm operation of the output relays. Therefore it will be necessary to monitor the state of each in turn.
3.8
TEST LEDS CELL
When the 'Apply Test' command in this cell is issued, the -programmable LEDs illuminate for approximately 2 seconds before switching off, and the command text on the LCD reverts to No Operation.
3.9
TEST AUTORECLOSE CELL
Where the IED provides an auto-reclose function, this cell will be available for testing the sequence of circuit breaker trip and auto-reclose cycles. The ‘3 Pole Test’ command causes the device to perform the first three phase trip/reclose cycle so that associated output s can be checked for operation at the correct times during the cycle. Once the trip output has operated the command text will revert to 'No Operation' whilst the rest of the auto-reclose cycle is performed. To test subsequent three-phase autoreclose cycles, you repeat the ‘3 Pole Test’ command.
590
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 15 - Commissioning Instructions
Note: The default settings for the programmable scheme logic has the ‘AR Trip Test’ signals mapped to the ‘Trip Input’ signals. If the programmable scheme logic has been changed, it is essential that these signals retain this mapping for the ‘Test Auto-reclose’ facility to work.
3.10
RED AND GREEN LED STATUS CELLS
These cells contain binary strings that indicate which of the -programmable red and green LEDs are illuminated when accessing from a remote location. A '1' indicates that a particular LED is illuminated. Note: When the status in both Red LED Status and Green LED Status cells is ‘1’, this indicates the LEDs illumination is yellow.
P14D-B/G/L/Z-TM-EN-1
591
Chapter 15 - Commissioning Instructions
4
COMMISSIONING EQUIPMENT
4.1
MINIMUM EQUIPMENT REQUIRED
P14D
As a minimum, the following equipment is required: ● Multifunctional current and voltage injection test set (where applicable) ● Multimeter with suitable AC current range, and DC voltage ranges of 0 - 440 V and 0 - 250 V respectively ● Continuity tester (if not included in multimeter). ● A portable PC, installed with appropriate software (MiCOM S1 Agile)
4.2
OPTIONAL EQUIPMENT REQUIRED
● Multi-finger test plug: ▪ P992 for test block type P991 ▪ MMLB for test block type MMLG blocks ● Electronic or brushless insulation tester with a DC output not exceeding 500 V ● KITZ K-Bus - EIA(RS)232 protocol converter for testing EIA(RS)485 K-Bus port, if applicable ● EIA(RS)485 to EIA(RS)232 converter for testing EIA(RS)485 Courier/MODBUS/IEC60870-5-103/ DNP3 port, if applicable ● A portable printer (for printing a setting record from the portable PC). ● Phase angle meter (where applicable) ● Phase rotation meter ● Fibre optic power meter (where applicable) ● Fibre optic test leads (where applicable)
592
P14D-B/G/L/Z-TM-EN-1
P14D
5
Chapter 15 - Commissioning Instructions
PRODUCT CHECKS
These product checks are designed to ensure that the device has not been physically damaged prior to commissioning, is functioning correctly and that all input quantity measurements are within the stated tolerances. If the application-specific settings have been applied to the IED prior to commissioning, you should make a copy of the settings. This will allow you to restore them at a later date if necessary. This can be done by: ● Obtaining a setting file from the customer. ● Extracting the settings from the IED itself, using a portable PC with appropriate setting software. If the customer has changed the that prevents unauthorised changes to some of the settings, either the revised should be provided, or the original restored before testing. Note: If the has been lost, a recovery can be obtained from Alstom Grid.
5.1
PRODUCT CHECKS WITH THE IED DE-ENERGISED Warning: The following group of tests should be carried out without the auxiliary supply being applied to the IED and, if applicable, with the trip circuit isolated.
The current and voltage transformer connections must be isolated from the IED for these checks. If a P991 test block is provided, the required isolation can be achieved by inserting test plug type P992. This open circuits all wiring routed through the test block. Before inserting the test plug, you should check the scheme diagram to ensure that this will not cause damage or a safety hazard (the test block may, for example, be associated with protection current transformer circuits). The sockets in the test plug, which correspond to the current transformer secondary windings, must be linked before the test plug is inserted into the test block. Warning: Never open-circuit the secondary circuit of a current transformer since the high voltage produced may be lethal and could damage insulation.
If a test block is not provided, the voltage transformer supply to the IED should be isolated by means of the links or connecting blocks. The line current transformers should be short-circuited and disconnected from the IED terminals. Where means of isolating the auxiliary supply and trip circuit (for example isolation links, fuses and MCB) are provided, these should be used. If this is not possible, the wiring to these circuits must be disconnected and the exposed ends suitably terminated to prevent them from being a safety hazard.
5.1.1
VISUAL INSPECTION Caution: Check the rating information provided with the device. Check that the IED being tested is correct for the line or circuit.
Carefully examine the IED to see that no physical damage has occurred since installation.
P14D-B/G/L/Z-TM-EN-1
593
Chapter 15 - Commissioning Instructions
P14D
Ensure that the case earthing connections (bottom left-hand corner at the rear of the IED case) are used to connect the IED to a local earth bar using an adequate conductor. Check that the current transformer shorting switches in the case are wired into the correct circuit. Ensure that, during withdrawal, they are closed by checking with a continuity tester. The shorting switches are between terminals 21 and 22, 23 and 24, 25 and 26, and 27 and 28.
5.1.2
INSULATION
Insulation resistance tests are only necessary during commissioning if explicitly requested. Isolate all wiring from the earth and test the insulation with an electronic or brushless insulation tester at a DC voltage not exceeding 500 V. Terminals of the same circuits should be temporarily connected together. The main groups of IED terminals are: ● ● ● ● ● ● ● ●
Voltage transformer circuits (not all models) Current transformer circuits (not all models) Supply voltage Opto-inputs Output Relay s EIA(RS)485 communication ports Ethernet communication ports (not all models) Case earth
The insulation resistance should be greater than 100 MW at 500 V. On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the IED.
5.1.3
EXTERNAL WIRING Caution: Check that the external wiring is correct according to the relevant IED and scheme diagrams. Ensure that phasing/phase rotation appears to be as expected.
If a P991 test block is provided, check the connections against the scheme diagram. We recommend that you make the supply connections to the live side of the test block (coloured orange) and use the odd numbered terminals. The auxiliary DC voltage supply uses terminals 13 (supply positive) and 14 (supply negative). Unlike the Kseries products, the P40Agile series does not provide a field voltage supply. For K-series retrofit applications where pin-to-pin compatibility is required, the equivalent P40 Agile products emulate the field voltage supply by having internal links between pins 7 and 13, and pins 8 and 14, respectively.
5.1.4
WATCHDOG S
Using a continuity tester, check that the Watchdog s are in the following states: De-energised
Terminals 3-5
Closed
4-6
Open
594
P14D-B/G/L/Z-TM-EN-1
P14D
5.1.5
Chapter 15 - Commissioning Instructions
POWER SUPPLY
The IED can accept a nominal DC voltage from 24 V DC to 250 V DC, or a nominal AC voltage from 110 V AC to 240 V AC at 50 Hz or 60 Hz. Ensure that the power supply is within this operating range. The power supply must be rated at 12 Watts. Warning: Do not energise the IED or interface unit using the battery charger with the battery disconnected as this can irreparably damage the power supply circuitry.
Caution: Energise the IED only if the auxiliary supply is within the specified operating ranges. If a test block is provided, it may be necessary to link across the front of the test plug to connect the auxiliary supply to the IED.
5.2
PRODUCT CHECKS WITH THE IED ENERGISED Warning: The current and voltage transformer connections must remain isolated from the IED for these checks. The trip circuit should also remain isolated to prevent accidental operation of the associated circuit breaker.
The following group of tests verifies that the IED hardware and software is functioning correctly and should be carried out with the supply applied to the IED.
5.2.1
WATCHDOG S
Using a continuity tester, check that the Watchdog s are in the following states: Terminals
Energised
3-5
Open
4-6
Closed
5.2.2
TEST LCD
The Liquid Crystal Display (LCD) is designed to operate in a wide range of substation ambient temperatures. For this purpose, the IEDs have an LCD Contrast setting. The contrast is factory pre-set, but it may be necessary to adjust the contrast to give the best in-service display. To change the contrast, you can increment or decrement the LCD Contrast cell in the CONFIGURATION column. Caution: Before applying a contrast setting, make sure that it will not make the display so light or dark such that menu text becomes unreadable. It is possible to restore the visibility of a display by ing a setting file, with the LCD Contrast set within the typical range of 7 - 11.
P14D-B/G/L/Z-TM-EN-1
595
Chapter 15 - Commissioning Instructions
5.2.3
P14D
DATE AND TIME
The date and time is stored in non-volatile memory. If the values are not already correct, set them to the correct values. The method of setting will depend on whether accuracy is being maintained by the IRIG-B port or by the IED's internal clock. When using IRIG-B to maintain the clock, the IED must first be connected to the satellite clock equipment (usually a P594), which should be energised and functioning. 1. 2. 3. 4. 5.
Set the IRIG-B Sync cell in the DATE AND TIME column to ‘Enabled’. Ensure the IED is receiving the IRIG-B signal by checking that cell IRIG-B Status reads ‘Active’. Once the IRIG-B signal is active, adjust the time offset of the universal co coordinated time (satellite clock time) on the satellite clock equipment so that local time is displayed. Check that the time, date and month are correct in the Date/Time cell. The IRIG-B signal does not contain the current year so it will need to be set manually in this cell. Reconnect the IRIG-B signal.
If the time and date is not being maintained by an IRIG-B signal, ensure that the IRIG-B Sync cell in the DATE AND TIME column is set to ‘Disabled’. 1.
5.2.4
Set the date and time to the correct local time and date using Date/Time cell or using the serial protocol.
TEST LEDS
On power-up, all LEDs should first flash yellow. Following this, the green "Healthy" LED should illuminate indicating that the device is healthy. The IED's non-volatile memory stores the states of the alarm, the trip, and the -programmable LED indicators (if configured to latch). These indicators may also illuminate when the auxiliary supply is applied. If any of these LEDs are ON then they should be reset before proceeding with further testing. If the LEDs successfully reset (the LED goes off), no testing is needed for that LED because it is obviously operational. Note: In most cases, alarms related to the communications channels will not reset at this stage.
5.2.5
TEST ALARM AND OUT-OF-SERVICE LEDS
The alarm and out of service LEDs can be tested using the COMMISSION TESTS menu column. 1. 2.
Set the Test Mode cell to ‘s Blocked’. Check that the out of service LED illuminates continuously and the alarm LED flashes.
It is not necessary to return the Test Mode cell to ‘Disabled’ at this stage because the test mode will be required for later tests.
5.2.6
TEST TRIP LED
The trip LED can be tested by initiating a manual circuit breaker trip. However, the trip LED will operate during the setting checks performed later. Therefore no further testing of the trip LED is required at this stage.
5.2.7
TEST -PROGRAMMABLE LEDS
To test these LEDs, set the Test LEDs cell to 'Apply Test'. Check that all -programmable LEDs illuminate.
596
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 15 - Commissioning Instructions
5.2.8
TEST OPTO-INPUTS
This test checks that all the opto-inputs on the IED are functioning correctly. The opto-inputs should be energised one at a time. For terminal numbers, please see the external connection diagrams in the "Wiring Diagrams" chapter. Ensuring correct polarity, connect the supply voltage to the appropriate terminals for the input being tested. The status of each opto-input can be viewed using either the Opto I/P Status cell in the SYSTEM DATA column, or the Opto I/P Status cell in the COMMISSION TESTS column. A '1' indicates an energised input and a '0' indicates a de-energised input. When each opto-input is energised, one of the characters on the bottom line of the display changes to indicate the new state of the input.
5.2.9
TEST OUTPUT RELAYS
This test checks that all the output relays are functioning correctly. 1. 2. 3. 4. 5. 6. 7. 8. 9.
Ensure that the IED is still in test mode by viewing the Test Mode cell in the COMMISSION TESTS column. Ensure that it is set to 'Blocked'. The output relays should be energised one at a time. To select output relay 1 for testing, set the Test Pattern cell as appropriate. Connect a continuity tester across the terminals corresponding to output relay 1 as shown in the external connection diagram. To operate the output relay set the Test cell to 'Apply Test'. Check the operation with the continuity tester. Measure the resistance of the s in the closed state. Reset the output relay by setting the Test cell to 'Remove Test'. Repeat the test for the remaining output relays. Return the IED to service by setting the Test Mode cell in the COMMISSION TESTS menu to 'Disabled'.
5.2.10
TEST SERIAL COMMUNICATION PORT RP1
You need only perform this test if the IED is to be accessed from a remote location. The test will vary depending on the communications protocol used. It is not the intention of this test to the operation of the complete communication link between the IED and the remote location, just the IED's rear communication port and, if applicable, the protocol converter. 5.2.10.1
CHECK PHYSICAL CONNECTIVITY
The rear communication port RP1 is presented on terminals 54 and 56. Screened twisted pair cable is used to make a connection to the port. The cable screen should be connected to the earth link just below pin 56:
P14D-B/G/L/Z-TM-EN-1
597
Chapter 15 - Commissioning Instructions
P14D
E01402
Figure 168: RP1 physical connection For K-Bus applications, pins 54 and 56 are not polarity sensitive and it does not matter which way round the wires are connected. EIA(RS)485 is polarity sensitive, so you must ensure the wires are connected the correct way round (pin 54 is positive, pin 56 is negative). If K-Bus is being used, a Kitz protocol converter (KITZ101, KITZ102 OR KITZ201) will have been installed to convert the K-Bus signals into RS232. Likewise, if RS485 is being used, an RS485-RS232 converter will have been installed. In the case where a protocol converter is being used, a laptop PC running appropriate software (such as MiCOM S1 Agile) can be connected to the incoming side of the protocol converter. An example for K-bus to RS232 conversion is shown below. RS485 to RS232 would follow the same principle, only using a RS485-RS232 converter. Most modern laptops have USB ports, so it is likely you will also require a RS232 to USB converter too.
IED
IED
IED
RS232
Computer
RS232-USB converter
K-Bus
KITZ protocol converter
V01001
Figure 169: Remote communication using K-bus 5.2.10.2
CHECK LOGICAL CONNECTIVITY
The logical connectivity depends on the chosen data protocol, but the principles of testing remain the same for all protocol variants: 1. 2. 3.
598
Ensure that the communications baud rate and parity settings in the application software are set the same as those on the protocol converter. For Courier models, ensure that you have set the correct RP1 address Check that communications can be established with this IED using the portable PC/Master Station.
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 15 - Commissioning Instructions
5.2.11
TEST SERIAL COMMUNICATION PORT RP2
RP2 is only available on selected models. If applicable, this test is the same as for RP1 only the relevant terminals are 82 and 84.
5.2.12
TEST ETHERNET COMMUNICATION
To test the Ethernet communication: 1. 2.
3.
Connect a portable PC running the appropriate IEC 61850 Client Software or MMS browser to the IED's Ethernet port. Configure the IP parameters (IP Address, Subnet Mask, Gateway) and SNTP time synchronisation parameters (SNTP Server 1, SNTP Server 2). You can import the IP parameter configuration from an SCL file or apply them manually using the IED Configurator tool, which is installed as part of MiCOM S1 Agile. These cannot be configured via the IED’s HMI on the front . Check that communication with this IED can be established.
Note: If the assigned IP address is duplicated elsewhere on the same network, the remote communications will operate in an indeterminate way. However, the device will check for a conflict on every IP configuration change and at power up. An alarm will be raised if an IP conflict is detected. The device can be configured to accept data from networks other than the local network by using the ‘Gateway’ setting.
5.2.13
TEST CURRENT INPUTS
This test verifies that the current measurement inputs are configured correctly. All devices leave the factory set for operation at a system frequency of 50 Hz. If operation at 60 Hz is required then this must be set in the Frequency cell in the SYSTEM DATA column. 1. 2. 3.
Apply current equal to the line current transformer secondary winding rating to each current transformer input in turn. Check its magnitude using a multi-meter or test set readout. The corresponding reading can then be checked in the MEASUREMENTS 1 column. Record the displayed value. The measured current values will either be in primary or secondary Amperes. If the Local Values cell in the MEASURE’T SETUP column is set to 'Primary', the values displayed should be equal to the applied current multiplied by the corresponding current transformer ratio (set in the TRANS. RATIOS column), as shown below. If the Local Values cell is set to Secondary, the value displayed should be equal to the applied current.
Note: If a PC connected to the IED using the rear communications port is being used to display the measured current, the process will be similar. However, the setting of the Remote Values cell in the MEASURE’T SETUP column will determine whether the displayed values are in primary or secondary Amperes.
The measurement accuracy of the IED is ±1%. However, an additional allowance must be made for the accuracy of the test equipment being used. Cell in MEASUREMENTS 1
Corresponding CT ratio (in TRANS. RATIOS column)
IA magnitude IB magnitude IC magnitude
Phase CT Primary / Phase CT Sec'y
IN measured mag
E/F CT Primary / E/F CT Secondary
P14D-B/G/L/Z-TM-EN-1
599
Chapter 15 - Commissioning Instructions
Cell in MEASUREMENTS 1 ISEF magnitude
5.2.14
P14D
Corresponding CT ratio (in TRANS. RATIOS column) SEF CT Primary / SEF CT Secondary
TEST VOLTAGE INPUTS
This test verifies that the voltage measurement inputs are configured correctly. 1. 2. 3.
Apply rated voltage to each voltage transformer input in turn Check its magnitude using a multimeter or test set readout. The corresponding reading can then be checked in the MEASUREMENTS 1 column. Record the value displayed. The measured voltage values will either be in primary or secondary Volts. If the Local Values cell in the MEASURE’T SETUP column is set to 'Primary', the values displayed should be equal to the applied voltage multiplied by the corresponding voltage transformer ratio (set in the TRANS. RATIOS column) as shown below. If the Local Values cell is set to Secondary, the value displayed should be equal to the applied voltage.
Note: If a PC connected to the IED using the rear communications port is being used to display the measured current, the process will be similar. However, the setting of the Remote Values cell in the MEASURE’T SETUP column will determine whether the displayed values are in primary or secondary Amperes.
Cell in MEASUREMENTS 1
Corresponding VT ratio (in TRANS. RATIOS column)
VAN magnitude VBN magnitude VCN magnitude
Main VT Primary / Main VT Sec'y
C/S Voltage Mag
C/S VT Primary / C/S VT Secondary
600
P14D-B/G/L/Z-TM-EN-1
P14D
6
Chapter 15 - Commissioning Instructions
SETTING CHECKS
The setting checks ensure that all of the application-specific settings (both the IED’s function and programmable scheme logic settings) have been correctly applied. Note: If applicable, the trip circuit should remain isolated during these checks to prevent accidental operation of the associated circuit breaker.
6.1
APPLY APPLICATION-SPECIFIC SETTINGS
There are two different methods of applying the settings to the IED ● Transferring settings to the IED from a pre-prepared setting file using MiCOM S1 Agile ● Enter the settings manually using the IED’s front HMI
6.1.1
TRANSFERRING SETTINGS FROM A SETTINGS FILE
This is the preferred method for transferring function settings as it is much faster, and there is a lower margin for error. 1.
2. 3. 4.
Connect a laptop/PC (that is running MiCOM S1 Agile) to the IED's front port (could be serial RS232 or USB depending on the product), or a rear Courier communications port (with a KITZ protocol converter if necessary). Power on the IED Right-click on the appropriate device name in the System Explorer pane and select Send In the Send to dialog select the setting files and click Send
Note: If the device name does not already exist in the System Explorer system, then first perform a Quick Connect to the IED. It will then be necessary to manually add the settings file to the device name in the Studio Explorer system. Refer to the MiCOM S1 Studio help for details of how to do this.
6.1.2
ENTERING SETTINGS USING THE HMI
It is not possible to change the PSL using the IED’s front HMI. 1. 2.
Starting at the default display, press the Down cursor key to show the first column heading. Use the horizontal cursor keys to select the required column heading.
3. 4.
Use the vertical cursor keys to view the setting data in the column. To return to the column header, either press the Up cursor key for a second or so, or press the Cancel key once. It is only possible to move across columns at the column heading level. To return to the default display, press the Up cursor key or the Cancel key from any of the column headings. If you use the auto-repeat function of the Up cursor key, you cannot go straight to the default display from one of the column cells because the auto-repeat stops at the column heading. To change the value of a setting, go to the relevant cell in the menu, then press the Enter key to change the cell value. A flashing cursor on the LCD shows that the value can be changed. You may be prompted for a first. To change the setting value, press the vertical cursor keys. If the setting to be changed is a binary value or a text string, select the required bit or character to be changed using the left and right cursor keys.
5.
6.
7.
P14D-B/G/L/Z-TM-EN-1
601
Chapter 15 - Commissioning Instructions
8. 9.
P14D
Press the Enter key to confirm the new setting value or the Clear key to discard it. The new setting is automatically discarded if it is not confirmed within 15 seconds. For protection group settings and disturbance recorder settings, the changes must be confirmed before they are used. When all required changes have been entered, return to the column heading level and press the down cursor key. Before returning to the default display, the following prompt appears. Update settings? ENTER or CLEAR
10.
Press the Enter key to accept the new settings or press the Clear key to discard the new settings.
Note: If the menu time-out occurs before the setting changes have been confirmed, the setting values are also discarded. Control and settings are updated immediately after they are entered, without the Update settings prompt. It is not possible to change the PSL using the IED’s front HMI.
Caution: Where the installation needs application-specific PSL, the relevant .psl files, must be transferred to the IED, for each and every setting group that will be used. If you do not do this, the factory default PSL will still be resident. This may have severe operational and safety consequences.
602
P14D-B/G/L/Z-TM-EN-1
P14D
7
Chapter 15 - Commissioning Instructions
PROTECTION TIMING CHECKS
There is no need to check every protection function. Only one protection function needs to be checked as the purpose is to the timing on the processor is functioning correctly.
7.1
OVERCURRENT CHECK
If the overcurrent protection function is being used, test the overcurrent protection for stage 1. 1.
Check for any possible dependency conditions and simulate as appropriate.
2. 3. 4. 5. 6.
In the CONFIGURATION column, disable all protection elements other than the one being tested. Make a note of which elements need to be re-enabled after testing. Connect the test circuit Perform the test Check the operating time
7.2 1. 2. 3.
CONNECTING THE TEST CIRCUIT Use the PSL to determine which output relay will operate when an overcurrent trip occurs. Use the output relay assigned to Trip Output A. Use the PSL to map the protection stage under test directly to an output relay.
Note: If using the default PSL, use output relay 3 as this is already mapped to the DDB signal Trip Command Out.
4. 5.
6.
Connect the output relay so that its operation will trip the test set and stop the timer. Connect the current output of the test set to the A-phase current transformer input. If the I>1 Directional cell in the OVERCURRENT column is set to ‘Directional Fwd’, the current should flow out of terminal 21. If set to ‘Directional Rev’, it should flow into terminal 21. If the I>1 Directional cell in the OVERCURRENT column has been set to ‘Directional Fwd’ or ‘Directional Rev’, the rated voltage should be applied to terminals 18 and 19. Ensure that the timer starts when the current is applied.
Note: If the timer does not stop when the current is applied and stage 1 has been set for directional operation, the connections may be incorrect for the direction of operation set. Try again with the current connections reversed.
7.3 1. 2. 3. 4.
7.4
PERFORMING THE TEST Ensure that the timer is reset. Apply a current of twice the setting shown in the I>1 Current Set cell in the OVERCURRENT column. Note the time displayed when the timer stops. Check that the red trip LED has illuminated.
CHECK THE OPERATING TIME
Check that the operating time recorded by the timer is within the range shown below. For all characteristics, allowance must be made for the accuracy of the test equipment being used.
P14D-B/G/L/Z-TM-EN-1
603
Chapter 15 - Commissioning Instructions
P14D
Operating time at twice current setting and time multiplier/ time dial setting of 1.0
Characteristic
Nominal (seconds)
Range (seconds)
DT
I>1 Time Delay] setting
Setting ±2%
IEC S Inverse
10.03
9.53 - 10.53
IEC V Inverse
13.50
12.83 - 14.18
IEC E Inverse
26.67
24.67 - 28.67
UK LT Inverse
120.00
114.00 - 126.00
IEEE M Inverse
3.8
3.61 - 4.0
IEEE V Inverse
7.03
6.68 - 7.38
IEEE E Inverse
9.50
9.02 - 9.97
US Inverse
2.16
2.05 - 2.27
US ST Inverse
12.12
11.51 - 12.73
Note: With the exception of the definite time characteristic, the operating times given are for a Time Multiplier Setting (TMS) or Time Dial Setting (TDS) of 1. For other values of TMS or TDS, the values need to be modified accordingly.
Note: For definite time and inverse characteristics there is an additional delay of up to 0.02 second and 0.08 second respectively. You may need to add this the IED's acceptable range of operating times.
Caution: On completion of the tests, you must restore all settings that were disabled for testing purposes.
604
P14D-B/G/L/Z-TM-EN-1
P14D
8
Chapter 15 - Commissioning Instructions
ONLOAD CHECKS
Onload checks can only be carried out if there are no restrictions preventing the energisation of the plant, and the other devices in the group have already been commissioned. Remove all test leads and temporary shorting links, then replace any external wiring that has been removed to allow testing. Warning: If any external wiring has been disconnected for the commissioning process, replace it in accordance with the relevant external connection or scheme diagram.
8.1 1. 2.
3. 4.
CONFIRM CURRENT CONNECTIONS Measure the current transformer secondary values for each input using a multimeter connected in series with the corresponding current input. Check that the current transformer polarities are correct by measuring the phase angle between the current and voltage, either against a phase meter already installed on site and known to be correct or by determining the direction of power flow by ing the system control centre. Ensure the current flowing in the neutral circuit of the current transformers is negligible. Compare the values of the secondary phase currents and phase angle with the measured values, which can be found in the MEASUREMENTS 1 column.
If the Local Values cell is set to ‘Secondary’, the values displayed should be equal to the applied secondary voltage. The values should be within 1% of the applied secondary voltages. However, an additional allowance must be made for the accuracy of the test equipment being used. If the Local Values cell is set to ‘Primary’, the values displayed should be equal to the applied secondary voltage multiplied the corresponding voltage transformer ratio set in the TRANS. RATIOS column. The values should be within 1% of the expected values, plus an additional allowance for the accuracy of the test equipment being used.
8.2 1. 2. 3.
CONFIRM VOLTAGE CONNECTIONS Using a multimeter, measure the voltage transformer secondary voltages to ensure they are correctly rated. Check that the system phase rotation is correct using a phase rotation meter. Compare the values of the secondary phase voltages with the measured values, which can be found in the MEASUREMENTS 1 menu column. Cell in MEASUREMENTS 1 Column
VAB Magnitude VBC Magnitude VCA Magnitude VAN Magnitude VBN Magnitude VCN Magnitude C/S Voltage Mag.
P14D-B/G/L/Z-TM-EN-1
Corresponding VT ratio in ‘TRANS. RATIO column
Main VT Primary / Main VT Sec'y
CS VT Primary / CS VT Secondary
605
Chapter 15 - Commissioning Instructions
P14D
If the Local Values cell is set to ‘Secondary’, the values displayed should be equal to the applied secondary voltage. The values should be within 1% of the applied secondary voltages. However, an additional allowance must be made for the accuracy of the test equipment being used. If the Local Values cell is set to ‘Primary’, the values displayed should be equal to the applied secondary voltage multiplied the corresponding voltage transformer ratio set in the TRANS. RATIOS column. The values should be within 1% of the expected values, plus an additional allowance for the accuracy of the test equipment being used.
8.3
ON-LOAD DIRECTIONAL TEST
This test ensures that directional overcurrent and fault locator functions have the correct forward/reverse response to fault and load conditions. For this test you must first know the actual direction of power flow on the system. If you do not already know this you must determine it using adjacent instrumentation or protection already in-service. ● For load current flowing in the Forward direction (power export to the remote line end), the A Phase Watts cell in the MEASUREMENTS 2 column should show positive power g. ● For load current flowing in the Reverse direction (power import from the remote line end), the A Phase Watts cell in the MEASUREMENTS 2 column should show negative power g. Note: This check applies only for Measurement Modes 0 (default), and 2. This should be checked in the MEASURE’T. SETUP column (Measurement Mode = 0 or 2). If measurement modes 1 or 3 are used, the expected power flow g would be opposite to that shown above.
In the event of any uncertainty, check the phase angle of the phase currents with respect to their phase voltage.
606
P14D-B/G/L/Z-TM-EN-1
P14D
9 1. 2.
3. 4. 5. 6.
7. 8. 9.
Chapter 15 - Commissioning Instructions
FINAL CHECKS Remove all test leads and temporary shorting leads. If you have had to disconnect any of the external wiring in order to perform the wiring verification tests, replace all wiring, fuses and links in accordance with the relevant external connection or scheme diagram. Ensure that the IED has been restored to service by checking that the Test Mode cell in the COMMISSION TESTS column is set to ‘Disabled’. The settings applied should be carefully checked against the required application-specific settings to ensure that they are correct, and have not been mistakenly altered during testing. Ensure that all protection elements required have been set to Enabled in the CONFIGURATION column If the IED is in a new installation or the circuit breaker has just been maintained, the circuit breaker maintenance and current counters should be zero. These counters can be reset using the Reset All Values cell. If the required access level is not active, the device will prompt for a to be entered so that the setting change can be made. If the menu language has been changed to allow accurate testing it should be restored to the customer’s preferred language. If a P991/MMLG test block is installed, remove the P992/MMLB test plug and replace the cover so that the protection is put into service. Ensure that all event records, fault records, disturbance records, alarms and LEDs and communications statistics have been reset.
P14D-B/G/L/Z-TM-EN-1
607
Chapter 15 - Commissioning Instructions
608
P14D
P14D-B/G/L/Z-TM-EN-1
MAINTENANCE AND TROUBLESHOOTING CHAPTER 16
Chapter 16 - Maintenance and Troubleshooting
610
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 16 - Maintenance and Troubleshooting
CHAPTER OVERVIEW
The Maintenance and Troubleshooting chapter provides details of how to maintain and troubleshoot products based on the Px4x and P40Agile platforms. Always follow the warning signs in this chapter Failure to do so may result injury or defective equipment. Caution: Before carrying out any work on the equipment you should be familiar with the contents of the Safety Section or the Safety Guide SFTY/4LM and the ratings on the equipment’s rating label.
The troubleshooting part of the chapter allows an error condition on the IED to be identified so that appropriate corrective action can be taken. If the IED develops a fault, it is usually possible to identify which module needs replacing. It is not possible to perform an on-site repair to a faulty module. If you return a faulty unit or module to the manufacturer or one of their approved service centres, you should include a completed copy of the Repair or Modification Return Authorization (RMA) form. This chapter contains the following sections: Chapter Overview Maintenance Troubleshooting
611 612 614
P14D-B/G/L/Z-TM-EN-1
611
Chapter 16 - Maintenance and Troubleshooting
2
MAINTENANCE
2.1
MAINTENANCE CHECKS
P14D
In view of the critical nature of the application, Alstom Grid products should be checked at regular intervals to confirm they are operating correctly. Alstom Grid products are designed for a life in excess of 20 years. The devices are self-supervising and so require less maintenance than earlier designs of protection devices. Most problems will result in an alarm, indicating that remedial action should be taken. However, some periodic tests should be carried out to ensure that they are functioning correctly and that the external wiring is intact. It is the responsibility of the customer to define the interval between maintenance periods. If your organisation has a Preventative Maintenance Policy, the recommended product checks should be included in the regular program. Maintenance periods depend on many factors, such as: ● ● ● ● ●
The operating environment The accessibility of the site The amount of available manpower The importance of the installation in the power system The consequences of failure
Although some functionality checks can be performed from a remote location, these are predominantly restricted to checking that the unit is measuring the applied currents and voltages accurately, and checking the circuit breaker maintenance counters. For this reason, maintenance checks should also be performed locally at the substation. Caution: Before carrying out any work on the equipment you should be familiar with the contents of the Safety Section or the Safety Guide SFTY/4LM and the ratings on the equipment’s rating label.
2.1.1
ALARMS
First check the alarm status LED to see if any alarm conditions exist. If so, press the Read key repeatedly to step through the alarms. After dealing with any problems, clear the alarms. This will clear the relevant LEDs.
2.1.2
OPTO-ISOLATORS
Check the opto-inputs by repeating the commissioning test detailed in the Commissioning chapter.
2.1.3
OUTPUT RELAYS
Check the output relays by repeating the commissioning test detailed in the Commissioning chapter.
2.1.4
MEASUREMENT ACCURACY
If the power system is energised, the measured values can be compared with known system values to check that they are in the expected range. If they are within a set range, this indicates that the A/D conversion and the calculations are being performed correctly. Suitable test methods can be found in Commissioning chapter. Alternatively, the measured values can be checked against known values injected into the device using the test block, (if fitted) or injected directly into the IED's terminals. Suitable test methods can be found in the Commissioning chapter. These tests will prove the calibration accuracy is being maintained.
612
P14D-B/G/L/Z-TM-EN-1
P14D
2.2
Chapter 16 - Maintenance and Troubleshooting
REPLACING THE UNIT
If your product should develop a fault while in service, depending on the nature of the fault, the watchdog s will change state and an alarm condition will be flagged. In the case of a fault, you should normally replace the cradle which slides easily out of the case. This can be done without disturbing the scheme wiring. In the unlikely event that the problem lies with the wiring and/or terminals, then you must replace the complete device, rewire and re-commission the device. Caution: If the repair is not performed by an approved service centre, the warranty will be invalidated. Caution: Before carrying out any work on the equipment, you should be familiar with the contents of the Safety Information section of this guide or the Safety Guide SFTY/4LM, as well as the ratings on the equipment’s rating label. This should ensure that no damage is caused by incorrect handling of the electronic components. Warning: Before working at the rear of the unit, isolate all voltage and current supplying it.
Note: The Alstom Grid products have integral current transformer shorting switches which will close, for safety reasons, when the terminal block is removed.
To replace the cradle without disturbing the case and wiring: 1. 2. 3.
Remove the faceplate. Carefully withdraw the cradle from the front. To reinstall the unit, follow the above instructions in reverse, ensuring that each terminal block is relocated in the correct position and the chassis ground, IRIG-B and fibre optic connections are replaced. The terminal blocks are labelled alphabetically with ‘A’ on the left hand side when viewed from the rear. Once the unit has been reinstalled, it should be re-commissioned as set out in the Commissioning chapter.
2.3
CLEANING Warning: Before cleaning the IED, ensure that all AC and DC supplies and transformer connections are isolated, to prevent any chance of an electric shock while cleaning.
Only clean the equipment with a lint-free cloth dampened with clean water. Do not use detergents, solvents or abrasive cleaners as they may damage the product's surfaces and leave a conductive residue.
P14D-B/G/L/Z-TM-EN-1
613
Chapter 16 - Maintenance and Troubleshooting
P14D
3
TROUBLESHOOTING
3.1
SELF-DIAGNOSTIC SOFTWARE
The IED includes several self-monitoring functions to check the operation of its hardware and software while in service. If there is a problem with the hardware or software, it should be able to detect and report the problem, and attempt to resolve the problem by performing a reboot. In this case, the device would be out of service for a short time, during which the ‘Healthy’ LED on the front of the device is switched OFF and the watchdog at the rear is ON. If the restart fails to resolve the problem, the unit takes itself permanently out of service; the ‘Healthy’ LED stays OFF and watchdog stays ON. If a problem is detected by the self-monitoring functions, the device attempts to store a maintenance record to allow the nature of the problem to be communicated to the . The self-monitoring is implemented in two stages: firstly a thorough diagnostic check which is performed on boot-up, and secondly a continuous self-checking operation, which checks the operation of the critical functions whilst it is in service.
3.2
POWER-UP ERRORS
If the IED does not appear to power up, use the following checks to determine whether the fault is in the external wiring, auxiliary fuse, IED power supply module or IED front . Test
Check
Action
1
Measure the voltage on terminals 13 and 14. the If the auxiliary voltage is correct, go to test 2. Otherwise check the wiring and voltage level and polarity against the rating label fuses in the auxiliary supply.
2
Check the LEDs and LCD backlight switch on at power-up. Also check the N/O (normally open) watchdog on terminals 4 and 6 to see if they close.
3.3
If the LEDs and LCD backlight switch on, or the Watchdog s close and no error code is displayed, the error is probably on the main processor board. If the LEDs and LCD backlight do not switch on and the N/O Watchdog does not close, the fault is probably in the IED power supply module.
ERROR MESSAGE OR CODE ON POWER-UP
The IED performs a self-test during power-up. If it detects an error, a message appears on the LCD and the power-up sequence stops. If the error occurs when the IED application software is running, a maintenance record is created and the device reboots. Test
Check
Action
1
If the IED locks up and displays an error code permanently, go to test 2. Is an error message or code permanently displayed during If the IED prompts for input, go to test 3. power up? If the IED reboots automatically, go to test 4.
2
Record displayed error and re-apply IED supply.
Record whether the same error code is displayed when the IED is rebooted, then the local service centre stating the error code and product details.
3
The IED displays a message for corrupt settings and prompts for the default values to be restored for the affected settings.
The power-up tests have detected corrupted IED settings. Restore the default settings to allow the power-up to complete, and then reapply the application-specific settings.
The IED resets when the power-up is complete. A record error code is displayed.
Programmable scheme logic error due to excessive execution time. Restore the default settings by powering up with both horizontal cursor keys pressed, then confirm restoration of defaults at the prompt using the Enter key. If the IED powers up successfully, check the programmable logic for paths. Other error codes relate to software errors on the main processor board, the local service centre.
4
614
P14D-B/G/L/Z-TM-EN-1
P14D
3.4
Chapter 16 - Maintenance and Troubleshooting
OUT OF SERVICE LED ON AT POWER-UP
Test
Check
Action
1
Using the IED menu, confirm the Commission Test or Test If the setting is Enabled, disable the test mode and make sure the Out of Mode setting is Enabled. If it is not Enabled, go to test 2. Service LED is OFF.
2
Check for the H/W Fail maintenance record. This indicates a discrepancy between the IED model number and the hardware. Examine the Maint Data; cell. This indicates the causes of the failure using bit fields: Bit Meaning
Select the VIEW RECORDS column then view the last maintenance record from the menu.
3.5
0
The application 'type' field in the Cortec does not match the software ID
1
The 'subset' field in the model number does not match the software ID
2
The 'platform' field in the model number does not match the software ID
3
The 'product type' field in the model number does not match the software ID
4
The 'protocol' field in the Cortec does not match the software ID
5
The 'model' field in the Cortec does not match the software ID
6
The first 'software version' field in the does not match the software ID
7
The second 'software version' field in the Cortec does not match the software ID
8
No VTs are fitted
9
No CTs are fitted
10
No Earth CT is fitted
11
No SEF CT is fitted
ERROR CODE DURING OPERATION
The IED performs continuous self-checking. If the IED detects an error it displays an error message, logs a maintenance record and after a short delay resets itself. A permanent problem (for example due to a hardware fault) is usually detected in the power-up sequence. In this case the IED displays an error code and halts. If the problem was transient, the IED reboots correctly and continues operation. By examining the maintenance record logged, the nature of the detected fault can be determined.
3.6
MAL-OPERATION DURING TESTING
3.6.1
FAILURE OF OUTPUT S
An apparent failure of the relay output s can be caused by the configuration. Perform the following tests to identify the real cause of the failure. The self-tests that the coils of the output relay s have been energized. An error is displayed if there is a fault in the output relay board. Check
Test
Action If this LED is ON, the relay may be in test mode or the protection has been disabled due to a hardware error.
1
Is the Out of Service LED ON?
2
Examine the status in the Commissioning section If the relevant bits of the status are operated, go to test 4; if not, of the menu. go to test 3.
P14D-B/G/L/Z-TM-EN-1
615
Chapter 16 - Maintenance and Troubleshooting
Test
P14D
Check
Action
3
Examine the fault record or use the test port to check the protection element is operating correctly.
If the protection element does not operate, check the test is correctly applied. If the protection element operates, check the programmable logic to make sure the protection element is correctly mapped to the s.
4
Using the Commissioning or Test mode function, apply a test pattern to the relevant relay output s. Consult the correct external connection diagram and use a continuity tester at the rear of the relay to check the relay output s operate.
If the output relay operates, the problem must be in the external wiring to the relay. If the output relay does not operate the output relay s may have failed (the self-tests that the relay coil is being energized). Ensure the closed resistance is not too high for the continuity tester to detect.
3.6.2
FAILURE OF OPTO-INPUTS
The opto-isolated inputs are mapped onto the IED's internal DDB signals using the programmable scheme logic. If an input is not recognized by the scheme logic, use the Opto I/P Status cell in the COMMISSION TESTS column to check whether the problem is in the opto-input itself, or the mapping of its signal to the scheme logic functions. If the device does not correctly read the opto-input state, test the applied signal. the connections to the opto-input using the wiring diagram and the nominal voltage settings in the OPTO CONFIG column. To do this: 1.
Select the nominal battery voltage for all opto-inputs by selecting one of the five standard ratings in the Global Nominal V cell. 2. Select 'Custom' to set each opto-input individually to a nominal voltage. 3. Using a voltmeter, check that the voltage on its input terminals is greater than the minimum pick-up level (See the Technical Specifications chapter for opto pick-up levels). If the signal is correctly applied, this indicates failure of an opto-input, which case, the complete cradle should be replaced.
3.6.3
INCORRECT ANALOGUE SIGNALS
If the measured analogue quantities do not seem correct, use the measurement function to determine the type of problem. The measurements can be configured in primary or secondary . 1. 2. 3. 4.
Compare the displayed measured values with the actual magnitudes at the terminals. Check the correct terminals are used Check the CT and VT ratios set are correct. Check the phase displacement to confirm the inputs are correctly connected
3.7
PSL EDITOR TROUBLESHOOTING
A failure to open a connection could be due to one or more of the following: ● ● ● ● ● ●
3.7.1
The IED address is not valid (this address is always 1 for the front port) in not valid Communication set-up (COM port, Baud rate, or Framing) is not correct Transaction values are not suitable for the IED or the type of connection The connection cable is not wired correctly or broken The option switches on any protocol converter used may be incorrectly set
DIAGRAM RECONSTRUCTION
Although a scheme can be extracted from an IED, a facility is provided to recover a scheme if the original file is unobtainable.
616
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 16 - Maintenance and Troubleshooting
A recovered scheme is logically correct but much of the original graphical information is lost. Many signals are drawn in a vertical line down the left side of the canvas. Links are drawn orthogonally using the shortest path from A to B. Any annotation added to the original diagram such as titles and notes are lost. Sometimes a gate type does not appear as expected. For example, a single-input AND gate in the original scheme appears as an OR gate when ed. Programmable gates with an inputs-to-trigger value of 1 also appear as OR gates
3.7.2
PSL VERSION CHECK
The PSL is saved with a version reference, time stamp and CRC check. This gives a visual check whether the default PSL is in place or whether a new application has been ed.
3.8
REPAIR AND MODIFICATION PROCEDURE
Please follow these steps to return an Automation product to us: 1.
2.
3.
4.
5.
Get the Repair and Modification Return Authorization (RMA) form For an electronic version of the RMA form, go to the following url: http://www.alstom.com/grid/productrepair/ Fill in the RMA form Fill in only the white part of the form. Please ensure that all fields marked (M) are completed such as: ▪ Equipment model ▪ Model No. and Serial No. ▪ Description of failure or modification required (please be specific) ▪ Value for customs (in case the product requires export) ▪ Delivery and invoice addresses ▪ details Send the RMA form to your local For a list of local service s worldwide, go to following url: http://www.alstom.com/grid/productrepair/ The local service provides the shipping information Your local service provides you with all the information needed to ship the product: ▪ Pricing details ▪ RMA number ▪ Repair centre address If required, an acceptance of the quote must be delivered before going to the next stage. Send the product to the repair centre ▪ Address the shipment to the repair centre specified by your local ▪ Make sure all items are packaged in an anti-static bag and foam protection ▪ Make sure a copy of the import invoice is attached with the returned unit ▪ Make sure a copy of the RMA form is attached with the returned unit ▪ E-mail or fax a copy of the import invoice and airway bill document to your local .
P14D-B/G/L/Z-TM-EN-1
617
Chapter 16 - Maintenance and Troubleshooting
618
P14D
P14D-B/G/L/Z-TM-EN-1
TECHNICAL SPECIFICATIONS CHAPTER 17
Chapter 17 - Technical Specifications
620
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Chapter 17 - Technical Specifications
CHAPTER OVERVIEW
This chapter describes the technical specifications of the product. This chapter contains the following sections: Chapter Overview Interfaces Current Protection Functions Voltage and Frequency Protection Functions Power Protection Functions Monitoring and Control Measurements and Recording Standards Compliance Mechanical Specifications Ratings Environmental Conditions Type Tests Electromagnetic Compatibility
621 622 625 630 634 635 637 638 639 640 643 644 645
P14D-B/G/L/Z-TM-EN-1
621
Chapter 17 - Technical Specifications
2
INTERFACES
2.1
FRONT USB PORT
P14D
Front USB port Use
For local connection to laptop for configuration purposes and firmware s
Standard
USB
Connector
USB type B
Isolation
Isolation to ELV level
Protocol
Courier
Constraints
Maximum cable length 5 m
2.2
REAR SERIAL PORT 1 Rear serial port 1
Use
For SCADA communications (multi-drop)
Standard
EIA(RS)485, K-bus
Terminal type
MiDOS
Connector
General purpose block, M4 screws (2 wire)
Cable
Screened twisted pair (STP)
ed Protocols
Courier, IEC-60870-5-103, DNP3.0, MODBUS
Isolation
Isolation to SELV level
Constraints
Maximum cable length 1000 m
2.3
REAR SERIAL PORT 2 Rear serial port 2
Use
For SCADA communications (multi-drop)
Standard
EIA(RS)485, K-bus, EIA(RS)232
Terminal type
MiDOS
Connector
General purpose block, M4 screws (2 wire)
Cable
Screened twisted pair (STP)
ed Protocols
Courier
Isolation
Isolation to SELV level
Constraints
Maximum cable length 1000 m
2.4
IRIG-B PORT IRIG-B Interface (De-modulated)
Use
External clock synchronization signal
Standard
IRIG 200-98 format B00X
Terminal type
MiDOS
Connector
General purpose block, M4 screws (2 wire)
Cable type
Screened twisted pair (STP)
622
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
IRIG-B Interface (De-modulated) Isolation
Isolation to SELV level
Constraints
Maximum cable length 1000 m
Accuracy
< +/- 1 s per day
2.5
REAR ETHERNET PORT - FIBRE Rear Ethernet port (fiber)
Main Use
IEC 61850 or DNP3 SCADA communications
Connector
UNI SONET OC-3 LC (1 each for Tx and Rx)
Standard
IEEE 802.3.u 100 BaseFX
Fibre type
Multimode 50/125 µm or 62.5/125 µm
ed Protocols
IEC 61850, DNP3.0 / Ethernet
Wavelength
1300 nm
2.5.1
100 BASE FX RECEIVER CHARACTERISTICS Parameter
Sym
Min.
Typ.
Max.
Unit
Input Optical Power Minimum at PIN Min. (W) Window Edge
-33.5
–31
dBm avg.
Input Optical Power Minimum at PIN Min. (C) Eye Center
-34.5
-31.8
Bm avg.
Input Optical Power Maximum
PIN Max.
-14
-11.8
dBm avg.
Conditions: TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V
2.5.2
100 BASE FX TRANSMITTER CHARACTERISTICS Parameter
Output Optical Power BOL 62.5/125 µm NA = 0.275 Fibre EOL
Sym PO
Output Optical Power BOL 50/125 µm PO NA = 0.20 Fibre EOL
Min.
Typ.
Unit
-19 -20
-16.8
-14
dBm avg.
-22.5 -23.5
-20.3
-14
dBm avg.
10 -10
% dB
-45
dBm avg.
Optical Extinction Ratio Output Optical Power at Logic "0" State
Max.
PO
Conditions: TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V
2.6
REAR ETHERNET PORT COPPER Rear Ethernet port (copper)
Main Use
IEC 61850 or DNP3.0 OE SCADA communications
Standard
IEEE 802.3 10BaseT/100BaseTX
Connector
RJ45
P14D-B/G/L/Z-TM-EN-1
623
Chapter 17 - Technical Specifications
P14D
Rear Ethernet port (copper) Cable type
Screened twisted pair (STP)
Isolation
1 kV
ed Protocols
IEC 61850, DNP3.0 / Over Ethernet
Constraints
Maximum cable length 10 m
624
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
3
CURRENT PROTECTION FUNCTIONS
3.1
THREE-PHASE CURRENTPROTECTION Accuracy
DT Pick-up
Setting +/- 5%
Drop-off
0.95 x setting +/- 5%
Minimum trip level for IDMT elements
1.05 x Setting +/-5%
IDMT shape
According to IEC 60255-151:2009
IEEE reset
+/- 5% or 50 ms, whichever is greater
DT Operation
+/- 2% or 70 ms, whichever is greater (1.05 – <2) Is +/- 2% or 50 ms, whichever is greater (2 – 20) Is
DT Reset
+/- 5%
Repeatability
+/- 2.5%
Overshoot of overcurrent elements
<30 ms
3.1.1
DIRECTIONAL PARAMETERS Accuracy
Directional boundary accuracy (RCA +/-90%)
+/-2° with hysteresis <3°
DT Operation
+/- 2% or 80 ms, whichever is greater (1.05 – <2) Is +/- 2% or 60 ms, whichever is greater (2 – 20) Is
3.2
EARTH FAULT PROTECTION (MEASURED) Earth Fault
DT Pick-up
Setting +/- 5%
Drop-off
0.95 x Setting +/-5%
Minimum IDMT Trip level
1.05 x Setting +/-5%
IDMT shape
According to IEC 60255-151:2009 (Reference conditions TMS = 1, TD = 1 and IN1 > setting of 1 A, operating range 2-20 In)
IEEE reset
+/- 5% or 50 ms, whichever is greater
DT operation
+/- 2% or 70 ms, whichever is greater (1.05 – <2) Is +/- 2% or 50 ms, whichever is greater (2 – 20) Is
DT reset
+/- 5%
Repeatability
+/- 2.5%
3.3
EARTH FAULT PROTECTION (DERIVED) Earth Fault
DT Pick-up
Setting +/- 5%
Drop-off
0.95 x Setting +/-5%
Minimum IDMT Trip level
1.05 x Setting +/-5%
P14D-B/G/L/Z-TM-EN-1
625
Chapter 17 - Technical Specifications
P14D
Earth Fault IDMT shape
According to IEC 60255-151:2009 (Reference conditions TMS = 1, TD = 1 and IN2 > setting of 1 A, operating range 2-20 In)
IEEE reset
+/- 10% or 40 ms, whichever is greater
DT operation
+/- 2% or 70 ms, whichever is greater (1.05 – <2) Is +/- 2% or 50 ms, whichever is greater (1.05 – <2) Is
DT reset
+/- 2% or 50 ms, whichever is greater
Repeatability
+/- 5%
3.4
EARTH FAULT DIRECTIONALISATION Zero Sequence Polarising
Operating pick-up
+/-2% of RCA+/-90%
Hysteresis
<3°
VN> pick-up
Setting+/-10%
VN> drop-off
0.9 x Setting +/-10% Negative Sequence Polarising
Operating pick-up
+/-2% of RCA+/-90%
Hysteresis
<3°
VN2> pick-up
Setting+/-10%
VN2> drop-off
0.9 x Setting +/-10%
IN2> pick-up
Setting+/-10%
IN2> drop-off
0.9 x Setting +/-10%
3.5
SENSITIVE EARTH FAULT PROTECTION Sensitive Earth Fault (SEF)
Pick-up
Setting +/- 5%
Drop-off
0.95 x Setting +/-5%
Minimum IDMT Trip level
1.05 x Setting +/-5%
IDMT shape
According to IEC 60255-151:2009 (Reference conditions TMS = 1, TD = 1 and IN > setting of 100 mA, operating range 2-20 In)
IEEE reset
+/- 7.5% or 60 ms, whichever is greater
IDMT operation
+/- 2% or 70 ms, whichever is greater (1.05 - <2) Is +/- 2% or 50 ms, whichever is greater (2 - 20) Is
DT reset
+/- 5%
Repeatability
+/- 5%
DT Operation
+/- 2% or 80 ms, whichever is greater (1.05 - <2) Is +/- 2% or 60 ms, whichever is greater (2 - 20) Is
Note: SEF claims apply to SEF input currents of no more than 2 x In. For input ranges above 2 x In, the claim is not ed.
626
P14D-B/G/L/Z-TM-EN-1
P14D
3.5.1
Chapter 17 - Technical Specifications
SEF DIRECTIONALISATION Wattmetric SEF
Pick-up for P = 0 W
ISEF > +/-5% or 5 mA
Pick-up for P > 0 W
P > +/-5%
Drop-off for P = 0 W
0.95 x ISEF> +/- 5% or 5 mA
Drop-off for P > 0 W
0.9 x P> +/- 5% or 5 mA
Boundary accuracy
+/-5% with hysteresis < 1°
Repeatability
+/- 5%
SEF CosΦ Pick-up
Setting +/-5% for angles RCA+/-60°
Drop-off
0.9 x setting
IDMT shape
+/- 5% or 50 ms, whichever is greater (Reference conditions TMS = 1, TD = 1 and IN > setting of 100 mA, operating range 2-0 In)
IEEE reset
+/- 7.5% or 60 ms, whichever is greater
DT operation
+/- 2% or 50 ms, whichever is greater
DT reset
+/- 5%
Repeatability
+/- 2%
SEF SinΦ Pick-up
Setting +/-5% for angles RCA+/-60° to RCA+/-90°
Drop-off
0.9 x setting
IDMT shape
+/- 5% or 50 ms, whichever is greater (Reference conditions TMS = 1, TD = 1 and IN > setting of 100 mA, operating range 2-0In)
IEEE reset
+/- 7.5% or 60 ms, whichever is greater
DT operation
+/- 2% or 50 ms, whichever is greater
DT reset
+/- 5%
Repeatability
+/- 2%
3.6
RESTRICTED EARTH FAULT PROTECTION High Impedance Residual Earth Fault (REF)
Pick-up
Setting formula +/- 5%
Drop-off
0.8 x Setting formula +/-5%
Operating time
< 60 ms
High pick-up
Setting +/- 10%
High operating time
< 30 ms
Repeatability
< 15%
Low Impedance Residual Earth Fault (REF) Pick-up
Setting formula +/- 5%
Drop-off
0.8 x Setting formula +/-5%
P14D-B/G/L/Z-TM-EN-1
627
Chapter 17 - Technical Specifications
P14D
Low Impedance Residual Earth Fault (REF) Operating time
< 60 ms
High pick-up
Setting +/- 5%
High operating time
< 30 ms
Repeatability
< 15%
3.7
NEGATIVE SEQUNCE OVERCURRENT PROTECTION Accuracy
DT Pick-up
Setting +/- 5%
Drop-off
0.95 x Setting +/-5%
Minimum IDMT Trip level
1.05 x Setting +/-5%
IDMT shape
+/- 5% or 40 ms, whichever is greater
IEEE reset
+/- 5% or 50 ms, whichever is greater
DT operation
+/- 2% or 70 ms, whichever is greater (1.05 – <2) Is +/- 2% or 50 ms, whichever is greater (2 – 20) Is
DT Reset
+/- 5%
3.7.1
DIRECTIONAL PARAMETERS Accuracy
Directional boundary accuracy
+/- 2% with hysteresis < 1°
DT Operation
+/- 2% or 80 ms, whichever is greater (1.05 – <2) Is +/- 2% or 60 ms, whichever is greater (2 – 20) Is
3.8
CIRCUIT BREAKER FAIL AND UNDERCURRENT PROTECTION Accuracy
I< Pick-up
+/- 5% or 20 mA, whichever is greater
I< Drop-off
100% of setting +/- 5% or 20 mA, whichever is greater
Timers
+/- 2% or 50 ms, whichever is greater
Reset time
< 25 ms without DC offset < 35 ms with DC offset
3.9
BROKEN CONDUCTOR PROTECTION Accuracy
Pick-up
Setting +/- 2.5%
Drop-off
0.95 x Setting +/- 2.5%
DT operation
+/- 2% or 55 ms, whichever is greater
3.10
THERMAL OVERLOAD PROTECTION Accuracy
Thermal alarm pick-up
628
Calculated trip time +/- 10%
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
Accuracy Thermal overload pick-up
Calculated trip time +/- 10%
Cooling time accuracy
+/- 15% of theoretical
Repeatability
<5%
Operating time measured with applied current of 20% above thermal setting.
3.11
COLD LOAD PICKUP PROTECTION Accuracy
I> Pick-up
Setting +/- 1.5%
IN> Pick-up
Setting +/- 1.5%
I> Drop-off
0.95 x Setting +/- 1.5%
IN> Drop-off
0.95 x Setting +/- 1.5%
DT operation
+/- 0.5% or 50 ms, whichever is greater
Repeatability
+/- 1%
3.12
SELECTIVE OVERCURRENT PROTECTION Accuracy
Fast Block operation
< 25 ms
Fast Block reset
< 30 ms
Time delay
Setting +/- 2% or 20 ms, whichever is greater
3.13
VOLTAGE DEPENDENT OVERCURRENT PROTECTION Accuracy
VCO/VRO threshold pick-up
Setting+/-5%
Overcurrent pick-up
K-factor x setting +/-5%
VCO/VRO threshold drop-off
1.05 x setting +/-5%
Overcurrent drop-off
0.95(K-factor x setting) +/-5%
Operating time
+/- 5% or 60 ms, whichever is greater
Repeatability
+/- 1%
P14D-B/G/L/Z-TM-EN-1
629
Chapter 17 - Technical Specifications
P14D
4
VOLTAGE AND FREQUENCY PROTECTION FUNCTIONS
4.1
UNDERVOLTAGE PROTECTION Accuracy
DT Pick-up
Setting +/- 5%
IDMT Pick-up
Setting +/- 5%
Drop-off
1.02 x Setting +/-5%
IDMT shape
+/- 3.5% or 40 ms, whichever is greater (<10 V) +/- 5% or 40 ms, whichever is greater (>10 V)
DT operation
+/- 2% or 50 ms, whichever is greater
Reset
< 75 ms
Repeatability
+/- 1%
4.2
OVERVOLTAGE PROTECTION Accuracy
DT Pick-up
Setting +/- 1%
IDMT Pick-up
Setting +/- 2%
Drop-off
0.98 x Setting +/-5%
IDMT shape
+/-3.5% or 40 ms, whichever is greater (<10 V) +/- 5% or 40 ms, whichever is greater (>10 V)
DT operation
+/- 2% or 50 ms, whichever is greater
Reset
< 75 ms
Repeatability
+/- 1%
4.3
RESIDUAL OVERVOLTAGE PROTECTION Derived NVD Accuracy
DT Pick-up
Setting +/- 5%
IDMT Pick-up
1.05 x Setting +/- 5%
Drop-off
0.95 x Setting +/-5%
IDMT shape
+/- 5% or 65 ms, whichever is greater
DT operation
+/- 2% or 20 ms or whichever is greater
Instantaneous operation
< 55 ms
Reset
< 35 ms
IDMT shape
+/- 60ms or 5%, whichever is greater
Repeatability
<10%
Measured NVD Accuracy DT Pick-up
630
Setting +/- 5%
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
Measured NVD Accuracy IDMT Pick-up
1.05 x Setting +/- 5%
Drop-off
0.95 x Setting +/-5%
IDMT shape
+/- 5% or 65 ms, whichever is greater
DT operation
+/- 2% or 20 ms or whichever is greater
Instantaneous operation
< 55 ms
Reset
< 35 ms
IDMT shape
+/- 60 ms or 5%, whichever is greater
Repeatability
< 10%
4.4
NEGATIVE SEQUENCE VOLTAGE PROTECTION Accuracy
Pick-up
Setting +/- 5%
Drop-off
0.95 x Setting +/-5%
DT operation
+/- 2% or 65 ms, whichever is greater (70 Hz - 45 Hz) +/- 5% or 70 ms, whichever is greater (<45 Hz)
Repeatability
+/- 1%
4.5
RATE OF CHANGE OF VOLTAGE PROTECTION Accuracy for 110V VT
Tolerance
1% or 0.07, whichever is greater
Pick-up
Setting +/- tolerance
Drop-off for positive direction
(Setting – 0.07)+/- tolerance
Drop-off for negative direction
(Setting + 0.07)+/- tolerance
Operating time at 50Hz
(Average cycle x 20) +60 ms
Reset time at 50Hz
40 ms
4.6
OVERFREQUENCY PROTECTION Accuracy
Pick-up
Setting +/- 10 mHz
Drop-off
Setting -20 mHz +/- 10 mHz
Operating timer
+/- 2% or 50 ms, whichever is greater
Operating and Reset time Operating time (Fs/Ff ratio less than 2)
<125 ms
Operating time (Fs/Ff ratio between 2 and 30)
<150 ms
Operating time (Fs/Ff ratio greater than 30)
<200 ms
Reset time
<200 ms
Reference conditions: Tested using step changed in frequency with Freq. Av Cycles setting = 0 and no intentional time delay.
P14D-B/G/L/Z-TM-EN-1
631
Chapter 17 - Technical Specifications
P14D
Fs = start frequency – frequency setting Ff = frequency setting – end frequency
4.7
UNDERFREQUENCY PROTECTION Accuracy
Pick-up
Setting +/- 10 mHz
Drop-off
Setting + 20 mHz +/- 10 mHz
Operating timer
+/- 2% or 50 ms, whichever is greater
Operating and Reset time Operating time (Fs/Ff ratio less than 2)
<100 ms
Operating time (Fs/Ff ratio between 2 and 6)
<160 ms
Operating time (Fs/Ff ratio greater than 6)
<230 ms
Reset time
<200 ms
Reference conditions: Tested using step changed in frequency with Freq. Av Cycles setting = 0 and no intentional time delay. Fs = start frequency – frequency setting Ff = frequency setting – end frequency
4.8
SUPERVISED RATE OF CHANGE OF FREQUENCY PROTECTION Accuracy
Pick-up (f)
Setting +/- 10 mHz
Pick-up (df/dt)
Setting +/- 3% or +/- 10 mHz/s, whichever is greater
Drop-off (f, underfrequency)
Setting + 20 mHz +/- 10 mHz
Drop-off (f, overfrequency)
Setting - 20 mHz +/- 10 mHz
Drop-off (df/dt, falling, for settings between 10 mHz/s and Setting + 5 mHz/s +/- 10 mHz/s 100 mHz/s) Drop-off (df/dt, falling, for settings greater than 100 mHz/s)
Setting + 50 mHz/s +/- 5% or +/- 55 mHz/s, whichever is greater
Drop-off (df/dt, rising, for settings between 10 mHz/s and Setting - 5 mHz/s +/- 10 mHz/s 100 mHz/s ) Drop-off (df/dt, rising, for settings greater than 100 mHz/s)
Setting - 50 mHz/s +/- 5% or +/- 55 mHz/s, whichever is greater
Operating and Reset time Instantaneous operating time (Freq AvCycles setting = 0)
<125 ms
Reset time time (df/dt AvCycles setting = 0)
<400 ms
4.9
INDEPENDENT RATE OF CHANGE OF FREQUENCY PROTECTION Accuracy
Pick-up (df/dt)
632
Setting +/- 3% or +/- 10 mHz/s, whichever is greater
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
Accuracy Drop-off (df/dt, falling, for settings between 10 mHz/s and 100 mHz/s)
Setting + 5 mHz/s +/- 10 mHz/s
Drop-off (df/dt, falling, for settings greater than 100 mHz/s)
Setting + 50 mHz/s +/- 5% or +/- 55 mHz/s, whichever is greater
Drop-off (df/dt, rising, for settings between 10 mHz/s and 100 mHz/s)
Setting - 5 mHz/s +/- 10 mHz/s
Drop-off (df/dt, rising, for settings greater than 100 mHz/s)
Setting - 50 mHz/s +/- 5% or +/- 55 mHz/s, whichever is greater
Operating timer
+/- 2% or 50 ms, whichever is greater
Operating and Reset time Operating time (for ramps 2 x seting or greater)
<200 ms
Operating time (for ramps 1.3 x seting or greater)
<300 ms
Reset time time (df/dt AvCycles setting = 0 for df/dt settings greater than <250 ms 0.1 Hz/s and no intentional time delay)
4.10
AVERAGE RATE OF CHANGE OF FREQUENCY PROTECTION Accuracy
Pick-up (f)
Setting +/- 10 mHz
Pick-up (Df/Dt)
Setting +/- 100 mHz/s
Drop-off (falling)
Setting + 20 mHz +/- 10 mHz
Drop-off (rising)
Setting - 20 mHz +/- 10 mHz
Operating timer
+/- 2% or 30 ms, whichever is greater
Operating time Operating time (Freq. Av Cycles setting = 0)
<125 ms
Reference conditions: To maintain accuracy, the minimum time delay setting should be: Dt> 0.375 x Df + 0.23 (f0r Df setting <1Hz) Dt> 0.156 x Df + 0.47 (for Df setting >= 1Hz)
4.11
LOAD RESTORATION Accuracy
Pick-up
Setting +/- 2.5%
Drop-off
0.95% x Setting +/- 2.5%
Restoration timer
+/- 2% or 50 ms, whichever is greater
Holding timer
+/- 2% or 50 ms, whichever is greater
P14D-B/G/L/Z-TM-EN-1
633
Chapter 17 - Technical Specifications
P14D
5
POWER PROTECTION FUNCTIONS
5.1
OVERPOWER / UNDERPOWER Accuracy
Pick-up
Setting +/- 10%
Reverse/Overpower Drop-off
0.95 x Setting +/- 10%
Low forward power Drop-off
1.05 x Setting +/- 10%
Angle variation pick-up
+/- 2°
Angle variation drop-off
+/- 2.5°
Operating time
+/- 2% or 50 ms, whichever is greater
Repeatability
< 5%
Disengagement time
<50 ms
tRESET
+/- 5%
Instantaneous operating time
< 50 ms
5.2
SENSITIVE POWER Accuracy
Pick-up
Setting +/- 10%
Reverse/Overpower Drop-off
0.9 x Setting +/- 10%
Low forward power Drop-off
1.1 x Setting +/- 10%
Angle variation pick-up
+/- 2°
Angle variation drop-off
+/- 2.5°
Operating time
+/- 2% or 50 ms, whichever is greater
Repeatability
< 5%
Disengagement time
<50 ms
tRESET
+/- 5%
Instantaneous operating time
< 50 ms
634
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
6
MONITORING AND CONTROL
6.1
VOLTAGE TRANSFORMER SUPERVISION Accuracy
Fast block operation
< 25 ms
Fast block reset
< 30 ms
Time delay
+/- 2% or 20 ms, whichever is greater
6.2
CURRENT TRANSFORMER SUPERVISION Standard CTS Accuracy
IN> Pick-up
Setting +/- 5%
VN< Pick-up
Setting +/- 5%
IN> Drop-off
0.9 x setting +/- 5%
VN< Drop-off
1.05 x setting +/-5% or 1 V, whichever is greater
Time delay operation
Setting +/-2% or 20 ms, whichever is greater
CTS block operation
< 1 cycle
CTS reset
< 35 ms
6.3
CB STATE AND CONDITION MONITORING Accuracy
Timers
+/- 40 ms or 2%, whichever is greater
Broken current accuracy
< +/- 5%
6.4
PSL TIMERS Accuracy
Output conditioner timer
Setting +/- 2% or 50 ms, whichever is greater
Dwell conditioner timer
Setting +/- 2% or 50 ms, whichever is greater
Pulse conditioner timer
Setting +/- 2% or 50 ms, whichever is greater
6.5
CHECK SYNCHRONISATION Accuracy
Timers
6.6
+/- 20 ms or 2%, whichever is greater
DC SUPPLY MONITOR Accuracy
Measuring Range
P14D-B/G/L/Z-TM-EN-1
19 V-310 V ±5%
635
Chapter 17 - Technical Specifications
P14D
Accuracy Tolerance
±1.5 V for 19-100 V ±2% for 100-200 V ±2.5% for 200-300 V
Pickup
100% of Setting ± Tolerance *
Dropoff
Hysteresis 2% 102% of Setting ± Tolerance for the upper limit * 98% of Setting ± Tolerance for the lower limit *
Operating Time
Setting ± (2% or 500 ms whichever is greater)
Disengage Time
< 250 ms
* Tested at 21°C
636
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
7
MEASUREMENTS AND RECORDING
7.1
GENERAL General Measurement Accuracy
General measurement accuracy
Typically +/- 1%, but +/- 0.5% between 0.2 - 2 In/Vn
Phase
0° to 360° +/- 0.5%
Current
0.05 to 3 In +/- 1.0% of reading
Voltage
0.05 to 2 Vn +/- 1.0% of reading
Frequency
40 to 70 Hz +/- 0.025 Hz
Power (W)
0.2 to 2 Vn and 0.05 to 3 In +/- 5.0% of reading at unity power factor
Reactive power (Vars)
0.2 to 2 Vn and 0.05 to 3 In +/- 5.0% of reading at zero power factor
Apparent power (VA)
0.2 to 2 Vn and 0.05 to 3 In +/- 5.0% of reading
Energy (Wh)
0.2 to 2 Vn and 0.2 to 3 In +/- 5.0% of reading at zero power factor
Energy (Varh)
0.2 to 2 Vn and 0.2 to 3 In +/- 5.0% of reading at zero power factor
7.2
DISTURBANCE RECORDS Disturbance Records Measurement Accuracy
Maximum record duration
50 s
No of records
Minimum 5 at 10 seconds each Maximum 50 at 1 second each (8 records of 3 seconds, each via IEC 60870-5-103 protocol)
Magnitude and relative phases accuracy
±5% of applied quantities
Duration accuracy
±2%
Trigger position accuracy
±2% (minimum Trigger 100 ms)
7.3
EVENT, FAULT AND MAINTENANCE RECORDS Event, Fault & Maintenance Records
Record location
Flash memory
Viewing method
Front display or MiCOM S1 Agile
Extraction method
Extracted via the USB port
Number of Event records
Up to 2048 time tagged event records
Number of Fault Records
Up to 5
Number of Maintenance Records
Up to 10
7.4
FAULT LOCATOR Accuracy
Fault Location
P14D-B/G/L/Z-TM-EN-1
+/- 3.5% of line length Reference conditions: solid fault applied on line
637
Chapter 17 - Technical Specifications
8
STANDARDS COMPLIANCE
8.1
EMC COMPLIANCE: 2004/108/EC
P14D
Compliance with the European Commission Directive on EMC is demonstrated using a Technical File. Compliance with EN60255-26:2009 was used to establish conformity.
8.2
PRODUCT SAFETY: 2006/95/EC
Compliance with the European Commission Low Voltage Directive (LVD) is demonstrated using a Technical File. Compliance with EN 60255-27: 2005 was used to establish conformity:
8.3
R&TTE COMPLIANCE
Radio and Telecommunications Terminal Equipment (R&TTE) directive 99/5/EC. Conformity is demonstrated by compliance to both the EMC directive and the Low Voltage directive, to zero volts.
8.4
UL/CUL COMPLIANCE
Canadian and USA Underwriters Laboratory File Number E202519 (where marked)
638
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
9
MECHANICAL SPECIFICATIONS
9.1
PHYSICAL PARAMTERS Physical Measurements
Case Types
20TE 30TE
Weight (20TE case)
2 kg – 3 kg (depending on chosen options)
Weight (30TE case)
3 kg – 4 kg (depending on chosen options)
Dimensions in mm (w x h x l) (20TE case)
W: 102.4mm H: 177.0mm D: 243.1mm
Dimensions in mm (w x h x l) (30TE case)
W: 154.2mm H: 177.0mm D: 243.1mm
Mounting
, rack, or retrofit
9.2
ENCLOSURE PROTECTION Enclosure Protection
Against dust and dripping water (front face)
IP52 as per IEC 60529:2002
Protection against dust (whole case)
IP50 as per IEC 60529:2002
Protection for sides of the case (safety)
IP30 as per IEC 60529:2002
Protection for rear of the case (safety)
IP10 as per IEC 60529:2002
9.3
MECHANICAL SPECIFICATIONS Mechanical Robustness
Vibration test per EN 60255-21-1:1996
Response: class 2, Endurance: class 2
Shock and bump immunity per EN 60255-21-2:1995
Shock response: class 4, Shock withstand: class 1, Bump withstand: class 4
Seismic test per EN 60255-21-3: 1995
Class 2
9.4
TRANSIT PACKAGING PERFORMANCE Packaging
Primary packaging carton protection
ISTA 1C
Vibration tests
3 orientations, 7 Hz, amplitude 5.3mm, acceleration 1.05g
Drop tests
10 drops from 610mm height on multiple carton faces, edges and corners
P14D-B/G/L/Z-TM-EN-1
639
Chapter 17 - Technical Specifications
P14D
10
RATINGS
10.1
AC MEASURING INPUTS AC Measuring Inputs
Nominal frequency
50 and 60 Hz (settable)
Operating range
40 to 70 Hz
Phase rotation
ABC or CBA
10.2
CURRENT TRANSFORMER INPUTS AC Current
Nominal current (In)
1A and 5A dual rated*
Nominal burden per phase
< 0.05 VA at In
AC current thermal withstand
Continuous: 4 x In 10 s: 30 x In 1 s: 100 x In Linear to 40 x In (non-offset ac current)
Note: A single input is used for both 1A and 5A applications. 1 A or 5 A operation is determined by means of software in the product’s database.
10.3
VOLTAGE TRANSFORMER INPUTS AC Voltage
Nominal voltage
100 V to 120 V, or 380V to 480 V phase-phase
Nominal burden per phase
< 0.1 VA at Vn
Thermal withstand
Continuous: 2 x Vn, 10 s: 2.6 x Vn
10.4
AUXILIARY SUPPLY VOLTAGE Power Supply Voltage
Nominal operating range
24-250 V DC +/-20% 110-240 V AC -20% + 10%
Maximum operating range
19 to 300 V DC
Frequency range for AC supply
45 – 65 Hz
Ripple
<15% for a DC supply (compliant with IEC 60255-11:2008)
10.5
NOMINAL BURDEN Nominal Burden
Quiescent burden
640
20TE
5 W max.
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
Nominal Burden 30TE
6 W max.
30TE with 2nd rear communications
6.2 W max.
30TE with Ethernet or TCS
7 W max.
Additions for energised relay outputs
0.26 W per output relay
Opto-input burden
24 V
0.065 W max.
48 V
0.125 W max.
110 V
0.36 W max.
220 V
0.9 W max.
10.6
POWER SUPPLY INTERRUPTION Power Supply Interruption IEC 60255-11:2008 (dc) IEC 61000-4-11:2004 (ac)
Standard
Quiescent / half load
Full load
19.2 V – 110 V dc >110 Vdc
19.2 V – 110 V dc >110 Vdc
20TE
50 ms
100 ms
50 ms
100 ms
30TE
50 ms
100 ms
30 ms
50 ms
30TE with 2nd rear communications
30 ms
100 ms
20 ms
50 ms
30TE with Ethernet or TCS
50 ms
100 ms
20 ms
100 ms
Note: Maximum loading = all inputs/outputs energised.
Note: Quiescent or 1/2 loading = 1/2 of all inputs/outputs energised.
10.7
OUTPUT S Standard s
Compliance
In accordance with IEC 60255-1:2009
Use
General purpose relay outputs for signalling, tripping and alarming
Rated voltage
300 V
Maximum continuous current
10 A
Short duration withstand carry
30 A for 3 s 250 A for 30 ms
Make and break, dc resistive
50 W
Make and break, dc inductive
62.5 W (L/R = 50 ms)
Make and break, ac resistive
2500 VA resistive (cos f = unity)
Make and break, ac inductive
2500 VA inductive (cos f = 0.7)
Make and carry, dc resistive
30 A for 3 s, 10000 operations (subject to the above limits)
Make, carry and break, dc resistive
4 A for 1.5 s, 10000 operations (subject to the above limits)
P14D-B/G/L/Z-TM-EN-1
641
Chapter 17 - Technical Specifications
P14D
Standard s Make, carry and break, dc inductive
0.5 A for 1 s, 10000 operations (subject to the above limits)
Make, carry and break ac resistive
30 A for 200 ms, 2000 operations (subject to the above limits)
Make, carry and break ac inductive
10 A for 1.5 s, 10000 operations (subject to the above limits)
Loaded
1000 operations min.
Unloaded
10000 operations min.
Operate time
< 5 ms
Reset time
< 10 ms
10.8
WATCHDOG S Watchdog s
Use
Non-programmable s for relay healthy/relay fail indication
Breaking capacity, dc resistive
30 W
Breaking capacity, dc inductive
15 W (L/R = 40 ms)
Breaking capacity, ac inductive
375 VA inductive (cos f = 0.7)
10.9
ISOLATED DIGITAL INPUTS Opto-isolated digital inputs (opto-inputs)
Options
The opto-inputs with programmable voltage thresholds may be energized from the 48 V field voltage, or the external battery supply
Rated nominal voltage
24 to 250 V dc
Operating range
19 to 265 V dc
Withstand
300 V dc
Recognition time with half-cycle ac immunity filter removed
< 2 ms
Recognition time with filter on
< 12 ms
10.9.1
NOMINAL PICKUP AND RESET THRESHOLDS
Nominal Battery voltage
Logic levels: 60-80% DO/PU
Logic Levels: 50-70% DO/PU
24/27 V
Logic 0 < 16.2 V : Logic 1 > 19.2 V
Logic 0 <12.0 V : Logic 1 > 16.8
30/34
Logic 0 < 20.4 V : Logic 1 > 24.0 V
Logic 0 < 15.0 V : Logic 1 > 21.0 V
48/54
Logic 0 < 32.4 V : Logic 1 > 38.4 V
Logic 0 < 24.0 V : Logic 1 > 33.6 V
110/125
Logic 0 < 75.0 V : Logic 1 > 88.0 V
Logic 0 < 55.0 V : Logic 1 > 77.0 V
220/250
Logic 0 < 150 V : Logic 1 > 176.0 V
Logic 0 < 110.V : Logic 1 > 154.0 V
Note: Filter is required to make the opto-inputs immune to induced AC voltages.
642
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
11
ENVIRONMENTAL CONDITIONS
11.1
AMBIENT TEMPERATURE RANGE Ambient Temperature Range
Compliance
IEC 60255-27: 2005
Test Method
IEC 60068-2-1: 1993 and 60068-2-2: 2007
Operating temperature range
-25°C to +55°C (-13°F to +131°F)
Storage and transit temperature range
-25°C to +70°C (-13°F to +158°F)
11.2
TEMPERATURE ENDURANCE TEST Temperature Endurance Test
Test Method
IEC 60068-2-1: 1993 and 60068-2-2: 2007
Operating temperature range
-40°C operation (96 hours) +85°C operation (96 hours)
Storage and transit temperature range
-40°C operation (96 hours) +85°C operation (96 hours)
11.3
AMBIENT HUMIDITY RANGE Ambient Humidity Range
Compliance
IEC 60068-2-78: 2001 and IEC 60068-2-30: 2005
Durability
56 days at 93% relative humidity and +40°C
Damp heat cyclic
six (12 + 12) hour cycles, 93% RH, +25 to +55°C
11.4
CORROSIVE ENVIRONMENTS Corrosive Environments
Compliance
IEC 60068-2-42: 2003, IEC 60068-2-43: 2003
Industrial corrosive environment/poor environmental control, Sulphur Dioxide
21 days exposure to elevated concentrations (25ppm) of SO2 at 75% relative humidity and +25°C
Industrial corrosive environment/poor environmental control, Hydrogen Sulphide
21 days exposure to elevated concentrations (10ppm) of SO2 at 75% relative humidity and +25°C
Salt mist
IEC 60068-2-52: 1996 KB severity 3
P14D-B/G/L/Z-TM-EN-1
643
Chapter 17 - Technical Specifications
12
TYPE TESTS
12.1
INSULATION
P14D
Insulation Compliance
IEC 60255-27: 2005
Insulation resistance
> 100 M ohm at 500 V DC (Using only electronic/brushless insulation tester)
12.2
CREEPAGE DISTANCES AND CLEARANCES Creepage Distances and Clearances
Compliance
IEC 60255-27: 2005
Pollution degree
3
Overvoltage category
lll
Impulse test voltage (not RJ45)
5 kV
Impulse test voltage (RJ45)
1 kV
12.3
HIGH VOLTAGE (DIELECTRIC) WITHSTAND High Voltage (Dielectric) Withstand
IEC Compliance
IEC 60255-27: 2005
Between all independent circuits
2 kV ac rms for 1 minute
Between independent circuits and protective earth conductor terminal
2 kV ac rms for 1 minute
Between all case terminals and the case earth
2 kV ac rms for 1 minute
Across open watchdog s
1 kV ac rms for 1 minute
Across open s of changeover output relays
1 kV ac rms for 1 minute
Between all RJ45 s and protective earth
1 kV ac rms for 1 minute
Between all screw-type EIA(RS)485 s and protective earth
1 kV ac rms for 1 minute
ANSI/IEEE Compliance
ANSI/IEEE C37.90-1989
Across open s of normally open output relays
1.5 kV ac rms for 1 minute
Across open s of normally open changeover output relays
1 kV ac rms for 1 minute
Across open watchdog s
1 kV ac rms for 1 minute
12.4
IMPULSE VOLTAGE WITHSTAND TEST Impulse Voltage Withstand Test
Compliance
IEC 60255-27: 2005
Between all independent circuits
Front time: 1.2 µs, Time to half-value: 50 µs, Peak value: 5 kV, 0.5 J
Between terminals of all independent circuits
Front time: 1.2 µs, Time to half-value: 50 µs, Peak value: 5 kV, 0.5 J
Between all independent circuits and protective earth conductor terminal
Front time: 1.2 µs, Time to half-value: 50 µs, Peak value: 5 kV, 0.5 J
Note: Exceptions are communications ports and normally-open output s
644
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
13
ELECTROMAGNETIC COMPATIBILITY
13.1
1 MHZ BURST HIGH FREQUENCY DISTURBANCE TEST 1 MHz Burst High Frequency Disturbance Test
Compliance
IEC 60255-22-1: 2007 2008, Class III
Common-mode test voltage (level 3)
2.5 kV
Differential test voltage (level 3)
1.0 kV
13.2
DAMPED OSCILLATORY TEST Damped Oscillatory Test
Compliance
EN61000-4-18: 2011: Level 3, 100 kHz and 1 MHz. Level 4: 3 MHz, 10 MHz and 30 MHz
Common-mode test voltage (level 3)
2.5 kV
Common-mode test voltage (level 4)
4.0 kV
Differential mode test voltage
1.0 kV
13.3
IMMUNITY TO ELECTROSTATIC DISCHARGE Immunity to Electrostatic Discharge
Compliance
IEC 60255-22-2: 2008 Class 3 and Class 4,
Class 4 Condition
15 kV discharge in air to interface, display, and exposed metalwork
Class 3 Condition
8 kV discharge in air to all communication ports
13.4
ELECTRICAL FAST TRANSIENT OR BURST REQUIREMENTS Electrical Fast Transient or Burst Requirements
Compliance
IEC 60255-22-4: 2008 and EN61000-4-4:2004. Test severity level lll and lV
Applied to communication inputs
Amplitude: 2 kV, burst frequency 5 kHz and 100 KHz (level 4)
Applied to power supply and all other inputs except for communication inputs
Amplitude: 4 kV, burst frequency 5 kHz and 100 KHz (level 4)
13.5
SURGE WITHSTAND CAPABILITY Surge Withstand Capability
Compliance
IEEE/ANSI C37.90.1: 2002
Condition 1
4 kV fast transient and 2.5 kV oscillatory applied common mode and differential mode to opto inputs, output relays, CTs, VTs, power supply, field voltage
Condition 2
4 kV fast transient and 2.5 kV oscillatory applied common mode to communications, IRIG-B
P14D-B/G/L/Z-TM-EN-1
645
Chapter 17 - Technical Specifications
13.6
P14D
SURGE IMMUNITY TEST Surge Immunity Test
Compliance
IEC 61000-4-5: 2005 Level 4
Pulse duration
Time to half-value: 1.2/50 µs
Between all groups and protective earth conductor terminal
Amplitude 4 kV
Between terminals of each group (excluding communications ports)
Amplitude 2 kV
13.7
IMMUNITY TO RADIATED ELECTROMAGNETIC ENERGY Immunity to Radiated Electromagnetic Energy
Compliance
IEC 60255-22-3: 2007, Class III
Frequency band
80 MHz to 3.0 GHz
Spot tests at
80, 160, 380, 450, 900, 1850, 2150 MHz
Test field strength
10 V/m
Test using AM
1 kHz @ 80%
Compliance
IEEE/ANSI C37.90.2: 2004
Frequency band
80 MHz to 1 GHz
Spot tests at
80, 160, 380, 450 MHz
Waveform
1 kHz @ 80% am and pulse modulated
Field strength
35 V/m
13.8
RADIATED IMMUNITY FROM DIGITAL COMMUNICATIONS Radiated Immunity from Digital Communications
Compliance
IEC 61000-4-3: 2006, Level 4
Frequency bands
800 to 960 MHz, 1.4 to 2.0 GHz
Test field strength
30 V/m
Test using AM
1 kHz / 80%
13.9
RADIATED IMMUNITY FROM DIGITAL RADIO TELEPHONES Radiated Immunity from Digital Radio Telephones
Compliance
IEC 61000-4-3: 2002
Frequency bands
1.89 GHz
Test field strength
10 V/m
13.10
IMMUNITY TO CONDUCTED DISTURBANCES INDUCED BY RADIO FREQUENCY FIELDS Immunity to Conducted Disturbances Induced by Radio Frequency Fields
Compliance
IEC 61000-4-6: 2008, Level 3
Frequency bands
150 kHz to 80 MHz
646
P14D-B/G/L/Z-TM-EN-1
P14D
Chapter 17 - Technical Specifications
Immunity to Conducted Disturbances Induced by Radio Frequency Fields Test disturbance voltage
10 V rms
Test using AM
1 kHz @ 80%
Spot tests
27 MHz and 68 MHz
13.11
MAGNETIC FIELD IMMUNITY Magnetic Field Immunity
Compliance
IEC 61000-4-8: 2009 Level 5 IEC 61000-4-9/10: 2001 Level 5
IEC 61000-4-8 test
100 A/m applied continuously, 1000 A/m applied for 3 s
IEC 61000-4-9 test
1000 A/m applied in all planes
IEC 61000-4-10 test
100 A/m applied in all planes at 100 kHz/1 MHz with a burst duration of 2 seconds
13.12
CONDUCTED EMISSIONS Conducted Emissions
Compliance
EN 55022: 2010
Power supply test 1
0.15 - 0.5 MHz, 79 dBµV (quasi peak) 66 dBµV (average)
Power supply test 2
0.5 – 30 MHz, 73 dBµV (quasi peak) 60 dBµV (average)¤
RJ45 test 1
0.15 - 0.5 MHz, 97 dBµV (quasi peak) 84 dBµV (average)
RJ45 test 2
0.5 – 30 MHz, 87 dBµV (quasi peak) 74 dBµV (average)
13.13
RADIATED EMISSIONS Radiated Emissions
Compliance
EN 55022: 2010
Test 1
30 – 230 MHz, 40 dBµV/m at 10 m measurement distance
Test 2
230 – 1 GHz, 47 dBµV/m at 10 m measurement distance
Test 3
1 – 2 GHz, 76 dBµV/m at 10 m measurement distance
13.14
POWER FREQUENCY Radiated Emissions
Compliance
IEC 60255-22-7:2003
Opto-inputs (Compliance is achieved using the optoinput filter)
300 V common-mode (Class A) 150 V differential mode (Class A)
Note: Compliance is achieved using the opto-input filter
P14D-B/G/L/Z-TM-EN-1
647
Chapter 17 - Technical Specifications
648
P14D
P14D-B/G/L/Z-TM-EN-1
SYMBOLS AND GLOSSARY APPENDIX A
Appendix A - Symbols and Glossary
650
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Appendix A - Symbols and Glossary
CHAPTER OVERVIEW
This appendix contains and symbols you will find throughout the manual. This chapter contains the following sections: Chapter Overview Acronyms and Abbreviations Units for Digital Communications American Vs British English Terminology Logic Symbols and Logic Timers Logic Gates
651 652 658 659 660 664 666
P14D-B/G/L/Z-TM-EN-1
651
Appendix A - Symbols and Glossary
2
P14D
ACRONYMS AND ABBREVIATIONS Term
Description
A
Ampere
AA
Application Association
AC / ac
Alternating Current
ACSI
Abstract Communication Service Interface
ACSR
Aluminum Conductor Steel Reinforced
ALF
Accuracy Limit Factor
AM
Amplitude Modulation
ANSI
American National Standards Institute
AR
Auto-Reclose.
ARIP
Auto-Reclose In Progress
ASDU
Application Service Data Unit
ASCII
American Standard Code for Information Interchange
AUX / Aux
Auxiliary
AWG
American Wire Gauge
BAR
Block Auto-Reclose signal.
BCD
Binary Coded Decimal
BCR
Binary Counter Reading
BDEW
Bundesverband der Energie- und Wasserwirtschaft | Startseite (i.e. German Association of Energy and Water Industries)
BMP
BitMaP – a file format for a computer graphic
BOP
Blocking Overreach Protection - a blocking aided-channel scheme.
BRCB
Buffered Report Control Block
BRP
Beacon Redundancy Protocol
BU
Backup: Typically a back-up protection element
C/O
A ChangeOver having normally-closed and normally-open connections: Often called a "form C" .
CB
Circuit Breaker
CB Aux.
Circuit Breaker auxiliary s: Indication of the breaker open/closed status.
CBF
Circuit Breaker Failure protection
CDC
Common Data Class
CF
Control Function
Ch
Channel: usually a communications or signaling channel
CIP
Critical Infrastructure Protection standards
CLK / Clk
Clock
Cls
Close - generally used in the context of close functions in circuit breaker control.
CMV
Complex Measured Value
CNV
Current No Volts
COT
Cause of Transmission
NI
Centre for the Protection of National Infrastructure
CRC
Cyclic Redundancy Check
CRP
Cross-network Redundancy Protocol
652
P14D-B/G/L/Z-TM-EN-1
P14D
Appendix A - Symbols and Glossary
Term
Description
CRV
Curve (file format for curve information)
CRx
Channel Receive: Typically used to indicate a teleprotection signal received.
CS
Check Synchronism.
CSV
Comma Separated Values (a file format for database information)
CT
Current Transformer
CTRL.
Control
CTS
Current Transformer Supervision: To detect CT input failure.
CTx
Channel Transmit: Typically used to indicate a teleprotection signal send.
CU
Communication Unit
CVT
Capacitor-coupled Voltage Transformer - equivalent to terminology CCVT.
DAU
Data Acquisition Unit
DC
Data Concentrator
DC / dc
Direct Current
DCC
An Omicron compatible format
DDB
Digital Data Bus within the programmable scheme logic: A logic point that has a zero or 1 status. DDB signals are mapped in logic to customize the relay’s operation.
DDR
Dynamic Disturbance Recorder
DEF
Directional earth fault protection: A directionalized ground fault aided scheme.
DG
Distributed Generation
DH
Dynamic Host Configuration Protocol
DHP
Dual Homing Protocol
Diff
Differential protection.
DIN
Deutsches Institut für Normung (German standards body)
Dist
Distance protection.
DITA
Darwinian Information Typing Architecture
DLDB
Dead-Line Dead-Bus: In system synchronism check, indication that both the line and bus are deenergized.
DLLB
Dead-Line Live-Bus: In system synchronism check, indication that the line is de-energized whilst the bus is energized.
DLR
Dynamic Line Rating
DLY / Dly
Time Delay
DMT
Definite Minimum Time
DNP
Distributed Network Protocol
DPWS
Device Profile for Web Services
DST
Daylight Saving Time
DT
Definite Time: in the context of protection elements: An element which always responds with the same constant time delay on operation. Abbreviation of "Dead Time" in the context of auto-reclose:
DTD
Document Type Definition
DTOC
Definite Time Overcurrent
DTS
Date and Time Stamp
EF or E/F
Earth Fault (Directly equivalent to Ground Fault)
EIA
Electronic Industries Alliance
ELR
Environmental Lapse Rate
ER
Engineering Recommendation
P14D-B/G/L/Z-TM-EN-1
653
Appendix A - Symbols and Glossary
Term
P14D
Description
FCB
Frame Count Bit
FFT
Fast Fourier Transform
FIR
Finite Impulse Response
FLC
Full load current: The nominal rated current for the circuit.
FLT / Flt
Fault - typically used to indicate faulted phase selection.
Fn or FN
Function
FPGA
Field Programmable Gate Array
FPS
Frames Per Second
FTP
File Transfer Protocol
FWD, Fwd or Fwd.
Indicates an element responding to a flow in the "Forward" direction
GIF
Graphic Interchange Format – a file format for a computer graphic
GND / Gnd
Ground: used in distance settings to identify settings that relate to ground (earth) faults.
GOOSE
Generic Object Oriented Substation Event
GPS
Global Positioning System
GRP / Grp
Group. Typically an alternative setting group.
GSE
General Substation Event
GSSE
Generic Substation Status Event
GUI
Graphical Interface
HMI
Human Machine Interface
HIF
High Impedance Fault
HiZ
High Impedance (for Restricted Earth Fault)
HSR
High-availability Seamless Ring
HTML
Hypertext Markup Language
Current
I/O
Input/Output
I/P
Input
ICAO
International Civil Aviation Organization
ID
Identifier or Identification. Often a label used to track a software version installed.
IDMT
Inverse Definite Minimum Time. A characteristic whose trip time depends on the measured input (e.g. current) according to an inverse-time curve.
IEC
International Electro-technical Commission
IED
Intelligent Electronic Device
IEEE
Institute of Electrical and Electronics Engineers
IIR
Infinite Impulse Response
Inh
An Inhibit signal
Inst
An element with Instantaneous operation: i.e. having no deliberate time delay.
IP
Internet Protocol
IRIG
InterRange Instrumentation Group
ISA
International Standard Atmosphere
ISA
Instrumentation Systems and Automation Society
ISO
International Standards Organization
JPEF
t Photographic Experts Group – a file format for a computer graphic
L
Live
LAN
Local Area Network
654
P14D-B/G/L/Z-TM-EN-1
P14D
Appendix A - Symbols and Glossary
Term
Description
LCD
Liquid Crystal Display: The front- text display on the relay.
LD
Level Detector: An element responding to a current or voltage below its set threshold.
LDOV
Level Detector for Overvoltage
LDUV
Level Detector for Undervoltage
LED
Light Emitting Diode: Red or green indicator on the front-.
LLDB
Live-Line Dead-Bus : In system synchronism check, indication that the line is energized whilst the bus is de-energized.
Ln
Natural logarithm
LN
Logical Node
LoL
A Loss of Load scheme, providing a fast distance trip without needing a signaling channel.
LPDU
Link Protocol Data Unit
LPHD
Logical Physical Device
MC
MultiCast
MCB
Miniature Circuit Breaker
MCL
MiCOM Configuration Language
MICS
Model Implementation Conformance Statement
MMF
Magneto-Motive Force
MMS
Manufacturing Message Specification
MRP
Media Redundancy Protocol
MU
Merging Unit
MV
Measured Value
N
Neutral
N/A
Not Applicable
N/C
A Normally Closed or "break" : Often called a "form B" .
N/O
A Normally Open or "make" : Often called a "form A" .
NERC
North American Reliability Corporation
NIST
National Institute of Standards and Technology
NPS
Negative Phase Sequence
NVD
Neutral voltage displacement: Equivalent to residual overvoltage protection.
NXT
Abbreviation of "Next": In connection with hotkey menu navigation.
O/C
Overcurrent
O/P
Output
Opto
A generic term for a digital input.
OSI
Open Systems Interconnection
PCB
Printed Circuit Board
PCT
Protective Conductor Terminal (Ground)
PDC
Phasor Data Concentrator
Ph
Phase - used in distance settings to identify settings that relate to phase-phase faults.
PICS
Protocol Implementation Conformance Statement
PMU
Phasor Measurement Unit
PNG
Portable Network Graphics – a file format for a computer graphic
Pol
Polarize - typically the polarizing voltage used in making directional decisions.
POR
Permissive Over Reach
POST
Power On Self Test
P14D-B/G/L/Z-TM-EN-1
655
Appendix A - Symbols and Glossary
Term
P14D
Description
POTT
Permissive Over Reach Transfer Tripping
PRP
Parallel Redundancy Protocol
PSB
Power Swing Blocking, to detect power swing/out of step functions (ANSI 78).
PSL
Programmable Scheme Logic: The part of the relay’s logic configuration that can be modified by the , using the graphical editor within S1 Studio software.
PT
Power Transformer
PTP
Precision Time Protocol
PUR
A Permissive UnderReaching transfer trip scheme (alternative terminology: PUTT).
Q
Quantity defined as per unit value
R
Resistance
RBAC
Role Based Access Control
RCA
Relay Characteristic Angle - The center of the directional characteristic.
REB
Redundant Ethernet Board
REF
Restricted Earth Fault
Rev.
Indicates an element responding to a flow in the "reverse" direction
RMS / rms
Root mean square. The equivalent a.c. current: Taking into the fundamental, plus the equivalent heating effect of any harmonics.
RP
Rear Port: The communication ports on the rear of the IED
RS232
A common serial communications standard defined by the EIA
RS485
A common serial communications standard defined by the EIA (multi-drop)
RST or Rst
Reset generally used in the context of reset functions in circuit breaker control.
RSTP
Rapid Spanning Tree Protocol
RTU
Remote Terminal Unit
Rx
Receive: Typically used to indicate a communication transmit line/pin.
SBS
Straight Binary Second
SC
Synch-Check or system Synchronism Check.
SCADA
Supervisory Control and Data Acquisition
SCL
Substation Configuration Language
SCU
Substation Control Unit
SEF
Sensitive Earth Fault
SHP
Self Healing Protocol
SIR
Source Impedance Ratio
SMV
Sampled Measured Values
SNTP
Simple Network Time Protocol
SOA
Service Oriented Architecture
SOAP
Simple Object Access Protocol
SOC
Second of Century
SOTF
Switch on to Fault protection. Modified protection on manual closure of the circuit breaker.
SP
Single pole.
SPAR
Single pole auto-reclose.
SPC
Single Point Controllable
SPDT
Single Pole Dead Time. The dead time used in single pole auto-reclose cycles.
SPS
Single Point Status
SQRT
Square Root
656
P14D-B/G/L/Z-TM-EN-1
P14D
Appendix A - Symbols and Glossary
Term
Description
STP
Spanning Tree Protocol
SV
Sampled Values
SVM
Sampled Value Model
TAF
Turbine Abnormal Frequency
T
Transmission Control Protocol
TCS
Trip Circuit Supervision
TD
Time Dial. The time dial multiplier setting: Applied to inverse-time curves (ANSI/IEEE).
TE
Unit for case measurements: One inch = 5TE units
THD
Total Harmonic Distortion
TICS
Technical Issues Conformance Statement
TIFF
Tagged Image File Format – a file format for a computer graphic
TLS
Transport Layer Security protocol
TMS
Time Multiplier Setting: Applied to inverse-time curves (IEC)
TOC
Trip On Close ("line check") protection. Offers SOTF and TOR functionality.
TOR
Trip On Reclose protection. Modified protection on autoreclosure of the circuit breaker.
TP
Two-Part
TUC
Timed UnderCurrent
TVE
Total Vector Error
Tx
Transmit
UDP
Datagram Protocol
UPCT
Programmable Curve Tool
USB
Universal Serial bus
UTC
Universal Time Coordinated
V
Voltage
VA
Phase A voltage: Sometimes L1, or red phase
VB
Phase B voltage: Sometimes L2, or yellow phase
VC
Phase C voltage: Sometimes L3, or blue phase
VDR
Voltage Dependant Resistor
VT
Voltage Transformer
VTS
Voltage Transformer Supervision: To detect VT input failure.
WAN
Wide Area Network
XML
Extensible Markup Language
XSD
XML Schema Definition
ZS / ZL
Source to Line Impedance Ratio
P14D-B/G/L/Z-TM-EN-1
657
Appendix A - Symbols and Glossary
3
UNITS FOR DIGITAL COMMUNICATIONS Unit
Description
b
bit
B
Byte
kb
Kilobit(s)
kbps
Kilobits per second
kB
Kilobyte(s)
Mb
Megabit(s)
Mbps
Megabits per second
MB
Megabyte(s)
Gb
Gigabit(s)
Gbps
Gigabits per second
GB
Gigabyte(s)
Tb
Terabit(s)
Tbps
Terabits per second
TB
Terabyte(s)
658
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
4
Appendix A - Symbols and Glossary
AMERICAN VS BRITISH ENGLISH TERMINOLOGY British English
American English
…ae…
…e…
…ence
…ense
…ise
…ize
…oe…
…e…
…ogue
…og
…our
…or
…ourite
…orite
…que
…ck
…re
…er
…yse
…yze
Aluminium
Aluminum
Centre
Center
Earth
Ground
Fibre
Fiber
Ground
Earth
Speciality
Specialty
P14D-B/G/L/Z-TM-EN-1
659
Appendix A - Symbols and Glossary
5
P14D
LOGIC SYMBOLS AND Symbol
Description
Units
&
Logical "AND": Used in logic diagrams to show an AND-gate function.
S
"Sigma": Used to indicate a summation, such as cumulative current interrupted.
t
"Tau": Used to indicate a time constant, often associated with thermal characteristics.
d
Angular displacement
rad
q
Angular displacement
rad
F
Flux
rad
f
Phase shift
rad
w
System angular frequency
rad
<
Less than: Used to indicate an "under" threshold, such as undercurrent (current dropout).
>
Greater than: Used to indicate an "over" threshold, such as overcurrent (current overload)
1
Logical "OR": Used in logic diagrams to show an OR-gate function.
ABC
Anti-clockwise phase rotation.
ACB
Clock-wise phase rotation.
C
Capacitance
A
df/dt
Rate of Change of Frequency protection
Hz/s
df/dt>1
First stage of df/dt protection
Hz/s
F<1
First stage of underfrequency protection: Could be labeled 81-U in ANSI terminology.
Hz
F>1
First stage of overfrequency protection: Could be labeled 81-O in ANSI terminology.
Hz
fmax
Minimum required operating frequency
Hz
fmin
Minimum required operating frequency
Hz
fn
Nominal operating frequency
Hz
Current
A
Ù
Current raised to a power: Such as when breaker statistics monitor the square of ruptured current squared (Ù power = An 2).
’f
Maximum internal secondary fault current (may also be expressed as a multiple of In)
A
<
An undercurrent element: Responds to current dropout.
A
>>
Current setting of short circuit element
In
>1
First stage of phase overcurrent protection: Could be labeled 51-1 in ANSI terminology.
A
>2
Second stage of phase overcurrent protection: Could be labeled 51-2 in ANSI terminology.
A
>3
Third stage of phase overcurrent protection: Could be labeled 51-3 in ANSI terminology.
A
>4
Fourth stage of phase overcurrent protection: Could be labeled 51-4 in ANSI terminology.
A
0
Earth fault current setting Zero sequence current: Equals one third of the measured neutral/residual current.
A
1
Positive sequence current.
A
2
Negative sequence current.
A
2>
Negative sequence overcurrent protection (NPS element).
A
2pol
Negative sequence polarizing current.
A
A
Phase A current: Might be phase L1, red phase.. or other, in customer terminology.
A
B
Phase B current: Might be phase L2, yellow phase.. or other, in customer terminology.
A
C
Phase C current: Might be phase L3, blue phase.. or other, in customer terminology.
A
diff
Current setting of biased differential element
A
660
P14D-B/G/L/Z-TM-EN-1
P14D
Appendix A - Symbols and Glossary
Symbol
Description
Units
f
Maximum secondary through-fault current
A
f max
Maximum secondary fault current (same for all feeders)
A
f max int
Maximum secondary contribution from a feeder to an internal fault
A
f Z1
Maximum secondary phase fault current at Zone 1 reach point
A
fe
Maximum secondary through fault earth current
A
feZ1
Maximum secondary earth fault current at Zone 1 reach point
A
fn
Maximum prospective secondary earth fault current or 31 x I> setting (whichever is lowest)
A
fp
Maximum prospective secondary phase fault current or 31 x I> setting (whichever is lowest)
A
m
Mutual current
A
M64
InterMiCOM64.
Mx
InterMiCOM64 bit (x=1 to 16)
n
Current transformer nominal secondary current. The rated nominal current of the relay: Software selectable as 1 amp or 5 amp to match the line CT input.
A
N
Neutral current, or residual current: This results from an internal summation of the three measured phase currents.
A
N>
A neutral (residual) overcurrent element: Detects earth/ground faults.
A
N>1
First stage of ground overcurrent protection: Could be labeled 51N-1 in ANSI terminology.
A
N>2
Second stage of ground overcurrent protection: Could be labeled 51N-2 in ANSI terminology.
A
s
Value of stabilizing current
A
S1
Differential current pick-up setting of biased differential element
A
S2
Bias current threshold setting of biased differential element
A
SEF>
Sensitive earth fault overcurrent element.
A
sn
Rated secondary current (I secondary nominal)
A
sp
Stage 2 and 3 setting
A
st
Motor start up current referred to CT secondary side
A
K
Dimensioning factor
K1
Lower bias slope setting of biased differential element
%
K2
Higher bias slope setting of biased differential element
%
Ke
Dimensioning factor for earth fault
km
Distance in kilometers
Kmax
Maximum dimensioning factor
Krpa
Dimensioning factor for reach point accuracy
Ks
Dimensioning factor dependent upon through fault current
Kssc
Short circuit current coefficient or ALF
Kt
Dimensioning factor dependent upon operating time
kZm
The mutual compensation factor (mutual compensation of distance elements and fault locator for parallel line coupling effects).
kZN
The residual compensation factor: Ensuring correct reach for ground distance elements.
L
Inductance
mi
Distance in miles.
N
Indication of "Neutral" involvement in a fault: i.e. a ground (earth) fault.
P1
Used in IEC terminology to identify the primary CT terminal polarity: Replace by a dot when using ANSI standards.
P2
Used in IEC terminology to identify the primary CT terminal polarity: The non-dot terminal.
Pn
Rotating plant rated single phase power
PN>
Wattmetric earth fault protection: Calculated using residual voltage and current quantities.
P14D-B/G/L/Z-TM-EN-1
A
W
661
Appendix A - Symbols and Glossary
Symbol
P14D
Description
Units
R
Resistance
W
R Gnd.
A distance zone resistive reach setting: Used for ground (earth) faults.
R Ph
A distance zone resistive reach setting used for Phase-Phase faults.
Rct
Secondary winding resistance
W
Rl
Resistance of single lead from relay to current transformer
W
Rr
Resistance of any other protective relays sharing the current transformer
W
Rrn
Resistance of relay neutral current input
W
Rrp
Resistance of relay phase current input
W
Rs
Value of stabilizing resistor
W
Rx
Receive: typically used to indicate a communication receive line/pin.
S1
Used in IEC terminology to identify the secondary CT terminal polarity: Replace by a dot when using ANSI standards.
S2
Used in IEC terminology to identify the secondary CT terminal polarity: The non-dot terminal.
t
A time delay.
t’
Duration of first current flow during auto-reclose cycle
s
T1
Primary system time constant
s
tfr
Auto-reclose dead time
s
tIdiff
Current differential operating time
s
Ts
Secondary system time constant
s
Tx
Transmit: typically used to indicate a communication transmit line/pin.
V
Voltage.
V
V<
An undervoltage element.
V
V<1
First stage of undervoltage protection: Could be labeled 27-1 in ANSI terminology.
V
V<2
Second stage of undervoltage protection: Could be labeled 27-2 in ANSI terminology.
V
V>
An overvoltage element.
V
V>1
First stage of overvoltage protection: Could be labeled 59-1 in ANSI terminology.
V
V>2
Second stage of overvoltage protection: Could be labeled 59-2 in ANSI terminology.
V
V0
Zero sequence voltage: Equals one third of the measured neutral/residual voltage.
V
V1
Positive sequence voltage.
V
V2
Negative sequence voltage.
V
V2pol
Negative sequence polarizing voltage.
V
VA
Phase A voltage: Might be phase L1, red phase.. or other, in customer terminology.
V
VB
Phase B voltage: Might be phase L2, yellow phase.. or other, in customer terminology.
V
VC
Phase C voltage: Might be phase L3, blue phase.. or other, in customer terminology.
V
Vf
Theoretical maximum voltage produced if CT saturation did not occur
V
Vin
Input voltage e.g. to an opto-input
V
Vk
Required CT knee-point voltage. IEC knee point voltage of a current transformer.
V
VN
Neutral voltage displacement, or residual voltage.
V
Vn
Nominal voltage
V
Vn
The rated nominal voltage of the relay: To match the line VT input.
V
VN>1
First stage of residual (neutral) overvoltage protection.
V
VN>2
Second stage of residual (neutral) overvoltage protection.
V
Vres.
Neutral voltage displacement, or residual voltage.
V
Vs
Value of stabilizing voltage
V
662
P14D-B/G/L/Z-TM-EN-1
P14D
Appendix A - Symbols and Glossary
Symbol
Description
Units
Vx
An auxiliary supply voltage: Typically the substation battery voltage used to power the relay.
V
WI
Weak Infeed logic used in teleprotection schemes.
X
Reactance
None
X/R
Primary system reactance/resistance ratio
None
Xe/Re
Primary system reactance/resistance ratio for earth loop
None
Xt
Transformer reactance (per unit)
p.u.
Y
ittance
p.u.
Z
Impedance
p.u.
Z0
Zero sequence impedance.
Z1
Positive sequence impedance.
Z1
Zone 1 distance protection.
Z1X
Reach-stepped Zone 1X, for zone extension schemes used with auto-reclosure.
Z2
Negative sequence impedance.
Z2
Zone 2 distance protection.
ZP
Programmable distance zone that can be set forward or reverse looking.
Zs
Used to signify the source impedance behind the relay location.
Φal
Accuracy limit flux
Wb
Ψr
Remanent flux
Wb
Ψs
Saturation flux
Wb
P14D-B/G/L/Z-TM-EN-1
663
Appendix A - Symbols and Glossary
6
P14D
LOGIC TIMERS Logic symbols
Explanation
Time chart
Delay on pick-up timer, t
Delay on drop-off timer, t
Delay on pick-up/drop-off timer
Pulse timer
Pulse pick-up falling edge
Pulse pick-up raising edge
664
P14D-B/G/L/Z-TM-EN-1
P14D
Appendix A - Symbols and Glossary
Logic symbols
Explanation
Time chart
Latch
Dwell timer
Straight (non latching): Hold value until input reset signal
P14D-B/G/L/Z-TM-EN-1
665
Appendix A - Symbols and Glossary
7
P14D
LOGIC GATES
Symbol A B
&
IN
B 0 1 0 1
OUT Y 0 0 0 1
A B
1
Y
A 0 0 1 1
IN
B 0 1 0 1
S R Q Y
Standard S-R gate
B 0 0 1 1 0 0 1 1
Y
OUT Y 0 1 1 1
A B
Q0 Q1 0 0 1 1 0 0 1 0 0 1 1 1 0 0 1 1
IN
1
Y
A 0 0 1 1
IN
A B
SD R Q
Y
SD = Set Dominant
A 0 0 0 0 1 1 1 1
Y 0 1 0 0
B 0 1 0 1
B 0 0 1 1 0 0 1 1
Truth Table
OUT
B 0 1 0 1
A B
&
Y
OUT Y 1 1 0 1
A B
1
Y
S Q RD
A B
IN
OUT
B 0 1 0 1
Y 1 1 1 0
A 0 0 1 1
IN
OUT
B 0 1 0 1
Y 1 0 0 0
Truth Table
Symbol
Q0 Q1 0 0 1 1 0 0 1 0 0 1 1 1 0 1 1 1
A 0 0 1 1
Truth Table
Symbol
S – R FLIP-FLOP Symbol Truth Table
Truth Table A 0 0 0 0 1 1 1 1
&
A 0 0 1 1
Symbol
OR GATE Symbol Truth Table
Truth Table
Symbol
A B
A 0 0 1 1
Y
Symbol A B
AND GATE Truth Table Symbol
Truth Table
Y
RD = Reset Dominant
A 0 0 0 0 1 1 1 1
B 0 0 1 1 0 0 1 1
Q0 Q1 0 0 1 1 0 0 1 0 0 1 1 1 0 0 1 0
Warning: To avoid ambiguity, do not use the standard S-R gate unless specifically required
Symbol
Truth Table
A XOR Y B
A 0 0 1 1
IN
B 0 1 0 1
EXCLUSIVE OR GATE Symbol Truth Table
OUT Y 0 1 1 0
A XOR Y B
A 0 0 1 1
IN
B 0 1 0 1
Symbol
Truth Table
OUT Y 1 1 0 1
A XOR Y B
A 0 0 1 1
IN
OUT
B 0 1 0 1
Y 1 0 0 1
PROGRAMMABLE GATE Symbol
A B C
2
Y
Truth Table A 0 0 0 0 1 1 1 1
IN
B 0 0 1 1 0 0 1 1
OUT
C 0 1 0 1 0 1 0 1
Y 0 0 0 1 0 1 1 1
A B C
2
Symbol
Truth Table
Symbol
Y
A 0 0 0 0 1 1 1 1
IN
B 0 0 1 1 0 0 1 1
Truth Table
OUT
C 0 1 0 1 0 1 0 1
Y 0 1 1 1 0 0 0 1
A B C
2
Y
A 0 0 0 0 1 1 1 1
IN
B 0 0 1 1 0 0 1 1
OUT
C 0 1 0 1 0 1 0 1
Y 1 1 1 0 1 0 0 0
NOT GATE Symbol A Inverter (NOT)
Truth Table Y
IN OUT
A 0 1
Y 1 0
V02400
Figure 170: Logic Gates
666
P14D-B/G/L/Z-TM-EN-1
COMMISSIONING RECORD APPENDIX B
Appendix B - Commissioning Record
668
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
Appendix B - Commissioning Record
1
TEST RECORD
1.1
ENGINEER DETAILS Item
Value
Engineer's name Commissioning date Station Circuit System Frequency VT Ratio CT Ratio
1.2
FRONT PLATE INFORMATION Item
Value
Device Model number Serial number Rated current In Rated voltage Vn Auxiliary voltage Vx
1.3
TEST EQUIPMENT Test Equipment
Model
Serial Number
Injection test set Phase angle meter Phase rotation meter Insulation tester Setting application software IEC61850 configurator software DNP3 configurator software
1.4
TESTS WITH PRODUCT DE-ENERGISED Test
Result (mark where appropriate)
Was the IED damaged on visual inspection?
Yes / No
Is the rating information correct for installation?
Yes / No
Is the case earth installed?
Yes / No
Are the current transformer shorting s closed?
Yes / No / Not checked
Is the insulation resistance >100 MOhms at 500 V DC?
Yes / No / Not tested
Wiring checked against diagram?
Yes / No
Test block connections checked?
Yes / No / N/A
P14D-B/G/L/Z-TM-EN-1
669
Appendix B - Commissioning Record
P14D
Test
Result (mark where appropriate)
N/C Watchdog s closed?
Yes / No
N/O Watchdog s open?
Yes / No
Measured auxiliary supply
……………………..V DC / AC
1.5
TESTS WITH PRODUCT ENERGISED General Tests
Result (mark where appropriate)
N/C Watchdog s open?
Yes / No
N/O Watchdog s closed?
Yes / No
LCD contrast setting used
...............................
Clock set to local time?
Yes / No
Time maintained when auxiliary supply removed?
Yes / No
Alarm (yellow) LED working?
Yes / No
Out of service (yellow) LED working?
Yes / No
Programmable LEDs working?
Yes / No
All opto-inputs working?
Yes / No
All output relays working?
Yes / No
1.6
COMMUNICATION TESTS Communications
Result (mark where appropriate)
SCADA Communication standard (Courier, DNP3.0, IEC61850, IEC60870, Modbus) Communications established?
Yes / No
Protocol converter tested?
Yes / No / N/A
1.7
CURRENT INPUT TESTS Current Inputs (if applicable)
Displayed current
Result (mark where appropriate) Primary / Secondary
Phase CT ratio (if applicable) Input CT
Applied Value
Displayed Value
IA IB IC IN ISEF (if applicable)
1.8
VOLTAGE INPUT TESTS Voltage Inputs (if applicable)
Displayed voltage
Result (mark where appropriate) Primary / Secondary
Main VT ratio (if applicable) Input VT
670
Applied Value
Displayed value
P14D-B/G/L/Z-TM-EN-1
P14D
Appendix B - Commissioning Record
Voltage Inputs (if applicable)
Result (mark where appropriate)
VAN VBN VCN
1.9
OVERCURRENT CHECKS Overcurrent Checks
Result
Overcurrent type
Directional / Non-directional
Applied voltage
V
Applied current
A
Expected operating time
s
Measured operating time
s
1.10
ON-LOAD CHECKS On-load checks
Result
Test wiring removed?
Yes / No
Voltage inputs and phase rotation OK?
Yes / No
Current inputs and polarities OK?
Yes / No
On-load test performed?
Yes / No
(If No, give reason why) … IED is correctly directionalised?
1.11
Yes / No / N/A
ON-LOAD CHECKS Final Checks
Result
All test equipment, leads, shorts and test blocks removed safely?
Yes / No
Ethernet connected ?
Yes / No / N/A
Disturbed customer wiring re-checked?
Yes / No / N/A
All commissioning tests disabled?
Yes / No
Circuit breaker operations counter reset?
Yes / No / N/A
Current counters reset?
Yes / No / N/A
Event records reset?
Yes / No
Fault records reset?
Yes / No
Disturbance records reset?
Yes / No
Alarms reset?
Yes / No
LEDs reset?
Yes / No
P14D-B/G/L/Z-TM-EN-1
671
Appendix B - Commissioning Record
672
P14D
P14D-B/G/L/Z-TM-EN-1
WIRING DIAGRAMS APPENDIX C
Appendix C - Wiring Diagrams
674
P14D
P14D-B/G/L/Z-TM-EN-1
P14D
1
Appendix C - Wiring Diagrams
APPENDIX OVERVIEW
This chapter contains the wiring diagrams for all possible situations. This chapter contains the following sections: Appendix Overview I/O Option A I/O Option A with SEF I/O Option A with Ethernet I/O Option A with Ethernet and SEF I/O Option B with 2 Rear Ports I/O Option B with 2 Rear Ports and SEF I/O Option C with TCS I/O Option C with TCS and SEF I/O Option D I/O Option D with SEF KCEG142 Retrofit I/O Option A with NVD Input
675 676 677 678 679 680 681 682 683 684 685 686 687
P14D-B/G/L/Z-TM-EN-1
675
Appendix C - Wiring Diagrams
2
P14D
I/O OPTION A
W02311
Figure 171: P14D Directional IED with 8 inputs and 8 outputs
676
P14D-B/G/L/Z-TM-EN-1
P14D
3
Appendix C - Wiring Diagrams
I/O OPTION A WITH SEF
W02312
Figure 172: P14D Directional IED with 8 inputs, 8 outputs and SEF option
P14D-B/G/L/Z-TM-EN-1
677
Appendix C - Wiring Diagrams
4
P14D
I/O OPTION A WITH ETHERNET
W02313
Figure 173: P14D Directional IED with 8 inputs, 8 outputs and Ethernet
678
P14D-B/G/L/Z-TM-EN-1
P14D
5
Appendix C - Wiring Diagrams
I/O OPTION A WITH ETHERNET AND SEF
W02314
Figure 174: P14D Directional IED with 8 inputs, 8 outputs, Ethernet and SEF option
P14D-B/G/L/Z-TM-EN-1
679
Appendix C - Wiring Diagrams
6
P14D
I/O OPTION B WITH 2 REAR PORTS
W02315
Figure 175: P14D Directional IED with 11 inputs, 12 outputs and two rear ports
680
P14D-B/G/L/Z-TM-EN-1
P14D
7
Appendix C - Wiring Diagrams
I/O OPTION B WITH 2 REAR PORTS AND SEF
W02316
Figure 176: P14D Directional IED with 11 inputs, 12 outputs, 2 rear ports and SEF option
P14D-B/G/L/Z-TM-EN-1
681
Appendix C - Wiring Diagrams
8
P14D
I/O OPTION C WITH TCS
W02317
Figure 177: P14D Directional IED with 11 inputs and 12 outputs, for Trip Circuit Supervision
682
P14D-B/G/L/Z-TM-EN-1
P14D
9
Appendix C - Wiring Diagrams
I/O OPTION C WITH TCS AND SEF
W02318
Figure 178: P14D Directional IED with 11 inputs, 12 outputs and SEF option, for trip Circuit Supervision
P14D-B/G/L/Z-TM-EN-1
683
Appendix C - Wiring Diagrams
10
P14D
I/O OPTION D
W02319
Figure 179: P14D Directional IED with 13 inputs and 12 outputs
684
P14D-B/G/L/Z-TM-EN-1
P14D
11
Appendix C - Wiring Diagrams
I/O OPTION D WITH SEF
W02320
Figure 180: P14D Directional IED with 13 inputs , 12 outputs and SEF option
P14D-B/G/L/Z-TM-EN-1
685
Appendix C - Wiring Diagrams
12
P14D
KCEG142 RETROFIT
W02321
Figure 181: P14D Directional IED with 8 inputs and 8 outputs for KCEG142 retrofit applications
686
P14D-B/G/L/Z-TM-EN-1
P14D
13
Appendix C - Wiring Diagrams
I/O OPTION A WITH NVD INPUT
W02322
Figure 182: P14D Directional IED with 8 inputs, 8 outputs and NVD input
P14D-B/G/L/Z-TM-EN-1
687
Appendix C - Wiring Diagrams
688
P14D
P14D-B/G/L/Z-TM-EN-1
Alstom Grid © - ALSTOM 2012. All rights reserved. Information contained in this document is indicative only. No representation or warranty is given or should be relied on that it is complete or correct or will apply to any particular project. This will depend on the technical and commercial circumstances. It is provided without liability and is subject to change without notice. Reproduction, use or disclosure to third parties, without express written authority, is strictly prohibited. Alstom Grid Worldwide Centre www.alstom.com/grid/centre/ Tel: +44 (0) 1785 250 070 www.alstom.com
More Documents from "Ranabir Deb" 6d1f3j
P14d_b-g-l-z-tm-en-1 3e6j6y
November 2019 46
10puntosclaves.pdf 6j6d5m
February 2023 0
2nd-grade-2-reading-comprehension-worksheet-clean-park.pdf 43k41
November 2019 940
Memoirs By Pablo Neruda 2d361l
December 2021 0
Beam Design By Sp 16 5t6v26
December 2019 51